pll1OutputMode (reference) in projects: hal_infineon-3.7.0

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Searched refs:pll1OutputMode (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
D	cy_pra_cfg.h	`243 …cy_en_fll_pll_output_mode_t pll1OutputMode; /**< PLL1 CLK_PLL_CONFIG register, BYPASS_SEL … member`
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
D	cy_pra_cfg.c	`727 …UM_PLL >= CY_PRA_CLKPLL_2) && (devConfig->pll1Enable) && (devConfig->pll1OutputMode != CY_SYSCLK_F… in Cy_PRA_GetInputSourceFreq() 2903 .outputMode = devConfig->pll1OutputMode, in Cy_PRA_SystemConfig()`
D	cy_pra.c	`2310 …structCpy.pll1OutputMode = ((cy_stc_pra_clk_pll_manconfigure_t *) message->praData1)->praConfig->o… in Cy_PRA_ProcessCmd()`

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TraceRecorderSource-3.4.0
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Zephyr-Core-3.5.0
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