Home
last modified time | relevance | path

Searched refs:mode (Results 1 – 25 of 168) sorted by relevance

1234567

/hal_infineon-3.7.0/XMCLib/drivers/inc/
Dxmc1_gpio.h223 XMC_GPIO_MODE_t mode; /**< Defines the direction and characteristics of a pin */ member
231 __STATIC_INLINE bool XMC_GPIO_IsModeValid(XMC_GPIO_MODE_t mode) in XMC_GPIO_IsModeValid() argument
233 return ((mode == XMC_GPIO_MODE_INPUT_TRISTATE) || in XMC_GPIO_IsModeValid()
234 (mode == XMC_GPIO_MODE_INPUT_PULL_DOWN) || in XMC_GPIO_IsModeValid()
235 (mode == XMC_GPIO_MODE_INPUT_PULL_UP) || in XMC_GPIO_IsModeValid()
236 (mode == XMC_GPIO_MODE_INPUT_SAMPLING) || in XMC_GPIO_IsModeValid()
237 (mode == XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE) || in XMC_GPIO_IsModeValid()
238 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN) || in XMC_GPIO_IsModeValid()
239 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP) || in XMC_GPIO_IsModeValid()
240 (mode == XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING) || in XMC_GPIO_IsModeValid()
[all …]
Dxmc4_gpio.h280 XMC_GPIO_MODE_t mode; /**< Defines the direction and characteristics of a pin */ member
289 __STATIC_INLINE bool XMC_GPIO_IsModeValid(XMC_GPIO_MODE_t mode) in XMC_GPIO_IsModeValid() argument
291 return ((mode == XMC_GPIO_MODE_INPUT_TRISTATE) || in XMC_GPIO_IsModeValid()
292 (mode == XMC_GPIO_MODE_INPUT_PULL_DOWN) || in XMC_GPIO_IsModeValid()
293 (mode == XMC_GPIO_MODE_INPUT_PULL_UP) || in XMC_GPIO_IsModeValid()
294 (mode == XMC_GPIO_MODE_INPUT_SAMPLING) || in XMC_GPIO_IsModeValid()
295 (mode == XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE) || in XMC_GPIO_IsModeValid()
296 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN) || in XMC_GPIO_IsModeValid()
297 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP) || in XMC_GPIO_IsModeValid()
298 (mode == XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING) || in XMC_GPIO_IsModeValid()
[all …]
/hal_infineon-3.7.0/mtb-hal-cat1/source/
Dcyhal_syspm.c138 …k_data_t* entry, bool* allow, cyhal_syspm_callback_state_t state, cyhal_syspm_callback_mode_t mode) in _cyhal_syspm_call_all_pm_callbacks() argument
144 (entry->ignore_modes & mode) != mode) in _cyhal_syspm_call_all_pm_callbacks()
146 *allow = entry->callback(state, mode, entry->args) || mode != CYHAL_SYSPM_CHECK_READY; in _cyhal_syspm_call_all_pm_callbacks()
172 static cy_en_syspm_status_t _cyhal_syspm_common_cb(cy_en_syspm_callback_mode_t mode, cyhal_syspm_ca… in _cyhal_syspm_common_cb() argument
175 cyhal_syspm_callback_mode_t hal_mode = _cyhal_utils_convert_pdltohal_pm_mode(mode); in _cyhal_syspm_common_cb()
204 static cy_en_syspm_status_t _cyhal_syspm_cb_sleep_deepsleep(cy_en_syspm_callback_mode_t mode, cyhal… in _cyhal_syspm_cb_sleep_deepsleep() argument
206 cy_en_syspm_status_t status = _cyhal_syspm_common_cb(mode, state); in _cyhal_syspm_cb_sleep_deepsleep()
208 if (mode == CY_SYSPM_BEFORE_TRANSITION) in _cyhal_syspm_cb_sleep_deepsleep()
216 else if (mode == CY_SYSPM_AFTER_TRANSITION) in _cyhal_syspm_cb_sleep_deepsleep()
226 …l_syspm_cb_sleep(cy_stc_syspm_callback_params_t *callback_params, cy_en_syspm_callback_mode_t mode) in _cyhal_syspm_cb_sleep() argument
[all …]
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_usbfs_dev_drv_pvt.h43 __STATIC_INLINE uint32_t GetEndpointInactiveMode(uint32_t mode);
52 cy_en_usbfs_dev_drv_ep_management_mode_t mode,
64 cy_en_usbfs_dev_drv_ep_management_mode_t mode,
145 #define IS_EP_ISOC(mode) ((CY_USBFS_DEV_DRV_EP_CR_ISO_IN == (mode)) || \ argument
146 (CY_USBFS_DEV_DRV_EP_CR_ISO_OUT == (mode)))
199 __STATIC_INLINE uint32_t GetEndpointInactiveMode(uint32_t mode) in GetEndpointInactiveMode() argument
201 switch(mode) in GetEndpointInactiveMode()
204 mode = CY_USBFS_DEV_DRV_EP_CR_NAK_IN; in GetEndpointInactiveMode()
208 mode = CY_USBFS_DEV_DRV_EP_CR_NAK_OUT; in GetEndpointInactiveMode()
214 mode = CY_USBFS_DEV_DRV_EP_CR_DISABLE; in GetEndpointInactiveMode()
[all …]
Dcy_ctdac.h400 #define CY_CTDAC_FORMAT(mode) (((mode) == CY_CTDAC_FORMAT_UNSIGNED) || ((mode… argument
401 #define CY_CTDAC_UPDATE(mode) ((mode) <= CY_CTDAC_UPDATE_STROBE_LEVEL) argument
402 #define CY_CTDAC_DEGLITCH(mode) (((mode) == CY_CTDAC_DEGLITCHMODE_NONE) \ argument
403 … || ((mode) == CY_CTDAC_DEGLITCHMODE_UNBUFFERED) \
404 || ((mode) == CY_CTDAC_DEGLITCHMODE_BUFFERED) \
405 || ((mode) == CY_CTDAC_DEGLITCHMODE_BOTH))
406 #define CY_CTDAC_OUTPUTMODE(mode) (((mode) == CY_CTDAC_OUTPUT_HIGHZ) \ argument
407 || ((mode) == CY_CTDAC_OUTPUT_VALUE) \
408 || ((mode) == CY_CTDAC_OUTPUT_VALUE_PLUS1) \
409 || ((mode) == CY_CTDAC_OUTPUT_VSSA) \
[all …]
Dcy_syspm.h1851 #define CY_SYSPM_IS_CORE_BUCK_PROFILE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_PROFILE_… argument
1852 … ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_LP) || \
1853 … ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_ULP))
1932 #define CY_SYSPM_IS_MISCLDO_MODE_VALID(mode) (((mode) == CY_SYSPM_MISCLDO_VCCACT) || \ argument
1933 ((mode) == CY_SYSPM_MISCLDO_VOUT))
1963 #define CY_SYSPM_IS_DEEPSLEEP_MODE_VALID(mode) (((mode) == CY_SYSPM_DEEPSLEEP) || \ argument
1964 ((mode) == CY_SYSPM_DEEPSLEEP_RAM) || \
1965 ((mode) == CY_SYSPM_DEEPSLEEP_OFF))
1971 #define CY_SYSPM_IS_CORE_BUCK_MODE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_MODE_LP) … argument
1972 ((mode) == CY_SYSPM_CORE_BUCK_MODE_HP))
[all …]
Dcy_crypto_core_sha.h50 cy_en_crypto_sha_mode_t mode);
89 cy_en_crypto_sha_mode_t mode) in Cy_Crypto_Core_Sha() argument
96 tmpResult = Cy_Crypto_Core_V1_Sha(base, message, messageSize, digest, mode); in Cy_Crypto_Core_Sha()
102 tmpResult = Cy_Crypto_Core_V2_Sha(base, message, messageSize, digest, mode); in Cy_Crypto_Core_Sha()
136 cy_en_crypto_sha_mode_t mode, in Cy_Crypto_Core_Sha_Init() argument
144 tmpResult = Cy_Crypto_Core_V1_Sha_Init(base, shaHashState, mode, shaBuffers); in Cy_Crypto_Core_Sha_Init()
150 tmpResult = Cy_Crypto_Core_V2_Sha_Init(base, shaHashState, mode, shaBuffers); in Cy_Crypto_Core_Sha_Init()
Dcy_crypto_core_hmac.h53 cy_en_crypto_sha_mode_t mode);
100 cy_en_crypto_sha_mode_t mode) in Cy_Crypto_Core_Hmac() argument
107 tmpResult = Cy_Crypto_Core_V1_Hmac(base, hmac, message, messageSize, key, keyLength, mode); in Cy_Crypto_Core_Hmac()
113 tmpResult = Cy_Crypto_Core_V2_Hmac(base, hmac, message, messageSize, key, keyLength, mode); in Cy_Crypto_Core_Hmac()
145 …_Type *base, cy_stc_crypto_hmac_state_t *hmacState, cy_en_crypto_sha_mode_t mode, void *hmacBuffer) in Cy_Crypto_Core_Hmac_Init() argument
158 …tmpResult = Cy_Crypto_Core_V2_Hmac_Init(base, hmacState, mode, (cy_stc_crypto_v2_hmac_buffers_t *)… in Cy_Crypto_Core_Hmac_Init()
164 (void)mode; /* Suppress a compiler warning about unused variables */ in Cy_Crypto_Core_Hmac_Init()
Dcy_mcwdt.h564 #define CY_MCWDT_IS_LOWER_LIMIT_MODE_VALID(mode) ((CY_MCWDT_LOWER_LIMIT_MODE_NOTHING == (… argument
565 … (CY_MCWDT_LOWER_LIMIT_MODE_INT == (mode)) || \
566 … (CY_MCWDT_LOWER_LIMIT_MODE_RESET == (mode)))
573 #define CY_MCWDT_IS_MODE_VALID(mode) ((CY_MCWDT_MODE_NONE == (mode)) || \ argument
574 (CY_MCWDT_MODE_INT == (mode)) || \
575 (CY_MCWDT_MODE_RESET == (mode)) || \
576 (CY_MCWDT_MODE_INT_RESET == (mode)))
615 …id Cy_MCWDT_SetMode(MCWDT_STRUCT_Type *base, cy_en_mcwdtctr_t counter, cy_en_mcwdtmode_t mode);
639 …itMode(MCWDT_STRUCT_Type *base, cy_en_mcwdtlowerlimit_t counter, cy_en_mcwdtlowerlimitmode_t mode);
957 …NE void Cy_MCWDT_SetMode(MCWDT_STRUCT_Type *base, cy_en_mcwdtctr_t counter, cy_en_mcwdtmode_t mode) in Cy_MCWDT_SetMode() argument
[all …]
Dcy_ctb.h460 #define CY_CTB_OAMODE(mode) (((mode) == CY_CTB_MODE_OPAMP1X) \ argument
461 || ((mode) == CY_CTB_MODE_OPAMP10X) \
462 || ((mode) == CY_CTB_MODE_COMP))
471 #define CY_CTB_CURRENTMODE(mode) (((mode) == CY_CTB_CURRENT_HIGH_ACTIVE) \ argument
472 || ((mode) == CY_CTB_CURRENT_HIGH_ACTIVE_DEEPSLEEP) \
473 || ((mode) == CY_CTB_CURRENT_LOW_ACTIVE_DEEPSLEEP))
474 #define CY_CTB_SAMPLEHOLD(mode) ((mode) <= CY_CTB_SH_HOLD) argument
1071 void Cy_CTB_SetOutputMode(CTBM_Type *base, cy_en_ctb_opamp_sel_t opampNum, cy_en_ctb_mode_t mode);
1080 void Cy_CTB_DACSampleAndHold(CTBM_Type *base, cy_en_ctb_sample_hold_mode_t mode);
Dcy_scb_uart.h690 …eepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
691 …ibernateCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
926 #define CY_SCB_UART_IS_MODE_VALID(mode) ( (CY_SCB_UART_STANDARD == (mode)) || \ argument
927 (CY_SCB_UART_SMARTCARD == (mode)) || \
928 (CY_SCB_UART_IRDA == (mode)) )
956 …CB_UART_IS_OVERSAMPLE_VALID(ovs, mode, lpRx) ( ((CY_SCB_UART_STANDARD == (mode)) || (CY_SCB_UA… argument
964 #define CY_SCB_UART_IS_MUTLI_PROC_VALID(mp, mode, width, parity) ( (mp) ? ((CY_SCB_UART_STANDARD… argument
Dcy_sar.h843 #define CY_SAR_TRIGGER(mode) (((mode) == CY_SAR_TRIGGER_MODE_FW_ONLY) || \ argument
844 ((mode) == CY_SAR_TRIGGER_MODE_FW_AND_HWEDGE) || \
845 ((mode) == CY_SAR_TRIGGER_MODE_FW_AND_HWLEVEL))
846 #define CY_SAR_RETURN(mode) (((mode) == CY_SAR_RETURN_STATUS) || \ argument
847 ((mode) == CY_SAR_WAIT_FOR_RESULT) || \
848 ((mode) == CY_SAR_RETURN_STATUS_INJ) || \
849 ((mode) == CY_SAR_WAIT_FOR_RESULT_INJ))
850 #define CY_SAR_STARTCONVERT(mode) (((mode) == CY_SAR_START_CONVERT_SINGLE_SHOT) || ((mode) ==… argument
1552 …INE void Cy_SAR_SimultStart(PASS_Type *base, uint32_t sarMask, cy_en_sar_start_convert_sel_t mode);
1578 …epCallback(const cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
[all …]
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_sha_v1.c131 cy_en_crypto_sha_mode_t mode, in Cy_Crypto_Core_V1_Sha_Init() argument
197 switch (mode) in Cy_Crypto_Core_V1_Sha_Init()
205 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
221 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
235 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
252 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
266 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
280 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
294 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V1_Sha_Init()
578 cy_en_crypto_sha_mode_t mode) in Cy_Crypto_Core_V1_Sha() argument
[all …]
Dcy_crypto_core_sha_v2.c71 cy_en_crypto_sha_mode_t mode, in Cy_Crypto_Core_V2_Sha_Init() argument
164 switch (mode) in Cy_Crypto_Core_V2_Sha_Init()
171 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
185 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
196 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
210 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
221 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
232 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
243 hashState->mode = (uint32_t)mode; in Cy_Crypto_Core_V2_Sha_Init()
588 cy_en_crypto_sha_mode_t mode) in Cy_Crypto_Core_V2_Sha() argument
[all …]
Dcy_syspm_ppu.c122 cy_en_syspm_status_t cy_pd_ppu_set_power_mode(struct ppu_v1_reg *ppu, uint32_t mode) in cy_pd_ppu_set_power_mode() argument
126 CY_ASSERT(mode < PPU_V1_MODE_COUNT); in cy_pd_ppu_set_power_mode()
128 …(void)ppu_v1_dynamic_enable(ppu, (enum ppu_v1_mode) mode); /* Suppress a compiler warning about un… in cy_pd_ppu_set_power_mode()
150 cy_en_syspm_status_t cy_pd_ppu_set_static_power_mode(struct ppu_v1_reg *ppu, uint32_t mode) in cy_pd_ppu_set_static_power_mode() argument
154 CY_ASSERT(mode < PPU_V1_MODE_COUNT); in cy_pd_ppu_set_static_power_mode()
156 …(void)ppu_v1_set_power_mode(ppu, (enum ppu_v1_mode) mode); /* Suppress a compiler warning about un… in cy_pd_ppu_set_static_power_mode()
Dcy_syspm_v3.c509 cy_en_syspm_status_t Cy_SysPm_LdoSetMode(cy_en_syspm_ldo_mode_t mode) in Cy_SysPm_LdoSetMode() argument
511 CY_ASSERT_L3(CY_SYSPM_IS_LDO_MODE_VALID(mode)); in Cy_SysPm_LdoSetMode()
515 switch (mode) in Cy_SysPm_LdoSetMode()
782 …atus_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, cy_en_syspm_callback_mode_t mode) in Cy_SysPm_ExecuteCallback() argument
785 CY_ASSERT_L3(CY_SYSPM_IS_CALLBACK_MODE_VALID(mode)); in Cy_SysPm_ExecuteCallback()
792 if ((mode == CY_SYSPM_BEFORE_TRANSITION) || (mode == CY_SYSPM_CHECK_READY)) in Cy_SysPm_ExecuteCallback()
798 … while ((curCallback != NULL) && ((retVal != CY_SYSPM_FAIL) || (mode != CY_SYSPM_CHECK_READY))) in Cy_SysPm_ExecuteCallback()
801 if (0UL == ((uint32_t) mode & curCallback->skipMode)) in Cy_SysPm_ExecuteCallback()
807 retVal = curCallback->callback(&curParams, mode); in Cy_SysPm_ExecuteCallback()
820 if (mode == CY_SYSPM_CHECK_READY) in Cy_SysPm_ExecuteCallback()
[all …]
Dcy_syspm_v2.c397 uint32_t mode; in Cy_SysPm_GetDeepSleepMode() local
400 mode = (uint32_t)cy_pd_ppu_get_programmed_power_mode((struct ppu_v1_reg *)CY_PPU_MAIN_BASE); in Cy_SysPm_GetDeepSleepMode()
402 switch(mode) in Cy_SysPm_GetDeepSleepMode()
788 cy_en_syspm_status_t Cy_SysPm_LdoSetMode(cy_en_syspm_ldo_mode_t mode) in Cy_SysPm_LdoSetMode() argument
790 CY_ASSERT_L3(CY_SYSPM_IS_LDO_MODE_VALID(mode)); in Cy_SysPm_LdoSetMode()
794 switch (mode) in Cy_SysPm_LdoSetMode()
1118 void Cy_SysPm_CoreBuckSetMode(cy_en_syspm_core_buck_mode_t mode) in Cy_SysPm_CoreBuckSetMode() argument
1120 CY_ASSERT_L2(CY_SYSPM_IS_CORE_BUCK_MODE_VALID(mode)); in Cy_SysPm_CoreBuckSetMode()
1122 CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL, SRSS_PWR_CBUCK_CTL_CBUCK_MODE, mode); in Cy_SysPm_CoreBuckSetMode()
1147 CY_ASSERT_L2(CY_SYSPM_IS_CORE_BUCK_MODE_VALID(config->mode)); in Cy_SysPm_CoreBuckConfig()
[all …]
Dcy_usbfs_dev_drv_io.c126 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_CPU != context->mode) in Cy_USBFS_Dev_Drv_ConfigDevice()
130 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA_AUTO == context->mode) in Cy_USBFS_Dev_Drv_ConfigDevice()
142 USBFS_DEV_ARB_CFG(base) = _VAL2FLD(USBFS_USBDEV_ARB_CFG_DMA_CFG, context->mode) | in Cy_USBFS_Dev_Drv_ConfigDevice()
223 bufSize = (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA_AUTO != context->mode) ? in GetEndpointBuffer()
264 cy_en_usbfs_dev_drv_ep_management_mode_t mode, in RestoreEndpointHwBuffer() argument
278 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA == mode) in RestoreEndpointHwBuffer()
387 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA == context->mode) in AddEndpointHwBuffer()
390 …cy_en_usbfs_dev_drv_status_t retStatus = DmaEndpointInit(base, context->mode, context->useReg16, &… in AddEndpointHwBuffer()
854 switch(context->mode) in Cy_USBFS_Dev_Drv_Abort()
Dcy_syspm_v4.c391 uint32_t mode; in Cy_SysPm_GetDeepSleepMode() local
394 mode = (uint32_t)cy_pd_ppu_get_programmed_power_mode((struct ppu_v1_reg *)CY_PPU_MAIN_BASE); in Cy_SysPm_GetDeepSleepMode()
396 switch(mode) in Cy_SysPm_GetDeepSleepMode()
694 cy_en_syspm_status_t Cy_SysPm_LdoSetMode(cy_en_syspm_ldo_mode_t mode) in Cy_SysPm_LdoSetMode() argument
696 CY_ASSERT_L3(CY_SYSPM_IS_LDO_MODE_VALID(mode)); in Cy_SysPm_LdoSetMode()
700 switch (mode) in Cy_SysPm_LdoSetMode()
1000 void Cy_SysPm_CoreBuckSetMode(cy_en_syspm_core_buck_mode_t mode) in Cy_SysPm_CoreBuckSetMode() argument
1002 CY_ASSERT_L2(CY_SYSPM_IS_CORE_BUCK_MODE_VALID(mode)); in Cy_SysPm_CoreBuckSetMode()
1004 CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL, SRSS_PWR_CBUCK_CTL_CBUCK_MODE, mode); in Cy_SysPm_CoreBuckSetMode()
1028 void Cy_SysPm_CoreBuckDpslpSetMode(cy_en_syspm_core_buck_mode_t mode) in Cy_SysPm_CoreBuckDpslpSetMode() argument
[all …]
Dcy_usbfs_dev_drv.c103 CY_ASSERT_L3(CY_USBFS_DEV_DRV_IS_MODE_VALID(config->mode)); in Cy_USBFS_Dev_Drv_Init()
147 context->mode = config->mode; in Cy_USBFS_Dev_Drv_Init()
153 switch(config->mode) in Cy_USBFS_Dev_Drv_Init()
197 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_CPU != context->mode) in Cy_USBFS_Dev_Drv_Init()
356 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_CPU != context->mode) in Cy_USBFS_Dev_Drv_Disable()
778 modeDmaAuto = (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA_AUTO == context->mode); in SieEnpointIntrHandler()
1212 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_DMA_AUTO == context->mode) in RestoreDeviceConfiguration()
1218 RestoreEndpointHwBuffer(base, context->mode, &context->epPool[endpoint]); in RestoreDeviceConfiguration()
1257 if (CY_USBFS_DEV_DRV_EP_MANAGEMENT_CPU != context->mode) in Cy_USBFS_Dev_Drv_Suspend()
/hal_infineon-3.7.0/abstraction-rtos/include/
Dcyabs_rtos_internal.h42 uint32_t mode = __get_mode(); in is_in_isr() local
43 return (mode == 0x11U /*FIQ*/) || (mode == 0x12U /*IRQ*/) || (mode == 0x13U /*SVC*/) || in is_in_isr()
44 (mode == 0x17U /*ABT*/) || (mode == 0x1BU /*UND*/); in is_in_isr()
/hal_infineon-3.7.0/bless/
Dcy_ble.c28 … 'COMPONENTS+=BLESS_HOST_IPC CM0_BLESS' - to operate in dual CPU mode, \
29 … 'COMPONENTS+=BLESS_CONTROLLER BLESS_HOST' - to operate in single CPU mode, \
30 … 'COMPONENTS+=BLESS_CONTROLLER' - to operate in controller only (HCI) mode. \
46 cy_en_syspm_callback_mode_t mode);
48 cy_en_syspm_callback_mode_t mode);
50 cy_en_syspm_callback_mode_t mode);
895 cy_en_syspm_callback_mode_t mode) in Cy_BLE_DeepSleepCallbackSingleCore() argument
899 (void) mode; in Cy_BLE_DeepSleepCallbackSingleCore()
909 switch(mode) in Cy_BLE_DeepSleepCallbackSingleCore()
1034 cy_en_syspm_callback_mode_t mode) in Cy_BLE_DeepSleepCallbackDualCore() argument
[all …]
/hal_infineon-3.7.0/XMCLib/drivers/src/
Dxmc_eru.c76 #define XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode) \ argument
77 ((mode == XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL) || \
78 (mode == XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL))
207 const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode) in XMC_ERU_ETL_SetStatusFlagMode() argument
211 …XMC_ERU_ETL_SetStatusFlagMode:Invalid Status Flag Mode", XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode)); in XMC_ERU_ETL_SetStatusFlagMode()
213 eru->EXICON_b[channel].LD = (uint8_t)mode; in XMC_ERU_ETL_SetStatusFlagMode()
287 const XMC_ERU_OGU_SERVICE_REQUEST_t mode) in XMC_ERU_OGU_SetServiceRequestMode() argument
291 …_OGU_SetServiceRequestMode:Invalid Service Request Mode", XMC_ERU_OGU_CHECK_SERIVCE_REQUEST(mode)); in XMC_ERU_OGU_SetServiceRequestMode()
293 eru->EXOCON_b[channel].GP = (uint8_t)mode; in XMC_ERU_OGU_SetServiceRequestMode()
Dxmc4_scu.c510 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL)) || in XMC_SCU_CLOCK_Init()
511 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR)); in XMC_SCU_CLOCK_Init()
513 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL)) || in XMC_SCU_CLOCK_Init()
514 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR)); in XMC_SCU_CLOCK_Init()
516 ((config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL) || in XMC_SCU_CLOCK_Init()
517 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR))); in XMC_SCU_CLOCK_Init()
520 ((config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL) || in XMC_SCU_CLOCK_Init()
521 (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR))); in XMC_SCU_CLOCK_Init()
556 if (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_DISABLED) in XMC_SCU_CLOCK_Init()
565 config->syspll_config.mode, in XMC_SCU_CLOCK_Init()
[all …]
/hal_infineon-3.7.0/mtb-template-cat1/files/cat1b/
Dcybsp_pm_callbacks.c73 cy_en_syspm_callback_mode_t mode) in cybsp_smif_power_up_callback() argument
79 switch (mode) in cybsp_smif_power_up_callback()
144 cy_en_syspm_callback_mode_t mode) in cybsp_dsram_smif_power_up_callback() argument
150 switch (mode) in cybsp_dsram_smif_power_up_callback()
210 cy_en_syspm_callback_mode_t mode) in cybsp_deepsleep_ram_callback() argument
216 switch (mode) in cybsp_deepsleep_ram_callback()

1234567