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Searched refs:mask (Results 1 – 25 of 58) sorted by relevance

123

/hal_infineon-3.7.0/XMCLib/drivers/inc/
Dxmc_hrpwm.h992 …TATIC_INLINE void XMC_HRPWM_EnableHighResolutionPath(XMC_HRPWM_t *const hrpwm, const uint32_t mask) in XMC_HRPWM_EnableHighResolutionPath() argument
995 hrpwm->HRCCFG |= mask; in XMC_HRPWM_EnableHighResolutionPath()
1014 …ATIC_INLINE void XMC_HRPWM_DisableHighResolutionPath(XMC_HRPWM_t *const hrpwm, const uint32_t mask) in XMC_HRPWM_DisableHighResolutionPath() argument
1017 hrpwm->HRCCFG &= ~mask; in XMC_HRPWM_DisableHighResolutionPath()
1040 …STATIC_INLINE void XMC_HRPWM_EnableLowResolutionPath(XMC_HRPWM_t *const hrpwm, const uint32_t mask) in XMC_HRPWM_EnableLowResolutionPath() argument
1043 hrpwm->HRCCFG |= mask; in XMC_HRPWM_EnableLowResolutionPath()
1062 …TATIC_INLINE void XMC_HRPWM_DisableLowResolutionPath(XMC_HRPWM_t *const hrpwm, const uint32_t mask) in XMC_HRPWM_DisableLowResolutionPath() argument
1065 hrpwm->HRCCFG &= ~mask; in XMC_HRPWM_DisableLowResolutionPath()
1085 …NE void XMC_HRPWM_EnableHighResolutionShadowTransfer(XMC_HRPWM_t *const hrpwm, const uint32_t mask) in XMC_HRPWM_EnableHighResolutionShadowTransfer() argument
1088 hrpwm->HRCSTRG = mask; in XMC_HRPWM_EnableHighResolutionShadowTransfer()
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Dxmc_bccu.h847 void XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask);
867 void XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask);
909 void XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask);
929 void XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask);
967 void XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask);
988 void XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask);
1008 void XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask);
1028 void XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask);
1049 void XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask);
1070 void XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask);
/hal_infineon-3.7.0/XMCLib/drivers/src/
Dxmc_bccu.c191 void XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask) in XMC_BCCU_ConcurrentEnableChannels() argument
193 …XMC_ASSERT("XMC_BCCU_ConcurrentEnableChannels: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MA… in XMC_BCCU_ConcurrentEnableChannels()
195 bccu->CHEN |= mask; in XMC_BCCU_ConcurrentEnableChannels()
201 void XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask) in XMC_BCCU_ConcurrentDisableChannels() argument
203 …XMC_ASSERT("XMC_BCCU_ConcurrentDisableChannels: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_M… in XMC_BCCU_ConcurrentDisableChannels()
204 bccu->CHEN &= ~(uint32_t)(mask); in XMC_BCCU_ConcurrentDisableChannels()
221 void XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask) in XMC_BCCU_ConcurrentEnableTrap() argument
223 …XMC_ASSERT("XMC_BCCU_ConcurrentEnableTrap: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); in XMC_BCCU_ConcurrentEnableTrap()
225 bccu->CHOCON |= (uint32_t)(mask << BCCU_CHOCON_CH0TPE_Pos); in XMC_BCCU_ConcurrentEnableTrap()
231 void XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask) in XMC_BCCU_ConcurrentDisableTrap() argument
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Dxmc_dma.c675 uint32_t mask; in XMC_DMA_IRQHandler() local
700 mask = (uint32_t)1U << channel; in XMC_DMA_IRQHandler()
701 if ((event & mask) != 0) in XMC_DMA_IRQHandler()
722 mask = (uint32_t)1U << channel; in XMC_DMA_IRQHandler()
723 if (event & mask) in XMC_DMA_IRQHandler()
747 mask = (uint32_t)1U << channel; in XMC_DMA_IRQHandler()
748 if (event & mask) in XMC_DMA_IRQHandler()
771 mask = (uint32_t)1U << channel; in XMC_DMA_IRQHandler()
772 if (event & mask) in XMC_DMA_IRQHandler()
793 mask = (uint32_t)1U << channel; in XMC_DMA_IRQHandler()
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Dxmc_ccu8.c1187 uint32_t mask; in XMC_CCU8_SLICE_SetInterruptNode() local
1200 mask = ((uint32_t) CCU8_CC8_SRS_POSR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1206 mask = ((uint32_t) CCU8_CC8_SRS_CM1SR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1212 mask = ((uint32_t) CCU8_CC8_SRS_CM2SR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1217 mask = ((uint32_t) CCU8_CC8_SRS_E0SR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1222 mask = ((uint32_t) CCU8_CC8_SRS_E1SR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1227 mask = ((uint32_t) CCU8_CC8_SRS_E2SR_Msk); in XMC_CCU8_SLICE_SetInterruptNode()
1232 srs &= ~mask; in XMC_CCU8_SLICE_SetInterruptNode()
1275 void XMC_CCU8_SLICE_ConfigureDeadTime(XMC_CCU8_SLICE_t *const slice, const uint8_t mask) in XMC_CCU8_SLICE_ConfigureDeadTime() argument
1278 …XMC_ASSERT("XMC_CCU8_SLICE_ConfigureDeadTime:Invalid Channel", (mask <= XMC_CCU8_SLICE_DEAD_TIME_C… in XMC_CCU8_SLICE_ConfigureDeadTime()
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Dxmc4_scu.c661 uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); in XMC_SCU_RESET_AssertPeripheralReset() local
663 *(uint32_t *)(&(SCU_RESET->PRSET0) + (index * 3U)) = (uint32_t)mask; in XMC_SCU_RESET_AssertPeripheralReset()
670 uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); in XMC_SCU_RESET_DeassertPeripheralReset() local
672 *(uint32_t *)(&(SCU_RESET->PRCLR0) + (index * 3U)) = (uint32_t)mask; in XMC_SCU_RESET_DeassertPeripheralReset()
679 uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); in XMC_SCU_RESET_IsPeripheralResetAsserted() local
681 return ((*(uint32_t *)(&(SCU_RESET->PRSTAT0) + (index * 3U)) & mask) != 0U); in XMC_SCU_RESET_IsPeripheralResetAsserted()
1078 uint32_t mask = (peripheral & (uint32_t)~0xf0000000UL); in XMC_SCU_CLOCK_GatePeripheralClock() local
1080 *(uint32_t *)((&(SCU_CLK->CGATSET0)) + (index * 3U)) = (uint32_t)mask; in XMC_SCU_CLOCK_GatePeripheralClock()
1087 uint32_t mask = (peripheral & (uint32_t)~0xf0000000UL); in XMC_SCU_CLOCK_UngatePeripheralClock() local
1089 *(uint32_t *)(&(SCU_CLK->CGATCLR0) + (index * 3U)) = (uint32_t)mask; in XMC_SCU_CLOCK_UngatePeripheralClock()
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Dxmc_usbd.c360 uint16_t mask = 1U; in XMC_USBD_lAssignTXFifo() local
363 while( (i < (uint8_t)XMC_USBD_NUM_TX_FIFOS)&&((xmc_device.txfifomsk & mask) != 0U)) in XMC_USBD_lAssignTXFifo()
365 mask = (uint16_t)(mask << 1U); in XMC_USBD_lAssignTXFifo()
368 if ((xmc_device.txfifomsk & mask) == 0U) in XMC_USBD_lAssignTXFifo()
370 xmc_device.txfifomsk |= mask; in XMC_USBD_lAssignTXFifo()
664 uint16_t mask; in XMC_USBD_lHandleOEPInt() local
673 mask = daint.ep.out & daintmsk.ep.out; in XMC_USBD_lHandleOEPInt()
677 while ((uint16_t)mask >> ep_num) in XMC_USBD_lHandleOEPInt()
679 temp1 = (mask >> (uint16_t)ep_num); in XMC_USBD_lHandleOEPInt()
755 uint16_t mask; in XMC_USBD_lHandleIEPInt() local
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/hal_infineon-3.7.0/bless/
Dcy_ble_hal_int.c38 if((intrNotifyPtr != NULL) && (intrNotifyPtr->mask != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
43 if((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLESS_STACK_ISR) != 0u) in Cy_BLE_IntrNotifyIsrHandler()
50 ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLESS_INTR_STAT_DSM_ENTERED)!= 0u)) in Cy_BLE_IntrNotifyIsrHandler()
56 ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLESS_INTR_STAT_DSM_EXITED) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
74 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_CONN_INTR_CLOSE_CE) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
81 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_CONN_INTR_CE_TX_ACK) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
88 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_CONN_EXT_INTR_EARLY) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
95 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_CONN_INTR_CE_RX) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
105 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_SCAN_INTR_ADV_RX) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
112 … ((intrNotifyPtr->mask & CY_BLE_INTR_CALLBACK_BLELL_SCAN_INTR_SCAN_RSP_RX) != 0u)) in Cy_BLE_IntrNotifyIsrHandler()
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/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dppu_v1.c223 void ppu_v1_interrupt_mask(struct ppu_v1_reg *ppu, unsigned int mask) in ppu_v1_interrupt_mask() argument
227 ppu->IMR |= mask & PPU_V1_IMR_MASK; in ppu_v1_interrupt_mask()
230 void ppu_v1_additional_interrupt_mask(struct ppu_v1_reg *ppu, unsigned int mask) in ppu_v1_additional_interrupt_mask() argument
234 ppu->AIMR |= mask & PPU_V1_AIMR_MASK; in ppu_v1_additional_interrupt_mask()
237 void ppu_v1_interrupt_unmask(struct ppu_v1_reg *ppu, unsigned int mask) in ppu_v1_interrupt_unmask() argument
241 ppu->IMR &= ~(mask & PPU_V1_IMR_MASK); in ppu_v1_interrupt_unmask()
245 unsigned int mask) in ppu_v1_additional_interrupt_unmask() argument
249 ppu->AIMR &= ~(mask & PPU_V1_AIMR_MASK); in ppu_v1_additional_interrupt_unmask()
253 unsigned int mask) in ppu_v1_is_additional_interrupt_pending() argument
255 return (ppu->AISR & (mask & PPU_V1_AISR_MASK)) != 0; in ppu_v1_is_additional_interrupt_pending()
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Dcy_lin.c459 cy_en_lin_status_t Cy_LIN_SetInterruptMask(LIN_CH_Type* base, uint32_t mask) in Cy_LIN_SetInterruptMask() argument
469 LIN_CH_INTR_MASK(base) = mask; in Cy_LIN_SetInterruptMask()
480 cy_en_lin_status_t Cy_LIN_GetInterruptMask(LIN_CH_Type* base, uint32_t *mask) in Cy_LIN_GetInterruptMask() argument
485 (NULL == mask)) in Cy_LIN_GetInterruptMask()
491 *mask = LIN_CH_INTR_MASK(base); in Cy_LIN_GetInterruptMask()
547 cy_en_lin_status_t Cy_LIN_ClearInterrupt(LIN_CH_Type* base, uint32_t mask) in Cy_LIN_ClearInterrupt() argument
557 LIN_CH_INTR(base) = mask; in Cy_LIN_ClearInterrupt()
Dcy_keyscan.c841 cy_en_ks_status_t Cy_Keyscan_SetInterruptMask(MXKEYSCAN_Type* base, uint32_t mask) in Cy_Keyscan_SetInterruptMask() argument
851 KEYSCAN_INTR_MASK(base) = mask; in Cy_Keyscan_SetInterruptMask()
864 cy_en_ks_status_t Cy_Keyscan_GetInterruptMask(MXKEYSCAN_Type* base, uint32_t *mask) in Cy_Keyscan_GetInterruptMask() argument
868 if ( (NULL == base) || (NULL == mask)) in Cy_Keyscan_GetInterruptMask()
874 *mask = KEYSCAN_INTR_MASK(base); in Cy_Keyscan_GetInterruptMask()
933 cy_en_ks_status_t Cy_Keyscan_ClearInterrupt(MXKEYSCAN_Type* base, uint32_t mask) in Cy_Keyscan_ClearInterrupt() argument
943 KEYSCAN_INTR(base) = mask; in Cy_Keyscan_ClearInterrupt()
Dcy_adcmic.c261 uint32_t mask = CY_ADCMIC_INTR_DC; in Cy_ADCMic_IsEndConversion() local
262 uint32_t intr = mask & Cy_ADCMic_GetInterruptStatus(base); in Cy_ADCMic_IsEndConversion()
268 intr = mask & Cy_ADCMic_GetInterruptStatus(base); in Cy_ADCMic_IsEndConversion()
274 if (mask == intr) in Cy_ADCMic_IsEndConversion()
277 Cy_ADCMic_ClearInterrupt(base, mask); in Cy_ADCMic_IsEndConversion()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_usbfs_dev_drv_reg.h106 __STATIC_INLINE void Cy_USBFS_Dev_Drv_SetSieInterruptMask (USBFS_Type *base, uint32_t mask);
109 __STATIC_INLINE void Cy_USBFS_Dev_Drv_ClearSieInterrupt (USBFS_Type *base, uint32_t mask);
110 __STATIC_INLINE void Cy_USBFS_Dev_Drv_SetSieInterrupt (USBFS_Type *base, uint32_t mask);
161 …oid Cy_USBFS_Dev_Drv_SetArbEpInterruptMask(USBFS_Type *base, uint32_t endpoint, uint32_t mask);
164 … void Cy_USBFS_Dev_Drv_ClearArbEpInterrupt(USBFS_Type *base, uint32_t endpoint, uint32_t mask);
348 __STATIC_INLINE void Cy_USBFS_Dev_Drv_SetSieInterruptMask(USBFS_Type *base, uint32_t mask) in Cy_USBFS_Dev_Drv_SetSieInterruptMask() argument
350 USBFS_DEV_LPM_INTR_SIE_MASK(base) = mask; in Cy_USBFS_Dev_Drv_SetSieInterruptMask()
415 __STATIC_INLINE void Cy_USBFS_Dev_Drv_ClearSieInterrupt(USBFS_Type *base, uint32_t mask) in Cy_USBFS_Dev_Drv_ClearSieInterrupt() argument
417 USBFS_DEV_LPM_INTR_SIE(base) = mask; in Cy_USBFS_Dev_Drv_ClearSieInterrupt()
437 __STATIC_INLINE void Cy_USBFS_Dev_Drv_SetSieInterrupt(USBFS_Type *base, uint32_t mask) in Cy_USBFS_Dev_Drv_SetSieInterrupt() argument
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Dcy_csd.h699 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask);
700 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask);
701 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t mask, uint32_t valu…
765 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask) in Cy_CSD_SetBits() argument
768 (* regPtr) |= mask; in Cy_CSD_SetBits()
789 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask) in Cy_CSD_ClrBits() argument
792 (* regPtr) &= ~mask; in Cy_CSD_ClrBits()
816 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t mask, uint32_t val… in Cy_CSD_WriteBits() argument
819 (* regPtr) = ((* regPtr) & ~mask) | (value & mask); in Cy_CSD_WriteBits()
Dcy_ctb.h480 #define CY_CTB_OA0SWITCH(mask) (((mask) & (~CY_CTB_DEINIT_OA0_SW)) == 0UL) argument
481 #define CY_CTB_OA1SWITCH(mask) (((mask) & (~CY_CTB_DEINIT_OA1_SW)) == 0UL) argument
482 #define CY_CTB_CTDSWITCH(mask) (((mask) & (~CY_CTB_DEINIT_CTD_SW)) == 0UL) argument
483 #define CY_CTB_SWITCHMASK(select,mask) (((select) == CY_CTB_SWITCH_OA0_SW) ? (((mask) & (~CY_C… argument
484 … (((select) == CY_CTB_SWITCH_OA1_SW) ? (((mask) & (~CY_CTB_DEINIT_OA1_SW)) == 0UL) : \
485 (((mask) & (~CY_CTB_DEINIT_CTD_SW)) == 0UL)))
486 #define CY_CTB_SARSEQCTRL(mask) (((mask) == CY_CTB_SW_SEQ_CTRL_D51_MASK) \ argument
487 || ((mask) == CY_CTB_SW_SEQ_CTRL_D52_D62_MASK) \
488 || ((mask) == CY_CTB_SW_SEQ_CTRL_D51_D52_D62_MASK))
Dcy_ctdac.h414 #define CY_CTDAC_SWITCHMASK(mask) ((mask) <= (uint32_t) (CY_CTDAC_SWITCH_CVD_MASK… argument
416 #define CY_CTDAC_INTRMASK(mask) (((mask) == 0uL) || ((mask) == 1uL)) argument
699 __STATIC_INLINE void Cy_CTDAC_SetInterruptMask(CTDAC_Type *base, uint32_t mask);
1007 __STATIC_INLINE void Cy_CTDAC_SetInterruptMask(CTDAC_Type *base, uint32_t mask) in Cy_CTDAC_SetInterruptMask() argument
1009 CY_ASSERT_L2(CY_CTDAC_INTRMASK(mask)); in Cy_CTDAC_SetInterruptMask()
1011 CTDAC_INTR_MASK(base) = mask & CTDAC_INTR_MASK_VDAC_EMPTY_MASK_Msk; in Cy_CTDAC_SetInterruptMask()
Dcy_evtgen.h189 #define CY_EVTGEN_IS_MASK_VALID(mask) (0UL == ((mask) & ((uint32_t) ~EVTGEN_INTR_COMP0_Msk))) argument
393 __STATIC_INLINE void Cy_EvtGen_ClearInterrupt(EVTGEN_Type *base, uint32_t mask) in Cy_EvtGen_ClearInterrupt() argument
395 CY_ASSERT_L1(CY_EVTGEN_IS_MASK_VALID(mask)); in Cy_EvtGen_ClearInterrupt()
396 CY_SET_REG32(&base->INTR, mask); in Cy_EvtGen_ClearInterrupt()
528 __STATIC_INLINE void Cy_EvtGen_ClearInterruptDeepSleep(EVTGEN_Type *base, uint32_t mask) in Cy_EvtGen_ClearInterruptDeepSleep() argument
530 CY_ASSERT_L1(CY_EVTGEN_IS_MASK_VALID(mask)); in Cy_EvtGen_ClearInterruptDeepSleep()
531 base->INTR_DPSLP = _VAL2FLD(EVTGEN_INTR_DPSLP_COMP1, mask); in Cy_EvtGen_ClearInterruptDeepSleep()
Dcy_usbfs_dev_drv.h1639 uint32_t mask; in Cy_USBFS_Dev_Drv_RegisterSofCallback() local
1644 mask = Cy_USBFS_Dev_Drv_GetSieInterruptMask(base); in Cy_USBFS_Dev_Drv_RegisterSofCallback()
1648 mask |= CY_USBFS_DEV_DRV_INTR_SIE_SOF; in Cy_USBFS_Dev_Drv_RegisterSofCallback()
1652 mask &= ~CY_USBFS_DEV_DRV_INTR_SIE_SOF; in Cy_USBFS_Dev_Drv_RegisterSofCallback()
1656 Cy_USBFS_Dev_Drv_SetSieInterruptMask(base, mask); in Cy_USBFS_Dev_Drv_RegisterSofCallback()
1690 uint32_t mask; in Cy_USBFS_Dev_Drv_RegisterLpmCallback() local
1695 mask = Cy_USBFS_Dev_Drv_GetSieInterruptMask(base); in Cy_USBFS_Dev_Drv_RegisterLpmCallback()
1699 mask |= CY_USBFS_DEV_DRV_INTR_SIE_LPM; in Cy_USBFS_Dev_Drv_RegisterLpmCallback()
1703 mask &= ~CY_USBFS_DEV_DRV_INTR_SIE_LPM; in Cy_USBFS_Dev_Drv_RegisterLpmCallback()
1707 Cy_USBFS_Dev_Drv_SetSieInterruptMask(base, mask); in Cy_USBFS_Dev_Drv_RegisterLpmCallback()
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Dppu_v1.h387 void ppu_v1_interrupt_mask(struct ppu_v1_reg *ppu, unsigned int mask);
393 unsigned int mask);
398 void ppu_v1_interrupt_unmask(struct ppu_v1_reg *ppu, unsigned int mask);
404 unsigned int mask);
410 unsigned int mask);
415 void ppu_v1_ack_interrupt(struct ppu_v1_reg *ppu, unsigned int mask);
420 void ppu_v1_ack_additional_interrupt(struct ppu_v1_reg *ppu, unsigned int mask);
Dcy_sar.h838 #define CY_SAR_CHANMASK(mask) (0UL == ((mask) & ~CY_SAR_CHANNELS_MASK)) argument
839 #define CY_SAR_INJMASK(mask) (0UL == ((mask) & ~(CY_SAR_INJ_CHAN_MASK | CY_SAR_CHANNELS_… argument
841 #define CY_SAR_INTRMASK(mask) (0UL == ((mask) & ~CY_SAR_INTR)) argument
842 #define CY_SAR_FIFO_INTRMASK(mask) (0UL == ((mask) & ~CY_SAR_INTR_FIFO)) argument
853 #define CY_SAR_SWITCHMASK(mask) ((mask) <= CY_SAR_CLEAR_ALL_SWITCHES) argument
855 #define CY_SAR_SQMASK(mask) (((mask) & (~CY_SAR_DEINIT_SQ_CTRL)) == 0UL) argument
Dcy_tcpwm.h558 __STATIC_INLINE void Cy_TCPWM_SetInterruptMask(TCPWM_Type *base, uint32_t cntNum, uint32_t mask);
1075 __STATIC_INLINE void Cy_TCPWM_SetInterruptMask(TCPWM_Type *base, uint32_t cntNum, uint32_t mask) in Cy_TCPWM_SetInterruptMask() argument
1079 TCPWM_CNT_INTR_MASK(base, cntNum) = mask; in Cy_TCPWM_SetInterruptMask()
1081 TCPWM_GRP_CNT_INTR_MASK(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = mask; in Cy_TCPWM_SetInterruptMask()
1107 uint32_t mask; in Cy_TCPWM_GetInterruptMask() local
1111 mask = TCPWM_CNT_INTR_MASK(base, cntNum); in Cy_TCPWM_GetInterruptMask()
1113 mask = TCPWM_GRP_CNT_INTR_MASK(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum); in Cy_TCPWM_GetInterruptMask()
1116 return mask; in Cy_TCPWM_GetInterruptMask()
Dcy_keyscan.h520 cy_en_ks_status_t Cy_Keyscan_SetInterruptMask(MXKEYSCAN_Type* base, uint32_t mask);
535 cy_en_ks_status_t Cy_Keyscan_GetInterruptMask(MXKEYSCAN_Type* base, uint32_t *mask);
580 cy_en_ks_status_t Cy_Keyscan_ClearInterrupt(MXKEYSCAN_Type* base, uint32_t mask);
Dcy_lin.h721 cy_en_lin_status_t Cy_LIN_SetInterruptMask(LIN_CH_Type* base, uint32_t mask);
737 cy_en_lin_status_t Cy_LIN_GetInterruptMask(LIN_CH_Type* base, uint32_t *mask);
785 cy_en_lin_status_t Cy_LIN_ClearInterrupt(LIN_CH_Type* base, uint32_t mask);
Dcy_mcwdt.h959 uint32_t mask, shift; in Cy_MCWDT_SetMode() local
965 mask = (counter == CY_MCWDT_COUNTER2) ? CY_MCWDT_C2_MODE_MASK : CY_MCWDT_C0C1_MODE_MASK; in Cy_MCWDT_SetMode()
966 mask = mask << shift; in Cy_MCWDT_SetMode()
968 MCWDT_CONFIG(base) = (MCWDT_CONFIG(base) & ~mask) | ((uint32_t) mode << shift); in Cy_MCWDT_SetMode()
993 uint32_t mode, mask; in Cy_MCWDT_GetMode() local
997 mask = (counter == CY_MCWDT_COUNTER2) ? CY_MCWDT_C2_MODE_MASK : CY_MCWDT_C0C1_MODE_MASK; in Cy_MCWDT_GetMode()
998 mode = (MCWDT_CONFIG(base) >> (CY_MCWDT_BYTE_SHIFT * ((uint32_t)counter))) & mask; in Cy_MCWDT_GetMode()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/third_party/ethernet/src/
Dedd_rx.c1192 uint32_t emacSetSpecificAddr1Mask(void *pD, CEDI_MacAddress *mask) in emacSetSpecificAddr1Mask() argument
1196 if ((pD==NULL) || (mask==NULL)) in emacSetSpecificAddr1Mask()
1203 mask->byte[0] + (mask->byte[1]<<8) + (mask->byte[2]<<16) in emacSetSpecificAddr1Mask()
1204 + (mask->byte[3]<<24)); in emacSetSpecificAddr1Mask()
1208 mask->byte[4] + (mask->byte[5]<<8)); in emacSetSpecificAddr1Mask()
1220 uint32_t emacGetSpecificAddr1Mask(void *pD, CEDI_MacAddress *mask) in emacGetSpecificAddr1Mask() argument
1223 if ((pD==NULL)||(mask==NULL)) return EINVAL; in emacGetSpecificAddr1Mask()
1233 mask->byte[0] = (reg1 & 0xFF); in emacGetSpecificAddr1Mask()
1234 mask->byte[1] = ((reg1>>8) & 0xFF); in emacGetSpecificAddr1Mask()
1235 mask->byte[2] = ((reg1>>16) & 0xFF); in emacGetSpecificAddr1Mask()
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