Home
last modified time | relevance | path

Searched refs:lockTolerance (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/device-info/personalities/platform/
Dfll_solver-2.0.tcl269 proc calculate_fll_accuracy {targetCcoFreq sourceRefFreq trimStep refDiv lockTolerance} { argument
273 return [expr {$fllPrecision * ($lockTolerance + 2)}]
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_pra_cfg.h219 …uint16_t lockTolerance; /**< CLK_FLL_CONFIG2 register, LOCK_TOL bits */ member
Dcy_sysclk.h1763 uint16_t lockTolerance; /**< CLK_FLL_CONFIG2 register, LOCK_TOL bits */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_sysclk.c1511 … config.lockTolerance = (uint16_t)CY_SYSLIB_DIV_ROUNDUP(config.fllMult * 18939UL, 1000000UL); in Cy_SysClk_FllConfigure()
1624 …CY_ASSERT_L1(config->lockTolerance <= (SRSS_CLK_FLL_CONFIG2_LOCK_TOL_Msk >> SRSS_CLK_FLL_CONFIG2_L… in Cy_SysClk_FllManualConfigure()
1627 _VAL2FLD(SRSS_CLK_FLL_CONFIG2_LOCK_TOL, config->lockTolerance); in Cy_SysClk_FllManualConfigure()
1666 config->lockTolerance = (uint16_t)_FLD2VAL(SRSS_CLK_FLL_CONFIG2_LOCK_TOL, tempReg); in Cy_SysClk_FllGetConfiguration()
Dcy_pra_cfg.c329 .lockTolerance = devConfig->lockTolerance, in Cy_PRA_FllInit()
1283 if (devConfig->lockTolerance > CY_PRA_FLL_MAX_LOCK_TOLERENCE) in Cy_PRA_ValidateFLL()
Dcy_sysclk_v2.c2931 … config.lockTolerance = (uint16_t)CY_SYSLIB_DIV_ROUNDUP(config.fllMult * 18939UL, 1000000UL); in Cy_SysClk_FllConfigure()
3046 …CY_ASSERT_L1(config->lockTolerance <= (SRSS_CLK_FLL_CONFIG2_LOCK_TOL_Msk >> SRSS_CLK_FLL_CONFIG2_L… in Cy_SysClk_FllManualConfigure()
3049 _VAL2FLD(SRSS_CLK_FLL_CONFIG2_LOCK_TOL, config->lockTolerance); in Cy_SysClk_FllManualConfigure()
3092 config->lockTolerance = (uint16_t)_FLD2VAL(SRSS_CLK_FLL_CONFIG2_LOCK_TOL, tempReg); in Cy_SysClk_FllGetConfiguration()
Dcy_pra.c2233 … structCpy.lockTolerance = ((cy_stc_fll_manual_config_t *) message->praData1)->lockTolerance; in Cy_PRA_ProcessCmd()