Home
last modified time | relevance | path

Searched refs:divval (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/device-info/personalities/platform/
Dfll_solver-2.0.tcl250 set divval [expr {ceil($srcFreqMHz)}]
251 set altval [expr {ceil(($divval / $ttref) + 1.0)}]
252 …return [expr {int($isWco ? 200 : (($ttref > $testval) ? $divval : (($divval > $altval) ? $divval :…
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_sysclk.c1580 uint32_t divval = CY_SYSLIB_DIV_ROUNDUP(inputFreq, 1000000UL); in Cy_SysClk_FllConfigure() local
1581 … uint32_t altval = (uint32_t)CY_SYSLIB_DIV_ROUNDUP((uint64_t)divval * fref, 6000000ULL) + 1UL; in Cy_SysClk_FllConfigure()
1584 ((outputFreq < fref) ? divval : in Cy_SysClk_FllConfigure()
1585 ((divval > altval) ? divval : altval)); in Cy_SysClk_FllConfigure()
Dcy_sysclk_v2.c3000 uint32_t divval = CY_SYSLIB_DIV_ROUNDUP(inputFreq, 1000000UL); in Cy_SysClk_FllConfigure() local
3001 … uint32_t altval = (uint32_t)CY_SYSLIB_DIV_ROUNDUP((uint64_t)divval * fref, 6000000ULL) + 1UL; in Cy_SysClk_FllConfigure()
3004 ((outputFreq < fref) ? divval : in Cy_SysClk_FllConfigure()
3005 ((divval > altval) ? divval : altval)); in Cy_SysClk_FllConfigure()