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Searched refs:coreBuckDpSlpVoltSel (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_syspm_v2.c1197 CY_ASSERT_L2(CY_SYSPM_IS_CORE_BUCK_VOLTAGE_VALID(config->coreBuckDpSlpVoltSel)); in Cy_SysPm_SdrConfigure()
1211 … _VAL2FLD(SRSS_PWR_SDR0_CTL_SDR0_CBUCK_DPSLP_VSEL, config->coreBuckDpSlpVoltSel) | in Cy_SysPm_SdrConfigure()
1222 … _VAL2FLD(SRSS_PWR_SDR0_CTL_SDR0_CBUCK_DPSLP_VSEL, config->coreBuckDpSlpVoltSel) | in Cy_SysPm_SdrConfigure()
1237 … _VAL2FLD(SRSS_PWR_SDR0_CTL_SDR0_CBUCK_DPSLP_VSEL, config->coreBuckDpSlpVoltSel) | in Cy_SysPm_SdrConfigure()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_syspm.h3669 …uint8_t coreBuckDpSlpVoltSel; /**< Deep Sleep Core Buck Voltage Select \ref cy_en_syspm_core_buc… member