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Searched refs:cfgDriveSel1 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_gpio.h323 uint32_t cfgDriveSel1; /**< Drive strength configuration for pins 4,5,6,7 */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_gpio.c304 GPIO_PRT_DRIVE_EXT1(base) = config->cfgDriveSel1; in Cy_GPIO_Port_Init()