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Searched refs:USBFS_DEV_EP0_CR (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_usbfs_dev_drv.c250 USBFS_DEV_EP0_CR(base) = 0UL; in Cy_USBFS_Dev_Drv_DeInit()
319 USBFS_DEV_EP0_CR(base) = CY_USBFS_DEV_DRV_EP_CR_NAK_INOUT; in Cy_USBFS_Dev_Drv_Enable()
549 USBFS_DEV_EP0_CR(base) = CY_USBFS_DEV_DRV_EP_CR_NAK_INOUT; in BusResetIntrHandler()
1291 USBFS_DEV_EP0_CR(base) = CY_USBFS_DEV_DRV_EP_CR_NAK_INOUT; in Cy_USBFS_Dev_Drv_Resume()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_usbfs_dev_drv_reg.h465 USBFS_DEV_EP0_CR(base) = mode; in Cy_USBFS_Dev_Drv_WriteEp0Mode()
467 (void) USBFS_DEV_EP0_CR(base); in Cy_USBFS_Dev_Drv_WriteEp0Mode()
486 return USBFS_DEV_EP0_CR(base); in Cy_USBFS_Dev_Drv_ReadEp0Mode()
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1266 #define USBFS_DEV_EP0_CR(base) (((USBFS_V1_Type *)(base))->USBDEV.EP0_CR) macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1924 #define USBFS_DEV_EP0_CR(base) (((USBFS_V1_Type *)(base))->USBDEV.EP0_CR) macro