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Searched refs:TR_MON_CTL (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_crypto.h72 __IOM uint32_t TR_MON_CTL; /*!< 0x000002C0 True random monitor control */ member
Dcyip_crypto_v2.h75 __IOM uint32_t TR_MON_CTL; /*!< 0x000002C0 True random monitor control */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_crypto_v2.h75 __IOM uint32_t TR_MON_CTL; /*!< 0x000002C0 True random monitor control */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h489 #define REG_CRYPTO_TR_MON_CTL(base) (((CRYPTO_Type*)(base))->TR_MON_CTL)