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Searched refs:TRIG_IN_MUX_2_PDMA0_TR_OUT0 (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_03_config.h187 TRIG_IN_MUX_2_PDMA0_TR_OUT0 = 0x00000201u, /* cpuss.dw0_tr_out[0] */ enumerator
Dpsoc6_04_config.h173 TRIG_IN_MUX_2_PDMA0_TR_OUT0 = 0x00000201u, /* cpuss.dw0_tr_out[0] */ enumerator
Dpsoc6_02_config.h278 TRIG_IN_MUX_2_PDMA0_TR_OUT0 = 0x00000201u, /* cpuss.dw0_tr_out[0] */ enumerator
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h326 TRIG_IN_MUX_2_PDMA0_TR_OUT0 = 0x00000211u, /* cpuss.dw0_tr_out[0] */ enumerator
Dxmc7200_config.h409 TRIG_IN_MUX_2_PDMA0_TR_OUT0 = 0x00000211u, /* cpuss.dw0_tr_out[0] */ enumerator