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Searched refs:TRIG_IN_MUX_0_HSIOM_TR_OUT2 (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h81 TRIG_IN_MUX_0_HSIOM_TR_OUT2 = 0x0000000Bu, /* ioss.peri_tr_io_input_in[2] */ enumerator
Dcyw20829B0_config.h81 TRIG_IN_MUX_0_HSIOM_TR_OUT2 = 0x0000000Bu, /* ioss.peri_tr_io_input_in[2] */ enumerator
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_03_config.h127 TRIG_IN_MUX_0_HSIOM_TR_OUT2 = 0x00000047u, /* peri.tr_io_input[2] */ enumerator
Dpsoc6_04_config.h115 TRIG_IN_MUX_0_HSIOM_TR_OUT2 = 0x00000047u, /* peri.tr_io_input[2] */ enumerator
Dpsoc6_02_config.h167 TRIG_IN_MUX_0_HSIOM_TR_OUT2 = 0x00000047u, /* peri.tr_io_input[2] */ enumerator