Searched refs:SRSS_PWR_BUCK_CTL2 (Results 1 – 3 of 3) sorted by relevance
| /hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/ |
| D | cy_syspm.c | 1330 retVal = ((0U != _FLD2VAL(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_HW_SEL, SRSS_PWR_BUCK_CTL2)) || in Cy_SysPm_BuckIsOutputEnabled()
1331 (0U != _FLD2VAL(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_EN, SRSS_PWR_BUCK_CTL2))); in Cy_SysPm_BuckIsOutputEnabled()
1355 SRSS_PWR_BUCK_CTL2 |= _VAL2FLD(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_EN, 1U); in Cy_SysPm_BuckEnableVoltage2()
1387 SRSS_PWR_BUCK_CTL2 = in Cy_SysPm_BuckSetVoltage2()
1388 … _CLR_SET_FLD32U((SRSS_PWR_BUCK_CTL2), SRSS_PWR_BUCK_CTL2_BUCK_OUT2_SEL, (uint32_t) voltage); in Cy_SysPm_BuckSetVoltage2()
2432 retVal = _FLD2VAL(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_SEL, SRSS_PWR_BUCK_CTL2); in Cy_SysPm_BuckGetVoltage2()
2448 SRSS_PWR_BUCK_CTL2 &= (uint32_t) ~_VAL2FLD(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_EN, 1U); in Cy_SysPm_BuckDisableVoltage2()
2467 SRSS_PWR_BUCK_CTL2 |= _VAL2FLD(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_HW_SEL, 1U); in Cy_SysPm_BuckSetVoltage2HwControl()
2471 SRSS_PWR_BUCK_CTL2 &= (uint32_t) ~_VAL2FLD(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_HW_SEL, 1U); in Cy_SysPm_BuckSetVoltage2HwControl()
2484 retVal = (0U != _FLD2VAL(SRSS_PWR_BUCK_CTL2_BUCK_OUT2_HW_SEL, SRSS_PWR_BUCK_CTL2)); in Cy_SysPm_BuckIsVoltage2HwControlled()
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| /hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ |
| D | cy_device.h | 235 #define SRSS_PWR_BUCK_CTL2 (((SRSS_V1_Type *) SRSS)->PWR_BUCK_CTL2) macro
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| /hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ |
| D | cy_device.h | 171 #define SRSS_PWR_BUCK_CTL2 (((SRSS_Type *) SRSS)->PWR_BUCK_CTL2) macro
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