Searched refs:SCTR (Results 1 – 10 of 10) sorted by relevance
503 __IO uint32_t SCTR; /**< Shift control register*/ member1096 channel->SCTR = (uint32_t)(channel->SCTR & (~USIC_CH_SCTR_WLE_Msk)) | in XMC_USIC_CH_SetWordLength()1117 channel->SCTR = (uint32_t)(channel->SCTR & (~USIC_CH_SCTR_SDIR_Msk)) | (uint32_t)shift_direction; in XMC_USIC_CH_SetShiftDirection()1173 channel->SCTR = (uint32_t)(channel->SCTR & (~USIC_CH_SCTR_FLE_Msk)) | in XMC_USIC_CH_SetFrameLength()1330 …channel->SCTR = (uint32_t)(channel->SCTR & (~USIC_CH_SCTR_DOCFG_Msk)) | (uint32_t)data_output_mode; in XMC_USIC_CH_SetDataOutputMode()1467 channel->SCTR &= (~USIC_CH_SCTR_PDL_Msk); in XMC_USIC_CH_SetPassiveDataLevel()1468 channel->SCTR |= (uint32_t)passive_level; in XMC_USIC_CH_SetPassiveDataLevel()
434 channel->SCTR &= (uint32_t)~USIC_CH_SCTR_SDIR_Msk; in XMC_I2S_CH_SetBitOrderLsbFirst()452 channel->SCTR |= (uint32_t)USIC_CH_SCTR_SDIR_Msk; in XMC_I2S_CH_SetBitOrderMsbFirst()
567 channel->SCTR &= (uint32_t)~USIC_CH_SCTR_SDIR_Msk; in XMC_SPI_CH_SetBitOrderLsbFirst()585 channel->SCTR |= (uint32_t)USIC_CH_SCTR_SDIR_Msk; in XMC_SPI_CH_SetBitOrderMsbFirst()
126 channel->SCTR = (uint32_t)((((uint32_t)config->data_bits - 1UL) << USIC_CH_SCTR_WLE_Pos) | in XMC_UART_CH_Init()131 channel->SCTR |= (uint32_t)(((uint32_t)config->frame_length - 1UL) << USIC_CH_SCTR_FLE_Pos); in XMC_UART_CH_Init()135 channel->SCTR |= (uint32_t)(((uint32_t)config->data_bits - 1UL) << USIC_CH_SCTR_FLE_Pos); in XMC_UART_CH_Init()
104 channel->SCTR = (uint32_t)(0x3UL << USIC_CH_SCTR_TRM_Pos) | in XMC_I2S_CH_Init()
105 channel->SCTR = USIC_CH_SCTR_PDL_Msk | in XMC_SPI_CH_Init()
119 …channel->SCTR = ((uint32_t)TRANSMISSION_MODE << (uint32_t)USIC_CH_SCTR_TRM_Pos) | /* Transmision m… in XMC_I2C_CH_Init()
1701 …__IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register … member
1662 …__IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register … member
1921 …__IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register … member
