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Searched refs:REG_CRYPTO_TR_CTL1 (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_trng.c95 REG_CRYPTO_TR_CTL1(base) = 0UL; in Cy_Crypto_Core_Trng_Init()
110 REG_CRYPTO_TR_CTL1(base) = (uint32_t)(_VAL2FLD(CRYPTO_TR_CTL1_RO11_EN, config->ro11Enable) in Cy_Crypto_Core_Trng_Init()
139 REG_CRYPTO_TR_CTL1(base) = 0UL; in Cy_Crypto_Core_Trng_DeInit()
Dcy_crypto_core_hw.c583 REG_CRYPTO_TR_CTL1(base) = 0u; in Cy_Crypto_Core_Cleanup()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_trng.h414 return (REG_CRYPTO_TR_CTL1(base) & (uint32_t)(1U << ((uint32_t)roSelector))) != 0U ? 1U : 0U; in Cy_Crypto_Core_Trng_GetRoStatus()
438 …uint32_t roData = (REG_CRYPTO_TR_CTL1(base) & ~roMask) | (((uint32_t)roStatus != 0U) ? roMask : 0U… in Cy_Crypto_Core_Trng_SetRoStatus()
439 REG_CRYPTO_TR_CTL1(base) = roData; in Cy_Crypto_Core_Trng_SetRoStatus()
481 return ((REG_CRYPTO_TR_CTL1(base) & CY_CRYPTO_TRNG_RO_ALL_MASK) != 0U); in Cy_Crypto_Core_Trng_AnyRoEnabled()
Dcy_crypto_core_hw.h486 #define REG_CRYPTO_TR_CTL1(base) (((CRYPTO_Type*)(base))->TR_CTL1) macro