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Searched refs:REG_CRYPTO_TR_CTL0 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_trng.c103 …REG_CRYPTO_TR_CTL0(base) = (uint32_t)(_VAL2FLD(CRYPTO_TR_CTL0_SAMPLE_CLOCK_DIV, config->sampleCloc… in Cy_Crypto_Core_Trng_Init()
138 REG_CRYPTO_TR_CTL0(base) = (uint32_t)_VAL2FLD(CRYPTO_TR_CTL0_INIT_DELAY, 3U); in Cy_Crypto_Core_Trng_DeInit()
Dcy_crypto_core_hw.c582 REG_CRYPTO_TR_CTL0(base) = 0u; in Cy_Crypto_Core_Cleanup()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h485 #define REG_CRYPTO_TR_CTL0(base) (((CRYPTO_Type*)(base))->TR_CTL0) macro