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Searched refs:REG_CRYPTO_RAM_PWR_CTL (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_hw.c467 REG_CRYPTO_RAM_PWR_CTL(base) = (uint32_t)(CY_CRYPTO_PWR_MODE_ENABLED); in Cy_Crypto_Core_Enable()
545 REG_CRYPTO_RAM_PWR_CTL(base) = (uint32_t)(CY_CRYPTO_PWR_MODE_OFF); in Cy_Crypto_Core_Disable()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h592 #define REG_CRYPTO_RAM_PWR_CTL(base) (((CRYPTO_V2_Type*)(base))->RAM_PWR_CTL) macro