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Searched refs:RBCTR (Results 1 – 9 of 9) sorted by relevance

/hal_infineon-3.7.0/XMCLib/drivers/src/
Dxmc_usic.c388 channel->RBCTR &= (uint32_t)~USIC_CH_RBCTR_SIZE_Msk; in XMC_USIC_CH_RXFIFO_Configure()
393 channel->RBCTR = (uint32_t)((channel->RBCTR & (uint32_t)~(USIC_CH_RBCTR_LIMIT_Msk | in XMC_USIC_CH_RXFIFO_Configure()
422 channel->RBCTR &= (uint32_t)~USIC_CH_RBCTR_SIZE_Msk; in XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit()
424 channel->RBCTR = (uint32_t)((uint32_t)(channel->RBCTR & (uint32_t)~USIC_CH_RBCTR_LIMIT_Msk) | in XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit()
449 …channel->RBCTR = (uint32_t)((channel->RBCTR & (~(uint32_t)(USIC_CH_INPR_Msk << (uint32_t)interrupt… in XMC_USIC_CH_RXFIFO_SetInterruptNodePointer()
Dxmc_uart.c217 if ((channel->RBCTR & USIC_CH_RBCTR_SIZE_Msk) == 0U) in XMC_UART_CH_GetReceivedData()
Dxmc_i2s.c262 if ((channel->RBCTR & USIC_CH_RBCTR_SIZE_Msk) == 0U) in XMC_I2S_CH_GetReceivedData()
Dxmc_spi.c222 if ((channel->RBCTR & USIC_CH_RBCTR_SIZE_Msk) == 0U) in XMC_SPI_CH_GetReceivedData()
Dxmc_i2c.c411 if ((channel->RBCTR & USIC_CH_RBCTR_SIZE_Msk) == 0U) in XMC_I2C_CH_GetReceivedData()
/hal_infineon-3.7.0/XMCLib/drivers/inc/
Dxmc_usic.h536 __IO uint32_t RBCTR; /**< Receive FIFO control register*/ member
1852 channel->RBCTR |= event; in XMC_USIC_CH_RXFIFO_EnableEvent()
1876 channel->RBCTR &= (uint32_t)~event; in XMC_USIC_CH_RXFIFO_DisableEvent()
/hal_infineon-3.7.0/XMCLib/devices/XMC4700/Include/
DXMC4700.h1734 …__IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Regi… member
/hal_infineon-3.7.0/XMCLib/devices/XMC4500/Include/
DXMC4500.h1695 …__IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Regi… member
/hal_infineon-3.7.0/XMCLib/devices/XMC4800/Include/
DXMC4800.h1954 …__IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Regi… member