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Searched refs:PERI_DIV_8_CTL (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_sysclk.c51 CY_REG32_CLR_SET(PERI_DIV_8_CTL[dividerNum], PERI_DIV_8_CTL_INT8_DIV, dividerValue); in Cy_SysClk_PeriphSetDivider()
80 retVal = _FLD2VAL(PERI_DIV_8_CTL_INT8_DIV, PERI_DIV_8_CTL[dividerNum]); in Cy_SysClk_PeriphGetDivider()
264 retVal = _FLD2BOOL(PERI_DIV_8_CTL_EN, PERI_DIV_8_CTL[dividerNum]); in Cy_SysClk_PeriphGetDividerEnabled()
Dcy_sysclk_v2.c57 …CY_REG32_CLR_SET(PERI_DIV_8_CTL(instNum, grpNum, dividerNum), PERI_DIV_8_CTL_INT8_DIV, dividerValu… in Cy_SysClk_PeriPclkSetDivider()
90 retVal = _FLD2VAL(PERI_DIV_8_CTL_INT8_DIV, PERI_DIV_8_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDivider()
323 retVal = _FLD2BOOL(PERI_DIV_8_CTL_EN, PERI_DIV_8_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDividerEnabled()
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h832 #define PERI_DIV_8_CTL ((volatile uint32_t *)((uint32_t)(cy_device->periBase) … macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1276 #define PERI_DIV_8_CTL(instNum, grNum, divNum) ((PERI_PCLK_GR_Type*) &PERI_PCLK_R… macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h1090 #define PERI_DIV_8_CTL(instNum, grNum, divNum) ((PERI_PCLK_GR_Type*) &PERI_PCLK_R… macro