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Searched refs:PASS_SAR_CLOCK_SEL (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_sar.c353 PASS_SAR_CLOCK_SEL(base) = _VAL2FLD(PASS_V2_SAR_CLOCK_SEL_CLOCK_SEL, config->clock); in Cy_SAR_Init()
443 PASS_SAR_CLOCK_SEL(base) = CY_SAR_DEINIT; in Cy_SAR_DeInit()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_sar.h865 …nt32_t)CY_SAR_CLK_DEEPSLEEP == _FLD2VAL(PASS_V2_SAR_CLOCK_SEL_CLOCK_SEL, PASS_SAR_CLOCK_SEL(base)))
2457 PASS_SAR_CLOCK_SEL(base) = _VAL2FLD(PASS_V2_SAR_CLOCK_SEL_CLOCK_SEL, clock); in Cy_SAR_SelectClock()
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1128 #define PASS_SAR_CLOCK_SEL(sarBase) (((PASS_V2_Type*) cy_device->passBase)->SAR_CLOCK_SEL[C… macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1774 #define PASS_SAR_CLOCK_SEL(sarBase) (((PASS_V2_Type*) cy_device->passBase)->SAR_CLOCK_SEL[C… macro