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Searched refs:NvicMux2_IRQHandler (Results 1 – 16 of 16) sorted by relevance

/hal_infineon-3.7.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/
Dstartup_psoc6_02_cm0plus.s85 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
257 PUBWEAK NvicMux2_IRQHandler
259 NvicMux2_IRQHandler label
260 B NvicMux2_IRQHandler
Dstartup_psoc6_03_cm0plus.s85 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
257 PUBWEAK NvicMux2_IRQHandler
259 NvicMux2_IRQHandler label
260 B NvicMux2_IRQHandler
Dstartup_psoc6_04_cm0plus.s85 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
257 PUBWEAK NvicMux2_IRQHandler
259 NvicMux2_IRQHandler label
260 B NvicMux2_IRQHandler
Dstartup_psoc6_01_cm0plus.s85 DCD NvicMux2_IRQHandler ; CM0+ NVIC Mux input 2
273 PUBWEAK NvicMux2_IRQHandler
275 NvicMux2_IRQHandler label
276 B NvicMux2_IRQHandler
/hal_infineon-3.7.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/
Dstartup_psoc6_04_cm0plus.s61 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
179 EXPORT NvicMux2_IRQHandler [WEAK]
196 NvicMux2_IRQHandler label
Dstartup_psoc6_02_cm0plus.s61 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
179 EXPORT NvicMux2_IRQHandler [WEAK]
196 NvicMux2_IRQHandler label
Dstartup_psoc6_03_cm0plus.s61 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
179 EXPORT NvicMux2_IRQHandler [WEAK]
196 NvicMux2_IRQHandler label
Dstartup_psoc6_01_cm0plus.s61 DCD NvicMux2_IRQHandler ; CM0+ NVIC Mux input 2
195 EXPORT NvicMux2_IRQHandler [WEAK]
228 NvicMux2_IRQHandler label
/hal_infineon-3.7.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
Dstartup_psoc6_02_cm0plus.S85 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
236 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_03_cm0plus.S85 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
236 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_04_cm0plus.S85 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
236 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_01_cm0plus.S85 .long NvicMux2_IRQHandler /* CM0+ NVIC Mux input 2 */
252 def_irq_handler NvicMux2_IRQHandler /* CM0+ NVIC Mux input 2 */
/hal_infineon-3.7.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/
Dstartup_psoc6_02_cm0plus.S97 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
354 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_03_cm0plus.S97 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
354 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_04_cm0plus.S97 .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */
354 def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
Dstartup_psoc6_01_cm0plus.S97 .long NvicMux2_IRQHandler /* CM0+ NVIC Mux input 2 */
370 def_irq_handler NvicMux2_IRQHandler /* CM0+ NVIC Mux input 2 */