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Searched refs:NUM_DMAC_CHANNELS (Results 1 – 1 of 1) sorted by relevance

/hal_infineon-3.7.0/mtb-hal-cat1/source/
Dcyhal_dma_dmac.c66 #define NUM_DMAC_CHANNELS (APPCPUSS_AXIDMAC0_CH_NR + APPCPUSS_AXIDMAC1_CH_NR) macro
69 #define NUM_DMAC_CHANNELS (APPCPUSS_AXIDMAC0_CH_NR) macro
72 #define NUM_DMAC_CHANNELS (CPUSS_DMAC0_CH_NR + CPUSS_DMAC1_CH_NR) macro
75 #define NUM_DMAC_CHANNELS (CPUSS_DMAC_CH_NR) macro
118 static cyhal_dma_t* _cyhal_dma_dmac_config_structs[NUM_DMAC_CHANNELS];
210 for (uint8_t i = 0; i < NUM_DMAC_CHANNELS; i++) in _cyhal_dma_dmac_has_enabled()
224 for (uint8_t i = 0; (i < NUM_DMAC_CHANNELS) && !block_transition; i++) in _cyhal_dma_dmac_pm_callback()
275 CY_ASSERT(diff < NUM_DMAC_CHANNELS); in _cyhal_dma_dmac_get_block_from_irqn()
278 #if (NUM_DMAC0_CHANNELS < NUM_DMAC_CHANNELS) in _cyhal_dma_dmac_get_block_from_irqn()
279 if (diff < NUM_DMAC_CHANNELS) in _cyhal_dma_dmac_get_block_from_irqn()
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