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Searched refs:HSIOM_PRT_SECTION_SIZE (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_hsiom.h36 #define HSIOM_PRT_SECTION_SIZE 0x00000010UL macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_hsiom_v3.h36 #define HSIOM_PRT_SECTION_SIZE 0x00000010UL macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_hsiom.h36 #define HSIOM_PRT_SECTION_SIZE 0x00000010UL macro
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_gpio.c264 baseHSIOM = (HSIOM_PRT_V1_Type*)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_GPIO_Port_Init()
594 baseHSIOM = (HSIOM_PRT_V1_Type*)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_GPIO_Port_Deinit()
822 portAddrHSIOM = (HSIOM_PRT_V1_Type*)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_GPIO_SetHSIOM()
995 portAddrHSIOM = (HSIOM_PRT_V1_Type*)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_GPIO_GetHSIOM()
Dcy_pra.c361 portAddrHSIOM = (volatile uint32_t *)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_PRA_InitHsiomPort()
414 portAddrHSIOM = (volatile uint32_t *)(CY_HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); in Cy_PRA_InitAdjHsiomPort()