Searched refs:DXCR (Results 1 – 5 of 5) sorted by relevance
502 __IO uint32_t DXCR[6]; /**< Input control registers DX0 to DX5.*/ member787 channel->DXCR[input] = (uint32_t)((channel->DXCR[input] & (uint32_t)(~USIC_CH_DXCR_DSEL_Msk)) | in XMC_USIC_CH_SetInputSource()806 channel->DXCR[input] &=(uint32_t)~USIC_CH_DXCR_INSW_Msk; in XMC_USIC_CH_ConnectInputDataShiftToPPP()828 channel->DXCR[input] |= USIC_CH_DXCR_INSW_Msk; in XMC_USIC_CH_ConnectInputDataShiftToDataInput()847 channel->DXCR[input] |= USIC_CH_DXCR_DPOL_Msk; in XMC_USIC_CH_EnableInputInversion()866 channel->DXCR[input] &=(uint32_t)~USIC_CH_DXCR_DPOL_Msk; in XMC_USIC_CH_DisableInputInversion()883 channel->DXCR[1U] |= USIC_CH_DX1CR_DCEN_Msk; in XMC_USIC_CH_EnableDelayCompensation()899 channel->DXCR[1U] &=(uint32_t)~USIC_CH_DX1CR_DCEN_Msk; in XMC_USIC_CH_DisableDelayCompensation()918 channel->DXCR[input] |= (uint32_t)USIC_CH_DXCR_DFEN_Msk; in XMC_USIC_CH_EnableInputDigitalFilter()936 channel->DXCR[input] &=(uint32_t)~USIC_CH_DXCR_DFEN_Msk; in XMC_USIC_CH_DisableInputDigitalFilter()[all …]
456 …channel->DXCR[input] = (uint32_t)(channel->DXCR[input] & (~USIC_CH_DX0CR_INSW_Msk)) | USIC_CH_DX0… in XMC_I2C_CH_SetInputSource()
642 …channel->DXCR[input] = (uint32_t)(channel->DXCR[input] & (~USIC_CH_DX0CR_DSEN_Msk)) | USIC_CH_DX0C… in XMC_I2S_CH_SetInputSource()
619 …channel->DXCR[input] = (uint32_t)(channel->DXCR[input] & (~(USIC_CH_DX0CR_INSW_Msk|USIC_CH_DX0CR_D… in XMC_UART_CH_SetInputSource()
1034 …channel->DXCR[input] = (uint32_t)(channel->DXCR[input] & (~USIC_CH_DX0CR_DSEN_Msk)) | USIC_CH_DX0C… in XMC_SPI_CH_SetInputSource()