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Searched refs:DMAC_CH_CTL (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_dmac.h1426 DMAC_CH_CTL(base, channel) |= DMAC_CH_V2_CTL_ENABLED_Msk; in Cy_DMAC_Channel_Enable()
1450 DMAC_CH_CTL(base, channel) &= (uint32_t) ~DMAC_CH_V2_CTL_ENABLED_Msk; in Cy_DMAC_Channel_Disable()
1478 CY_REG32_CLR_SET(DMAC_CH_CTL(base, channel), DMAC_CH_V2_CTL_PRIO, priority); in Cy_DMAC_Channel_SetPriority()
1505 return ((uint32_t) _FLD2VAL(DMAC_CH_V2_CTL_PRIO, DMAC_CH_CTL(base, channel))); in Cy_DMAC_Channel_GetPriority()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_dmac.c194 DMAC_CH_CTL(base, channel) = _VAL2FLD(DMAC_CH_V2_CTL_PRIO, config->priority) | in Cy_DMAC_Channel_Init()
224 DMAC_CH_CTL(base, channel) = 0UL; in Cy_DMAC_Channel_DeInit()
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h781 #define DMAC_CH_CTL(base, chan) (DMAC_CH(base, chan)->CTL) macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1084 #define DMAC_CH_CTL(base, chan) (DMAC_CH(base, chan)->CTL) macro
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h340 #define DMAC_CH_CTL(base, chan) (DMAC_CH(base, chan)->CTL) macro