1 /***************************************************************************//**
2 * \file cy_tcpwm_pwm.h
3 * \version 1.60
4 *
5 * \brief
6 * The header file of the TCPWM PWM driver.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2016-2021 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 *     http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25 
26 #if !defined(CY_TCPWM_PWM_H)
27 #define CY_TCPWM_PWM_H
28 
29 #include "cy_tcpwm.h"
30 
31 #ifdef CY_IP_MXTCPWM
32 
33 #if defined(__cplusplus)
34 extern "C" {
35 #endif
36 
37 /**
38 * \addtogroup group_tcpwm_pwm
39 * Driver API for PWM.
40 *
41 * The functions and other declarations used in this part of the driver are in cy_tcpwm_pwm.h.
42 * You can also include cy_pdl.h to get access to all
43 * functions and declarations in the PDL.
44 *
45 * Use PWM mode when an output square wave is needed with a specific
46 * period and duty cycle, such as:
47 * * Creating arbitrary square wave outputs
48 * * Driving an LED (changing the brightness)
49 * * Driving Motors (dead time assertion available)
50 *
51 * The PWM has the following features:
52 * * 16- or 32-bit Counter.
53 * * Two Programmable Period registers that can be swapped.
54 * * Two Output Compare registers that can be swapped on overflow and/or
55 * underflow.
56 * * Left Aligned, Right Aligned, Center Aligned, and Asymmetric Aligned modes
57 * * Continuous or One Shot run modes.
58 * * Pseudo Random mode.
59 * * Two PWM outputs with Dead Time insertion, and programmable polarity.
60 * * Interrupt on Terminal Count and Compare or Capture 0. Interrupt on Compare or Capture 1 is only available in TCPWM Version 2.
61 * * Start, Reload, Stop, Swap (Capture), and Count Inputs.
62 * * Immediate Kill, Kill 0 Input, Kill 1 Input, PWM output on Disable, PWM outputs, PWM Dead Time Clocks,
63 * Taps Enabled. All these features are only available in TCPWM Version 2.
64 * * Multiple Components can be synchronized together for applications.
65 * such as three phase motor control.
66 * * Two programmable trigger outputs, trig_out0 and trig_out1 that generate a
67 * trigger on one of the following events Overflow, Underflow, Terminal Count,
68 * Compare Match 0/1, and PWM output. The available triggers are dependent on the PWM mode.
69 * All these features are only available in TCPWM Version 2.
70 * * Overflow, Underflow, and Compare(cc_match) trigger outputs are only available in TCPWM Version 1.
71 * * Second Compare Match (CC_MATCH1) event is only available in TCPWM Version 2.
72 *
73 * \section group_tcpwm_pwm_configuration Configuration Considerations
74 *
75 * The PWM configuration can be divided to number of sequential
76 * steps listed below:
77 * * \ref group_tcpwm_pwm_config
78 * * \ref group_tcpwm_pwm_clock
79 * * \ref group_tcpwm_pwm_enable
80 * * \ref group_tcpwm_pwm_start
81 *
82 * \subsection group_tcpwm_pwm_config Configure PWM
83 * To configure PWM, provide the configuration parameters in the
84 * \ref cy_stc_tcpwm_pwm_config_t structure. The Configuration structure
85 * can be modified through software, but if the configurator in ModusToolbox is used
86 * then the configuration structure will be updated with the users input. To initialize
87 * the driver, call \ref Cy_TCPWM_PWM_Init function providing a pointer to the populated
88 * \ref cy_stc_tcpwm_pwm_config_t structure.
89 *
90 * For TCPWM V1 Configuration
91 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_V1_PWM_Init
92 *
93 * For TCPWM V2 Configuration
94 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_V2_PWM_Init
95 *
96 * \subsection group_tcpwm_pwm_clock Assign Clock Divider
97 * The clock source must be connected to proper working.
98 * Any of the peripheral clock dividers could be used. Use the
99 * \ref group_sysclk driver API to do that.
100 *
101 * \subsection group_tcpwm_pwm_enable Enable PWM
102 * PWM has to be enabled before starting
103 *
104 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_Enable
105 *
106 * \subsection group_tcpwm_pwm_start Start PWM
107 * PWM has to be started
108 *
109 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_Start
110 * \{
111 */
112 
113 /**
114 * \defgroup group_tcpwm_macros_pwm          Macros
115 * \defgroup group_tcpwm_functions_pwm       Functions
116 * \defgroup group_tcpwm_data_structures_pwm Data Structures
117 * \} */
118 
119 /**
120 * \addtogroup group_tcpwm_data_structures_pwm
121 * \{
122 */
123 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
124 /** Group Dithering  */
125 typedef enum
126 {
127     CY_TCPWM_GROUP_DITHERING_DISABLE        = 0UL,   /**< Group dithering is disabled */
128     CY_TCPWM_GROUP_DITHERING_PERIOD         = 1UL,   /**< Group dithering is set to period */
129     CY_TCPWM_GROUP_DITHERING_DUTY           = 2UL,   /**< Group dithering is set to duty */
130     CY_TCPWM_GROUP_DITHERING_PERIOD_DUTY    = 3UL,   /**< Group dithering is set to period and duty */
131 } cy_en_group_dithering_t;
132 
133 /** Group dithering limiter values */
134 typedef enum
135 {
136     CY_GROUP_DITHERING_LIMITER_0           = 0UL,   /**< Group dithering limiter value 0. */
137     CY_GROUP_DITHERING_LIMITER_1           = 1UL,   /**< Group dithering limiter value 1. */
138     CY_GROUP_DITHERING_LIMITER_2           = 2UL,   /**< Group dithering limiter value 2. */
139     CY_GROUP_DITHERING_LIMITER_3           = 3UL,   /**< Group dithering limiter value 3. */
140     CY_GROUP_DITHERING_LIMITER_4           = 4UL,   /**< Group dithering limiter value 4. */
141     CY_GROUP_DITHERING_LIMITER_5           = 5UL,   /**< Group dithering limiter value 5. */
142     CY_GROUP_DITHERING_LIMITER_6           = 6UL,   /**< Group dithering limiter value 6. */
143     CY_GROUP_DITHERING_LIMITER_7           = 7UL,   /**< Group dithering limiter value 7. */
144 } cy_en_dithering_limiter_t;
145 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
146 /** PWM configuration structure */
147 typedef struct cy_stc_tcpwm_pwm_config
148 {
149     uint32_t    pwmMode;            /**< Sets the PWM mode. See \ref group_tcpwm_pwm_modes */
150     /** Sets the clock prescaler inside the TCWPM block. See \ref group_tcpwm_pwm_clk_prescalers */
151     uint32_t     clockPrescaler;
152     uint32_t    pwmAlignment;       /**< Sets the PWM alignment. See \ref group_tcpwm_pwm_alignment */
153     uint32_t    deadTimeClocks;     /**< The number of dead time-clocks if PWM with dead time is chosen */
154     uint32_t    runMode;            /**< Sets the PWM run mode. See \ref group_tcpwm_pwm_run_modes */
155     uint32_t    period0;            /**< Sets the period0 of the pwm */
156     uint32_t    period1;            /**< Sets the period1 of the pwm */
157     bool        enablePeriodSwap;   /**< Enables swapping of period 0 and period 1 on terminal count */
158     uint32_t    compare0;           /**< Sets the value for Compare 0 */
159     uint32_t    compare1;           /**< Sets the value for the buffered Compare 0 */
160     bool        enableCompareSwap;  /**< If enabled, the compare values are swapped on the terminal count */
161     /** Enables an interrupt on the terminal count, capture or compare. See \ref group_tcpwm_interrupt_sources */
162     uint32_t    interruptSources;
163     /** Inverts the PWM output. This field also defines the state of the PWM output while PWM is enabled, but not running. */
164     uint32_t    invertPWMOut;
165     /** Inverts the PWM_n output. This field also defines the state of the PWM_n output while PWM is enabled, but not running. */
166     uint32_t    invertPWMOutN;
167     uint32_t    killMode;           /**< Configures the PWM kill modes. See \ref group_tcpwm_pwm_kill_modes */
168     uint32_t    swapInputMode;      /**< Configures how the swap input behaves. See \ref group_tcpwm_input_modes */
169     /** Selects which input the swap uses. Inputs are device-specific. See \ref group_tcpwm_input_selection */
170     uint32_t    swapInput;
171     uint32_t    reloadInputMode;    /**< Configures how the reload input behaves. See \ref group_tcpwm_input_modes */
172     /** Selects which input the reload uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */
173     uint32_t    reloadInput;
174     uint32_t    startInputMode;     /**< Configures how the start input behaves. See \ref group_tcpwm_input_modes */
175     /** Selects which input the start uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */
176     uint32_t    startInput;
177     uint32_t    killInputMode;      /**< Configures how the kill input behaves. See \ref group_tcpwm_input_modes */
178     /** Selects which input the kill uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */
179     uint32_t    killInput;
180     uint32_t    countInputMode;     /**< Configures how the count input behaves. See \ref group_tcpwm_input_modes */
181     /** Selects which input the count uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */
182     uint32_t    countInput;
183     /** If enabled, line output is set on underflow and cleared on overflow. This configuration is available only in center and asymmetric alignment modes. */
184     bool        swapOverflowUnderflow;
185 #if (CY_IP_MXTCPWM_VERSION >= 2U)
186     bool        immediateKill;      /**< Specifies whether the kill event immediately deactivates the dt_line_out and dt_line_compl_out or with the next module clock */
187     uint32_t    tapsEnabled;        /**< In pseudo random mode sets the enabled taps */
188     uint32_t    compare2;           /**< Sets the value for Compare1  */
189     uint32_t    compare3;           /**< Sets the value for the buffered Compare1 */
190     bool        enableCompare1Swap; /**< If enabled, the compare1 values are swapped on the terminal count */
191     bool        compare0MatchUp;    /**< Enables/Disables the compare match 0 event generation when counting up in CNT_UPDN1/2 mode */
192     bool        compare0MatchDown;  /**< Enables/Disables the compare match 0 event generation when counting down in CNT_UPDN1/2 mode */
193     bool        compare1MatchUp;    /**< Enables/Disables the compare match 1 event generation when counting up in CNT_UPDN1/2 mode */
194     bool        compare1MatchDown;  /**< Enables/Disables the compare match 1 event generation when counting down in CNT_UPDN1/2 mode */
195     uint32_t    kill1InputMode;     /**< Configures how the kill 1 input behaves. See \ref group_tcpwm_input_modes */
196     uint32_t    kill1Input;         /**< Selects which input the kill 1 uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */
197     uint32_t    pwmOnDisable;       /**< Specifies the behavior of the PWM outputs line_out and line_compl_out while the TCPWM counter is disabled */
198     uint32_t    trigger0Event;      /**< Configures which internal event generates on output trigger 0*/
199     uint32_t    trigger1Event;        /**< Configures which internal event generates on output trigger 1*/
200 #endif /* (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN) */
201 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
202     bool        buffer_swap_enable; /**< Configures swapping mechanism between CC0 and buffered CC0, CC1 and buffered CC1, PERIOD and buffered PERIOD, DT and buffered DT  */
203     cy_en_group_dithering_t dithering_mode; /**< Dithering mode is group specific configuration and will be applicable if the group supports dithering */
204 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
205 }cy_stc_tcpwm_pwm_config_t;
206 /** \} group_tcpwm_data_structures_pwm */
207 
208 /**
209 * \addtogroup group_tcpwm_macros_pwm
210 * \{
211 * \defgroup group_tcpwm_pwm_run_modes PWM run modes
212 * \{
213 * Run modes for the pwm timer.
214 */
215 #define CY_TCPWM_PWM_ONESHOT            (1U)    /**< Counter runs once and then stops */
216 #define CY_TCPWM_PWM_CONTINUOUS         (0U)    /**< Counter runs forever */
217 /** \} group_tcpwm_pwm_run_modes */
218 
219 /** \defgroup group_tcpwm_pwm_modes PWM modes
220 * \{
221 * Sets the PWM modes.
222 */
223 #define CY_TCPWM_PWM_MODE_PWM           (4U) /**< Standard PWM Mode*/
224 #define CY_TCPWM_PWM_MODE_DEADTIME      (5U)    /**< PWM with deadtime mode*/
225 #define CY_TCPWM_PWM_MODE_PSEUDORANDOM  (6U)    /**< Pseudo Random PWM */
226 /** \} group_tcpwm_pwm_modes */
227 
228 /** \defgroup group_tcpwm_pwm_alignment PWM Alignment
229 * Sets the alignment of the PWM.
230 * \{
231 */
232 #define CY_TCPWM_PWM_LEFT_ALIGN                         (0U)     /**< PWM is left aligned, meaning it starts high */
233 #define CY_TCPWM_PWM_RIGHT_ALIGN                        (1U)        /**< PWM is right aligned, meaning it starts low */
234 /** PWM is centered aligned, terminal count only occurs on underflow */
235 #define CY_TCPWM_PWM_CENTER_ALIGN                       (2U)
236 /** PWM is asymmetrically aligned, terminal count occurs on overflow and underflow */
237 #define CY_TCPWM_PWM_ASYMMETRIC_ALIGN                   (3U)
238 #define CY_TCPWM_PWM_ASYMMETRIC_CC0_CC1_ALIGN           (4U) /**< PWM is asymmetrically aligned, line pulse period is equal to CC1-CC0 */
239 #define CY_TCPWM_PWM_CENTER_ASYMMETRIC_CC0_CC1_ALIGN    (5U) /**< PWM is asymmetrically aligned, TBD */
240 /** \} group_tcpwm_pwm_alignment */
241 
242 /** \defgroup group_tcpwm_pwm_kill_modes PWM kill modes
243 * Sets the kill mode for the PWM.
244 * \{
245 */
246 #define CY_TCPWM_PWM_STOP_ON_KILL       (2U)    /**< PWM stops counting on kill */
247 #define CY_TCPWM_PWM_SYNCH_KILL         (1U)    /**< PWM output is killed after next TC*/
248 #define CY_TCPWM_PWM_ASYNC_KILL         (0U)    /**< PWM output is killed instantly */
249 /** \} group_tcpwm_pwm_kill_modes */
250 
251 /** \defgroup group_tcpwm_pwm_output_on_disable PWM Disabled Output
252 * Specifies the behavior of the PWM outputs while PWM is disabled.
253 * \{
254 */
255 #define    CY_TCPWM_PWM_OUTPUT_HIGHZ    (0U)    /**< PWM output (default) high impedance */
256 #define    CY_TCPWM_PWM_OUTPUT_RETAIN   (1U)    /**< PWM outputs are retained */
257 #define    CY_TCPWM_PWM_OUTPUT_LOW      (2U)    /**< PWM output LOW */
258 #define    CY_TCPWM_PWM_OUTPUT_HIGH     (3U)    /**< PWM output HIGH */
259 /** \} group_tcpwm_pwm_output_on_disable */
260 
261 /** \defgroup group_tcpwm_pwm_output_line PWM Output Lines
262 * Specifies the PWM output line.
263 * \{
264 */
265 #define    CY_TCPWM_PWM_LINE_PWM        (0U)    /**< PWM Line output */
266 #define    CY_TCPWM_PWM_LINE_PWM_INV    (1U)    /**< PWM Line output compliment */
267 /** \} group_tcpwm_pwm_output_line */
268 
269 /** \defgroup group_tcpwm_pwm_clk_prescalers PWM CLK Prescaler values
270 * \{
271 * Clock prescaler values.
272 */
273 #define CY_TCPWM_PWM_PRESCALER_DIVBY_1      (0U) /**< Divide by 1 */
274 #define CY_TCPWM_PWM_PRESCALER_DIVBY_2      (1U) /**< Divide by 2 */
275 #define CY_TCPWM_PWM_PRESCALER_DIVBY_4      (2U) /**< Divide by 4 */
276 #define CY_TCPWM_PWM_PRESCALER_DIVBY_8      (3U) /**< Divide by 8 */
277 #define CY_TCPWM_PWM_PRESCALER_DIVBY_16     (4U) /**< Divide by 16 */
278 #define CY_TCPWM_PWM_PRESCALER_DIVBY_32     (5U) /**< Divide by 32 */
279 #define CY_TCPWM_PWM_PRESCALER_DIVBY_64     (6U) /**< Divide by 64 */
280 #define CY_TCPWM_PWM_PRESCALER_DIVBY_128    (7U) /**< Divide by 128 */
281 /** \} group_tcpwm_pwm_clk_prescalers */
282 
283 /** \defgroup group_tcpwm_pwm_output_invert PWM output invert
284 * \{
285 * Output invert modes.
286 */
287 #define CY_TCPWM_PWM_INVERT_ENABLE          (1U)  /**< Invert the output mode */
288 #define CY_TCPWM_PWM_INVERT_DISABLE         (0U)  /**< Do not invert the output mode */
289 /** \} group_tcpwm_pwm_output_invert */
290 
291 /** \defgroup group_tcpwm_pwm_status PWM Status
292 * \{
293 * The counter status.
294 */
295 #define CY_TCPWM_PWM_STATUS_DOWN_COUNTING   (0x1UL)        /**< PWM is down counting */
296 #define CY_TCPWM_PWM_STATUS_UP_COUNTING     (0x2UL)        /**< PWM is up counting */
297 #define CY_TCPWM_PWM_STATUS_COUNTER_RUNNING (0x80000000UL) /**< PWM counter is running */
298 /** \} group_tcpwm_pwm_status */
299 /** \} group_tcpwm_macros_pwm */
300 
301 
302 /*******************************************************************************
303 * Backward compatibility macro. The following code is DEPRECATED and must
304 * not be used in new projects
305 *******************************************************************************/
306 
307 #define Cy_TCPWM_PWM_SetCompare0        Cy_TCPWM_PWM_SetCompare0Val
308 #define Cy_TCPWM_PWM_GetCompare0        Cy_TCPWM_PWM_GetCompare0Val
309 #define Cy_TCPWM_PWM_SetCompare1        Cy_TCPWM_PWM_SetCompare0BufVal
310 #define Cy_TCPWM_PWM_GetCompare1        Cy_TCPWM_PWM_GetCompare0BufVal
311 #define Cy_TCPWM_PWM_EnableCompareSwap  Cy_TCPWM_PWM_EnableCompare0Swap
312 
313 
314 /***************************************
315 *        Registers Constants
316 ***************************************/
317 
318 /** \cond INTERNAL */
319 #define CY_TCPWM_PWM_CTRL_SYNC_KILL_OR_STOP_ON_KILL_POS  (2U)
320 #define CY_TCPWM_PWM_CTRL_SYNC_KILL_OR_STOP_ON_KILL_MASK (0x3UL << CY_TCPWM_PWM_CTRL_SYNC_KILL_OR_STOP_ON_KILL_POS)
321 
322 #define CY_TCPWM_PWM_TR_CTRL2_SET           (0UL) /**< Set define for PWM output signal configuration */
323 #define CY_TCPWM_PWM_TR_CTRL2_CLEAR         (1UL) /**< Clear define for PWM output signal configuration */
324 #define CY_TCPWM_PWM_TR_CTRL2_INVERT        (2UL) /**< Invert define for PWM output signal configuration */
325 #define CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE     (3UL) /**< No change define for PWM output signal configuration */
326 
327 #if (CY_IP_MXTCPWM_VERSION == 1U)
328 /** The configuration of PWM output signal in Pseudo Random Mode */
329 #define CY_TCPWM_PWM_MODE_PR         (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
330                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
331                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE))
332 
333 /** The configuration of PWM output signal for Left alignment */
334 #define CY_TCPWM_PWM_MODE_LEFT       (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
335                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
336                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE))
337 
338 /** The configuration of PWM output signal for Right alignment */
339 #define CY_TCPWM_PWM_MODE_RIGHT      (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
340                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
341                                       _VAL2FLD(TCPWM_CNT_TR_CTRL2_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
342 
343 /** The configuration of PWM output signal for Center and Asymmetric alignment */
344 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_INVERT) | \
345                                          _VAL2FLD(TCPWM_CNT_TR_CTRL2_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
346                                          _VAL2FLD(TCPWM_CNT_TR_CTRL2_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
347 
348 /** The configuration of PWM output signal for Center and Asymmetric alignment with swapped underflow and overflow setting */
349 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_INVERT) | \
350                                          _VAL2FLD(TCPWM_CNT_TR_CTRL2_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
351                                          _VAL2FLD(TCPWM_CNT_TR_CTRL2_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET))
352 
353 #else
354 
355 /** The configuration of PWM output signal in Pseudo Random Mode */
356 #define CY_TCPWM_PWM_MODE_PR         (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
357                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
358                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE))
359 
360 /** The configuration of PWM output signal for Left alignment */
361 #define CY_TCPWM_PWM_MODE_LEFT       (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
362                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
363                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE))
364 
365 /** The configuration of PWM output signal for Right alignment */
366 #define CY_TCPWM_PWM_MODE_RIGHT      (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
367                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE) | \
368                                       _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
369 
370 /** The configuration of PWM output signal for Center and Asymmetric alignment */
371 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_INVERT) | \
372                                          _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
373                                          _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
374 
375 /** The configuration of PWM output signal for Center and Asymmetric alignment with swapped underflow and overflow setting */
376 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_INVERT) | \
377                                          _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
378                                          _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET))
379 
380 /** The configuration of PWM output signal to ignore CC1 match event */
381 #define CY_TCPWM_PWM_MODE_CC1_IGNORE   (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC1_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE))
382 
383 /** The configuration of PWM output signal for Asymmetric with cc0 and cc1 mode (tcpwm_ver2 only)*/
384 #define CY_TCPWM_PWM_MODE_ASYMM_CC0_CC1    (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
385                                             _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
386                                             _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
387                                             _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC1_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
388 
389 /** The configuration of PWM output signal for Center Align Asymmetric with cc0 and cc1 mode (tcpwm_ver2 only)*/
390 #define CY_TCPWM_PWM_MODE_CNTR_ASYMM_CC0_CC1   (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
391                                                 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \
392                                                 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \
393                                                 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC1_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR))
394 
395 #define CY_TCPWM_PWM_MODE_CNTR_ASYMM_CC0_CC1_MATCH    ((TCPWM_GRP_CNT_V2_CTRL_CC0_MATCH_UP_EN_Msk) | \
396                                                        (TCPWM_GRP_CNT_V2_CTRL_CC1_MATCH_DOWN_EN_Msk))
397 #endif
398 /** \endcond */
399 
400 
401 /*******************************************************************************
402 *        Function Prototypes
403 *******************************************************************************/
404 
405 /**
406 * \addtogroup group_tcpwm_functions_pwm
407 * \{
408 */
409 
410 cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_pwm_config_t const *config);
411 void Cy_TCPWM_PWM_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_pwm_config_t const *config);
412 __STATIC_INLINE void Cy_TCPWM_PWM_Enable(TCPWM_Type *base, uint32_t cntNum);
413 __STATIC_INLINE void Cy_TCPWM_PWM_Disable(TCPWM_Type *base, uint32_t cntNum);
414 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetStatus(TCPWM_Type const *base, uint32_t cntNum);
415 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare0Val(TCPWM_Type *base, uint32_t cntNum, uint32_t compare0);
416 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare0Val(TCPWM_Type const *base, uint32_t cntNum);
417 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare0BufVal(TCPWM_Type *base, uint32_t cntNum, uint32_t compareBuf0);
418 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare0BufVal(TCPWM_Type const *base, uint32_t cntNum);
419 __STATIC_INLINE void Cy_TCPWM_PWM_EnableCompare0Swap(TCPWM_Type *base, uint32_t cntNum, bool enable);
420 __STATIC_INLINE void Cy_TCPWM_PWM_SetCounter(TCPWM_Type *base, uint32_t cntNum, uint32_t count);
421 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCounter(TCPWM_Type const *base, uint32_t cntNum);
422 __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod0(TCPWM_Type *base, uint32_t cntNum, uint32_t period0);
423 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod0(TCPWM_Type const *base, uint32_t cntNum);
424 __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod1(TCPWM_Type *base, uint32_t cntNum, uint32_t period1);
425 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod1(TCPWM_Type const *base, uint32_t cntNum);
426 __STATIC_INLINE void Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type *base, uint32_t cntNum, bool enable);
427 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
428 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetDtCounter (TCPWM_Type const *base, uint32_t cntNum);
429 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_LineOutStatus (TCPWM_Type const *base, uint32_t cntNum, uint32_t pwmOutSelect);
430 #endif
431 __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTime (TCPWM_Type const *base, uint32_t cntNum, uint32_t deadTime);
432 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
433 __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTimeN (TCPWM_Type const *base, uint32_t cntNum, uint32_t deadTime);
434 #endif
435 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
436 __STATIC_INLINE void Cy_TCPWM_PWM_EnableSwap(TCPWM_Type *base, uint32_t cntNum,  bool enable);
437 cy_en_tcpwm_status_t Cy_TCPWM_Configure_Dithering_Values_and_Mode(TCPWM_Type *base, uint32_t cntNum, cy_en_group_dithering_t mode, uint8_t period, uint8_t duty, cy_en_dithering_limiter_t limiter);
438 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
439 /*******************************************************************************
440 * Function Name: Cy_TCPWM_PWM_Enable
441 ****************************************************************************//**
442 *
443 * Enables the counter in the TCPWM block for the PWM operation.
444 *
445 * \param base
446 * The pointer to a TCPWM instance.
447 *
448 * \param cntNum
449 * The Counter instance number in the selected TCPWM.
450 *
451 * \funcusage
452 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_V1_PWM_Init
453 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_V2_PWM_Init
454 *
455 *******************************************************************************/
Cy_TCPWM_PWM_Enable(TCPWM_Type * base,uint32_t cntNum)456 __STATIC_INLINE void Cy_TCPWM_PWM_Enable(TCPWM_Type *base, uint32_t cntNum)
457 {
458     Cy_TCPWM_Enable_Single(base, cntNum);
459 }
460 
461 /*******************************************************************************
462 * Function Name: Cy_TCPWM_PWM_Disable
463 ****************************************************************************//**
464 *
465 * Disables the counter in the TCPWM block.
466 *
467 * \note This function sets connected PWM output pins Drive modes to High-Z state.
468 * To disable PWM without changing pins drive modes, use the
469 * \ref Cy_TCPWM_TriggerStopOrKill or \ref Cy_TCPWM_TriggerStopOrKill_Single
470 * function.
471 *
472 * \param base
473 * The pointer to a TCPWM instance.
474 *
475 * \param cntNum
476 * The Counter instance number in the selected TCPWM.
477 *
478 * \funcusage
479 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_DeInit
480 *
481 *******************************************************************************/
Cy_TCPWM_PWM_Disable(TCPWM_Type * base,uint32_t cntNum)482 __STATIC_INLINE void Cy_TCPWM_PWM_Disable(TCPWM_Type *base, uint32_t cntNum)
483 {
484     Cy_TCPWM_Disable_Single(base, cntNum);
485 }
486 
487 
488 /*******************************************************************************
489 * Function Name: Cy_TCPWM_PWM_GetStatus
490 ****************************************************************************//**
491 *
492 * Returns the status of the PWM whether it is running or not. In case the
493 * PWM is running, status will also provide information on counting up/down. This
494 * is useful when the PWM Alignment mode set to Center/Asymmetric Alignments.
495 *
496 * \param base
497 * The pointer to a TCPWM instance.
498 *
499 * \param cntNum
500 * The Counter instance number in the selected TCPWM.
501 *
502 * \return
503 * The status. See \ref group_tcpwm_pwm_status
504 *
505 * \funcusage
506 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_GetStatus
507 *
508 *******************************************************************************/
Cy_TCPWM_PWM_GetStatus(TCPWM_Type const * base,uint32_t cntNum)509 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetStatus(TCPWM_Type const *base, uint32_t cntNum)
510 {
511     uint32_t status;
512 
513 #if (CY_IP_MXTCPWM_VERSION == 1U)
514 
515         status = TCPWM_CNT_STATUS(base, cntNum);
516 
517         /* Generates proper up counting status, does not generated by HW */
518         status &= ~CY_TCPWM_PWM_STATUS_UP_COUNTING;
519         status |= ((~status & CY_TCPWM_PWM_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) <<
520                    CY_TCPWM_CNT_STATUS_UP_POS);
521 #else
522         status = TCPWM_GRP_CNT_STATUS(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
523 
524         /* Generates proper up counting status, does not generated by HW */
525         status &= ~CY_TCPWM_PWM_STATUS_UP_COUNTING;
526         status |= ((~status & CY_TCPWM_PWM_STATUS_DOWN_COUNTING & (status >> TCPWM_GRP_CNT_V2_STATUS_RUNNING_Pos)) <<
527                    CY_TCPWM_CNT_STATUS_UP_POS);
528 
529         /* Set TCPWM_CNT_STATUS_RUNNING_Pos with TCPWM_GRP_CNT_V2_STATUS_RUNNING for BWC */
530         status |= (_FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_RUNNING, status) << TCPWM_CNT_STATUS_RUNNING_Pos);
531 #endif
532 
533     return(status);
534 }
535 
536 
537 /*******************************************************************************
538 * Function Name: Cy_TCPWM_PWM_SetCompare0Val
539 ****************************************************************************//**
540 *
541 * Sets the compare value for Compare 0 when the compare mode enabled.
542 *
543 * \param base
544 * The pointer to a TCPWM instance.
545 *
546 * \param cntNum
547 * The Counter instance number in the selected TCPWM.
548 *
549 * \param compare0
550 * The Compare 0 value.
551 *
552 * \funcusage
553 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetCompare0Val
554 *
555 *******************************************************************************/
Cy_TCPWM_PWM_SetCompare0Val(TCPWM_Type * base,uint32_t cntNum,uint32_t compare0)556 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare0Val(TCPWM_Type *base, uint32_t cntNum,  uint32_t compare0)
557 {
558     Cy_TCPWM_Block_SetCC0Val(base, cntNum, compare0);
559 }
560 
561 
562 /*******************************************************************************
563 * Function Name: Cy_TCPWM_PWM_GetCompare0Val
564 ****************************************************************************//**
565 *
566 * Returns compare 0 value.
567 *
568 * \param base
569 * The pointer to a TCPWM instance.
570 *
571 * \param cntNum
572 * The Counter instance number in the selected TCPWM.
573 *
574 * \return
575 * Compare 0 value.
576 *
577 * \funcusage
578 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetCompare0Val
579 *
580 *******************************************************************************/
Cy_TCPWM_PWM_GetCompare0Val(TCPWM_Type const * base,uint32_t cntNum)581 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare0Val(TCPWM_Type const *base, uint32_t cntNum)
582 {
583     return Cy_TCPWM_Block_GetCC0Val(base, cntNum);
584 }
585 
586 
587 /*******************************************************************************
588 * Function Name: Cy_TCPWM_PWM_SetCompare0BufVal
589 ****************************************************************************//**
590 *
591 * Sets the buffered compare value for Compare 0 when the compare mode enabled.
592 *
593 * \param base
594 * The pointer to a TCPWM instance.
595 *
596 * \param cntNum
597 * The Counter instance number in the selected TCPWM.
598 *
599 * \param compareBuf0
600 * The buffered Compare 0 value.
601 *
602 * \funcusage
603 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetCompare0BufVal
604 *
605 *******************************************************************************/
Cy_TCPWM_PWM_SetCompare0BufVal(TCPWM_Type * base,uint32_t cntNum,uint32_t compareBuf0)606 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare0BufVal(TCPWM_Type *base, uint32_t cntNum,  uint32_t compareBuf0)
607 {
608     Cy_TCPWM_Block_SetCC0BufVal(base, cntNum, compareBuf0);
609 }
610 
611 
612 /*******************************************************************************
613 * Function Name: Cy_TCPWM_PWM_GetCompare0BufVal
614 ****************************************************************************//**
615 *
616 * Returns the buffered compare 0 value.
617 *
618 * \param base
619 * The pointer to a TCPWM instance.
620 *
621 * \param cntNum
622 * The Counter instance number in the selected TCPWM.
623 *
624 * \return
625 * Buffered compare 0 value.
626 *
627 * \funcusage
628 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetCompare0BufVal
629 *
630 *******************************************************************************/
Cy_TCPWM_PWM_GetCompare0BufVal(TCPWM_Type const * base,uint32_t cntNum)631 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare0BufVal(TCPWM_Type const *base, uint32_t cntNum)
632 {
633     return Cy_TCPWM_Block_GetCC0BufVal(base, cntNum);
634 }
635 
636 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
637 /*******************************************************************************
638 * Function Name: Cy_TCPWM_PWM_SetCompare1Val
639 ****************************************************************************//**
640 *
641 * Sets the compare value for Compare 1 when the compare mode enabled.
642 *
643 * \param base
644 * The pointer to a TCPWM instance.
645 *
646 * \param cntNum
647 * The Counter instance number in the selected TCPWM.
648 *
649 * \param compare1
650 * The Compare1 value.
651 *
652 *******************************************************************************/
Cy_TCPWM_PWM_SetCompare1Val(TCPWM_Type * base,uint32_t cntNum,uint32_t compare1)653 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare1Val(TCPWM_Type *base, uint32_t cntNum,  uint32_t compare1)
654 {
655     Cy_TCPWM_Block_SetCC1Val(base, cntNum, compare1);
656 }
657 
658 
659 /*******************************************************************************
660 * Function Name: Cy_TCPWM_PWM_GetCompare1Val
661 ****************************************************************************//**
662 *
663 * Returns compare 1 value.
664 *
665 * \param base
666 * The pointer to a TCPWM instance.
667 *
668 * \param cntNum
669 * The Counter instance number in the selected TCPWM.
670 *
671 * \return
672 * Compare 1 value.
673 *
674 *******************************************************************************/
Cy_TCPWM_PWM_GetCompare1Val(TCPWM_Type const * base,uint32_t cntNum)675 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare1Val(TCPWM_Type const *base, uint32_t cntNum)
676 {
677     return Cy_TCPWM_Block_GetCC1Val(base, cntNum);
678 }
679 
680 
681 /*******************************************************************************
682 * Function Name: Cy_TCPWM_PWM_SetCompare1BufVal
683 ****************************************************************************//**
684 *
685 * Sets the buffered compare value for Compare1 when the compare mode enabled.
686 *
687 * \param base
688 * The pointer to a TCPWM instance.
689 *
690 * \param cntNum
691 * The Counter instance number in the selected TCPWM.
692 *
693 * \param compareBuf1
694 * The buffered Compare 1 value.
695 *
696 *
697 *******************************************************************************/
Cy_TCPWM_PWM_SetCompare1BufVal(TCPWM_Type * base,uint32_t cntNum,uint32_t compareBuf1)698 __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare1BufVal(TCPWM_Type *base, uint32_t cntNum,  uint32_t compareBuf1)
699 {
700     Cy_TCPWM_Block_SetCC1BufVal(base, cntNum, compareBuf1);
701 }
702 
703 
704 /*******************************************************************************
705 * Function Name: Cy_TCPWM_PWM_GetCompare1BufVal
706 ****************************************************************************//**
707 *
708 * Returns the buffered compare 1 value.
709 *
710 * \param base
711 * The pointer to a TCPWM instance.
712 *
713 * \param cntNum
714 * The Counter instance number in the selected TCPWM.
715 *
716 * \return
717 * Buffered compare 1 value.
718 *
719 *******************************************************************************/
Cy_TCPWM_PWM_GetCompare1BufVal(TCPWM_Type const * base,uint32_t cntNum)720 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare1BufVal(TCPWM_Type const *base, uint32_t cntNum)
721 {
722     return Cy_TCPWM_Block_GetCC1BufVal(base, cntNum);
723 }
724 #endif
725 /*******************************************************************************
726 * Function Name: Cy_TCPWM_PWM_EnableCompare0Swap
727 ****************************************************************************//**
728 *
729 * Enables the comparison swap of compare 0 and compareBuf 0 on OV and/or UN,
730 * depending on the PWM alignment.
731 *
732 * \param base
733 * The pointer to a TCPWM instance.
734 *
735 * \param cntNum
736 * The Counter instance number in the selected TCPWM.
737 *
738 * \param enable
739 * true = swap enabled; false = swap disabled
740 *
741 * \funcusage
742 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_EnableCompare0Swap
743 *
744 *******************************************************************************/
Cy_TCPWM_PWM_EnableCompare0Swap(TCPWM_Type * base,uint32_t cntNum,bool enable)745 __STATIC_INLINE void Cy_TCPWM_PWM_EnableCompare0Swap(TCPWM_Type *base, uint32_t cntNum,  bool enable)
746 {
747      Cy_TCPWM_Block_EnableCompare0Swap(base, cntNum, enable);
748 }
749 
750 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
751 /*******************************************************************************
752 * Function Name: Cy_TCPWM_PWM_EnableCompare1Swap
753 ****************************************************************************//**
754 *
755 * Enables the comparison swap of compare1 and compareBuf1 on OV and/or UN,
756 * depending on the PWM alignment.
757 *
758 * \param base
759 * The pointer to a TCPWM instance.
760 *
761 * \param cntNum
762 * The Counter instance number in the selected TCPWM.
763 *
764 * \param enable
765 * true = swap enabled; false = swap disabled
766 *
767 *******************************************************************************/
Cy_TCPWM_PWM_EnableCompare1Swap(TCPWM_Type * base,uint32_t cntNum,bool enable)768 __STATIC_INLINE void Cy_TCPWM_PWM_EnableCompare1Swap(TCPWM_Type *base, uint32_t cntNum,  bool enable)
769 {
770     Cy_TCPWM_Block_EnableCompare1Swap(base, cntNum, enable);
771 }
772 #endif
773 
774 /*******************************************************************************
775 * Function Name: Cy_TCPWM_PWM_SetCounter
776 ****************************************************************************//**
777 *
778 * Sets the value of the counter.
779 *
780 * \param base
781 * The pointer to a TCPWM instance.
782 *
783 * \param cntNum
784 * The Counter instance number in the selected TCPWM.
785 *
786 * \param count
787 * The value to write into the counter.
788 *
789 * \funcusage
790 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetCounter
791 *
792 *******************************************************************************/
Cy_TCPWM_PWM_SetCounter(TCPWM_Type * base,uint32_t cntNum,uint32_t count)793 __STATIC_INLINE void Cy_TCPWM_PWM_SetCounter(TCPWM_Type *base, uint32_t cntNum,  uint32_t count)
794 {
795     Cy_TCPWM_Block_SetCounter(base, cntNum, count);
796 }
797 
798 
799 /*******************************************************************************
800 * Function Name: Cy_TCPWM_PWM_GetCounter
801 ****************************************************************************//**
802 *
803 * Returns the value in the counter.
804 *
805 * \param base
806 * The pointer to a TCPWM instance.
807 *
808 * \param cntNum
809 * The Counter instance number in the selected TCPWM.
810 *
811 * \return
812 * The current counter value.
813 *
814 * \funcusage
815 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_GetCounter
816 *
817 *******************************************************************************/
Cy_TCPWM_PWM_GetCounter(TCPWM_Type const * base,uint32_t cntNum)818 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCounter(TCPWM_Type const *base, uint32_t cntNum)
819 {
820     return Cy_TCPWM_Block_GetCounter(base, cntNum);
821 }
822 
823 
824 /*******************************************************************************
825 * Function Name: Cy_TCPWM_PWM_SetPeriod0
826 ****************************************************************************//**
827 *
828 * Sets the value of the period register.
829 *
830 * \param base
831 * The pointer to a TCPWM instance.
832 *
833 * \param cntNum
834 * The Counter instance number in the selected TCPWM.
835 *
836 * \param period0
837 * The value to write into a period.
838 *
839 * \funcusage
840 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetPeriod0
841 *
842 *******************************************************************************/
Cy_TCPWM_PWM_SetPeriod0(TCPWM_Type * base,uint32_t cntNum,uint32_t period0)843 __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod0(TCPWM_Type *base, uint32_t cntNum,  uint32_t period0)
844 {
845     Cy_TCPWM_Block_SetPeriod(base, cntNum, period0);
846 }
847 
848 
849 /*******************************************************************************
850 * Function Name: Cy_TCPWM_PWM_GetPeriod0
851 ****************************************************************************//**
852 *
853 * Returns the value in the period register.
854 *
855 * \param base
856 * The pointer to a TCPWM instance.
857 *
858 * \param cntNum
859 * The Counter instance number in the selected TCPWM.
860 *
861 * \return
862 * The current period value.
863 *
864 * \funcusage
865 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetPeriod0
866 *
867 *******************************************************************************/
Cy_TCPWM_PWM_GetPeriod0(TCPWM_Type const * base,uint32_t cntNum)868 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod0(TCPWM_Type const *base, uint32_t cntNum)
869 {
870     return Cy_TCPWM_Block_GetPeriod(base, cntNum);
871 }
872 
873 
874 /*******************************************************************************
875 * Function Name: Cy_TCPWM_PWM_SetPeriod1
876 ****************************************************************************//**
877 *
878 * Sets the value of the period register. In pseudo random mode period 1 sets
879 * which taps are enabled.
880 *
881 * \param base
882 * The pointer to a TCPWM instance.
883 *
884 * \param cntNum
885 * The Counter instance number in the selected TCPWM.
886 *
887 * \param period1
888 * The value to write into a period 1.
889 *
890 * \funcusage
891 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetPeriod1
892 *
893 *******************************************************************************/
Cy_TCPWM_PWM_SetPeriod1(TCPWM_Type * base,uint32_t cntNum,uint32_t period1)894 __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod1(TCPWM_Type *base, uint32_t cntNum,  uint32_t period1)
895 {
896 #if (CY_IP_MXTCPWM_VERSION == 1U)
897 
898         TCPWM_CNT_PERIOD_BUFF(base, cntNum) = period1;
899 #else
900         TCPWM_GRP_CNT_PERIOD_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = period1;
901 #endif
902 }
903 
904 
905 /*******************************************************************************
906 * Function Name: Cy_TCPWM_PWM_GetPeriod1
907 ****************************************************************************//**
908 *
909 * Returns the value in the period register.
910 *
911 * \param base
912 * The pointer to a COUNTER PWM instance.
913 *
914 * \param cntNum
915 * The Counter instance number in the selected TCPWM.
916 *
917 * \return
918 * The current period value.
919 *
920 * \funcusage
921 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_SetPeriod1
922 *
923 *******************************************************************************/
Cy_TCPWM_PWM_GetPeriod1(TCPWM_Type const * base,uint32_t cntNum)924 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod1(TCPWM_Type const *base, uint32_t cntNum)
925 {
926     uint32_t result;
927 
928 #if (CY_IP_MXTCPWM_VERSION == 1U)
929 
930         result = TCPWM_CNT_PERIOD_BUFF(base, cntNum);
931 #else
932         result = TCPWM_GRP_CNT_PERIOD_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
933 #endif
934 
935     return result;
936 }
937 
938 
939 /*******************************************************************************
940 * Function Name: Cy_TCPWM_PWM_EnablePeriodSwap
941 ****************************************************************************//**
942 *
943 * Enables a period swap on OV and/or UN, depending on the PWM alignment
944 *
945 * \param base
946 * The pointer to a TCPWM instance.
947 *
948 * \param cntNum
949 * The Counter instance number in the selected TCPWM.
950 *
951 * \param enable
952 * true = swap enabled; false = swap disabled
953 *
954 * \funcusage
955 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_EnablePeriodSwap
956 *
957 *******************************************************************************/
Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type * base,uint32_t cntNum,bool enable)958 __STATIC_INLINE void Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type *base, uint32_t cntNum,  bool enable)
959 {
960 #if (CY_IP_MXTCPWM_VERSION == 1U)
961 
962         if (enable)
963         {
964             TCPWM_CNT_CTRL(base, cntNum) |=  TCPWM_CNT_CTRL_AUTO_RELOAD_PERIOD_Msk;
965         }
966         else
967         {
968             TCPWM_CNT_CTRL(base, cntNum) &= ~TCPWM_CNT_CTRL_AUTO_RELOAD_PERIOD_Msk;
969         }
970 #else
971         if (enable)
972         {
973             TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |=
974                                      TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_PERIOD_Msk;
975         }
976         else
977         {
978             TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) &=
979                                     ~TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_PERIOD_Msk;
980         }
981 #endif
982 }
983 
984 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
985 /*******************************************************************************
986 * Function Name: Cy_TCPWM_PWM_GetDtCounter
987 ****************************************************************************//**
988 *
989 * Returns the dead time count when the PWM is configured in dead time mode
990 *
991 * \param base
992 * The pointer to a TCPWM instance.
993 *
994 * \param cntNum
995 * The Counter instance number in the selected TCPWM.
996 *
997 * \return
998 * The dead time counter.
999 *
1000 * \funcusage
1001 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_GetDtCounter
1002 *
1003 * \note supported only in TCPWM_ver2
1004 *
1005 *******************************************************************************/
Cy_TCPWM_PWM_GetDtCounter(TCPWM_Type const * base,uint32_t cntNum)1006 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetDtCounter (TCPWM_Type const *base, uint32_t cntNum)
1007 {
1008     uint32_t result = 0UL;
1009 
1010     result = TCPWM_GRP_CNT_STATUS(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1011     result = (result & (TCPWM_GRP_CNT_V2_STATUS_DT_CNT_L_Msk | TCPWM_GRP_CNT_V2_STATUS_DT_CNT_H_Msk)) >> TCPWM_GRP_CNT_V2_STATUS_DT_CNT_L_Pos;
1012 
1013     return result;
1014 }
1015 
1016 /*******************************************************************************
1017 * Function Name: Cy_TCPWM_PWM_LineOutStatus
1018 ****************************************************************************//**
1019 *
1020 * Returns the current level of the selected pwm output line.
1021 *
1022 * \param base
1023 * The pointer to a TCPWM instance.
1024 *
1025 * \param cntNum
1026 * The Counter instance number in the selected TCPWM.
1027 *
1028 * \param pwmOutSelect
1029 * Defines which pwm output line is being checked pwm or pwm_n.
1030 *
1031 * \return
1032 * The current pwm output line level.
1033 *
1034 * \funcusage
1035 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_LineOutStatus
1036 *
1037 * \note supported only in TCPWM_ver2
1038 *
1039 *******************************************************************************/
Cy_TCPWM_PWM_LineOutStatus(TCPWM_Type const * base,uint32_t cntNum,uint32_t pwmOutSelect)1040 __STATIC_INLINE uint32_t Cy_TCPWM_PWM_LineOutStatus (TCPWM_Type const *base, uint32_t cntNum, uint32_t pwmOutSelect)
1041 {
1042     uint32_t status = 0UL;
1043 
1044 
1045     status = TCPWM_GRP_CNT_STATUS(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1046 
1047      switch(pwmOutSelect)
1048      {
1049          case CY_TCPWM_PWM_LINE_PWM:
1050              status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_LINE_OUT, status);
1051              break;
1052          case CY_TCPWM_PWM_LINE_PWM_INV:
1053              status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_LINE_COMPL_OUT, status);
1054              break;
1055          default:
1056              /* Not a Valid Line output */
1057              CY_ASSERT_L3(false);
1058              break;
1059     }
1060 
1061     return status;
1062 }
1063 #endif
1064 
1065 /*******************************************************************************
1066 * Function Name: Cy_TCPWM_PWM_PWMDeadTime
1067 ****************************************************************************//**
1068 *
1069 * Writes the dead time value for PWM. This is the number of clock cycles between
1070 * PWM_n (line_compl) going LOW and PWM (line) going HIGH.
1071 *
1072 * \param base
1073 * The pointer to a TCPWM instance.
1074 *
1075 * \param cntNum
1076 * The Counter instance number in the selected TCPWM.
1077 *
1078 * \param deadTime
1079 * The dead time value.
1080 *
1081 * \funcusage
1082 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_PWMDeadTime
1083 *
1084 *******************************************************************************/
Cy_TCPWM_PWM_PWMDeadTime(TCPWM_Type const * base,uint32_t cntNum,uint32_t deadTime)1085 __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTime (TCPWM_Type const *base, uint32_t cntNum, uint32_t deadTime)
1086 {
1087     uint32_t result;
1088 
1089 #if (CY_IP_MXTCPWM_VERSION == 1U)
1090 
1091         result = TCPWM_CNT_CTRL(base, cntNum);
1092         result &= ~(TCPWM_CNT_CTRL_GENERIC_Msk);
1093 
1094         TCPWM_CNT_CTRL(base, cntNum) = result | _VAL2FLD(TCPWM_CNT_CTRL_GENERIC, deadTime);
1095 #else
1096         uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
1097 
1098         result = TCPWM_GRP_CNT_DT(base, grp, cntNum);
1099         result &= ~(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_L_Msk | TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_H_Msk);
1100 
1101         TCPWM_GRP_CNT_DT(base, grp, cntNum) = result |
1102                     _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_L, (uint8_t)(deadTime)) |
1103                     _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_H, (uint8_t)(deadTime >> 8U));
1104 #endif
1105 
1106 }
1107 
1108 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
1109 /*******************************************************************************
1110 * Function Name: Cy_TCPWM_PWM_PWMDeadTimeN
1111 ****************************************************************************//**
1112 *
1113 * Writes the dead time value for PWM_n. This is the number of clock cycles between
1114 * PWM (line) going LOW and PWM_n (line_compl) going HIGH.
1115 *
1116 * \param base
1117 * The pointer to a TCPWM instance.
1118 *
1119 * \param cntNum
1120 * The Counter instance number in the selected TCPWM.
1121 *
1122 * \param deadTime
1123 * The dead time value.
1124 *
1125 * \funcusage
1126 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_PWM_PWMDeadTime
1127 *
1128 *******************************************************************************/
Cy_TCPWM_PWM_PWMDeadTimeN(TCPWM_Type const * base,uint32_t cntNum,uint32_t deadTime)1129 __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTimeN (TCPWM_Type const *base, uint32_t cntNum, uint32_t deadTime)
1130 {
1131     uint32_t result;
1132     uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
1133 
1134     result = TCPWM_GRP_CNT_DT(base, grp, cntNum);
1135     result &= ~(TCPWM_GRP_CNT_V2_DT_DT_LINE_COMPL_OUT_Msk);
1136 
1137     TCPWM_GRP_CNT_DT(base, grp, cntNum) = result |
1138             _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_COMPL_OUT, (uint16_t)(deadTime));
1139 
1140 }
1141 #endif
1142 
1143 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
1144 /*******************************************************************************
1145 * Function Name: Cy_TCPWM_Counter_EnableSwap
1146 ****************************************************************************//**
1147 *
1148 * Enables/disables swapping mechanism between CC0 and buffered CC0, CC1 and buffered CC1, PERIOD and buffered PERIOD, DT and buffered DT.
1149 *
1150 * \param base
1151 * The pointer to a TCPWM instance.
1152 *
1153 * \param cntNum
1154 * The Counter instance number in the selected TCPWM.
1155 *
1156 * \param enable
1157 * true = swap enabled; false = swap disabled
1158 *
1159 *
1160 *******************************************************************************/
Cy_TCPWM_PWM_EnableSwap(TCPWM_Type * base,uint32_t cntNum,bool enable)1161 __STATIC_INLINE void Cy_TCPWM_PWM_EnableSwap(TCPWM_Type *base, uint32_t cntNum,  bool enable)
1162 {
1163     Cy_TCPWM_Block_EnableSwap(base, cntNum, enable);
1164 }
1165 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) */
1166 
1167 /** \} group_tcpwm_functions_pwm */
1168 
1169 /** \} group_tcpwm_pwm */
1170 
1171 #if defined(__cplusplus)
1172 }
1173 #endif
1174 
1175 #endif /* CY_IP_MXTCPWM */
1176 
1177 #endif /* CY_TCPWM_PWM_H */
1178 
1179 /* [] END OF FILE */
1180