1 /***************************************************************************//** 2 * \file cy_syspm.h 3 * \version 5.94 4 * 5 * Provides the function definitions for the power management API. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * SPDX-License-Identifier: Apache-2.0 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 *******************************************************************************/ 26 27 /** 28 * \addtogroup group_syspm 29 * \{ 30 * \defgroup group_syspm_pdcm PDCM (Power Dependency Control Matrix) 31 * \defgroup group_syspm_ppu PPU (Power Policy Unit) 32 * \defgroup group_syspm_btss BTSS Host API(Bluetooth Sub System Host API) 33 * \} */ 34 35 /** 36 * \addtogroup group_syspm 37 * \{ 38 * 39 * Use the System Power Management (SysPm) driver to change power modes and 40 * reduce system power consumption in power sensitive designs. 41 * 42 * The functions and other declarations used in this driver are in cy_syspm.h. 43 * You can include cy_pdl.h to get access to all functions 44 * and declarations in the PDL. 45 * 46 * For multi-CPU devices, this library allows you to individually enter low power 47 * modes for each CPU. 48 * 49 * This document contains the following topics: 50 * 51 * * \ref group_syspm_power_modes 52 * * \ref group_syspm_system_power_modes 53 * - \ref group_syspm_switching_into_ulp 54 * - \ref group_syspm_ulp_limitations 55 * - \ref group_syspm_switching_into_lp 56 * - \ref group_syspm_lp_limitations 57 * - \ref group_syspm_switching_into_sleep 58 * - \ref group_syspm_switching_into_lpactivelpsleep 59 * - \ref group_syspm_switching_into_deepsleep 60 * - \ref group_syspm_switching_into_deepsleep-ram 61 * - \ref group_syspm_switching_into_deepsleep-off 62 * - \ref group_syspm_wakingup_from_sleep_deepsleep 63 * - \ref group_syspm_switching_into_hibernate 64 * - \ref group_syspm_wakingup_from_hibernate 65 * * \ref group_syspm_system_reg_curr_mode 66 * - \ref group_syspm_system_set_min_reg_curr_mode 67 * - \ref group_syspm_system_set_normal_reg_curr_mode 68 * * \ref group_syspm_migration_guide_for_syspm_4_0 69 * * \ref group_syspm_managing_pmic 70 * * \ref group_syspm_managing_backup_domain 71 * * \ref group_syspm_cb 72 * - \ref group_syspm_cb_example 73 * - \ref group_syspm_cb_config_consideration 74 * - \ref group_syspm_cb_parameters 75 * - \ref group_syspm_cb_structures 76 * - \ref group_syspm_cb_function_implementation 77 * - \ref group_syspm_cb_flow 78 * - \ref group_syspm_cb_registering 79 * - \ref group_syspm_cb_unregistering 80 * * \ref group_syspm_definitions 81 * 82 * \section group_syspm_section_configuration Configuration Considerations 83 * \subsection group_syspm_power_modes Power Modes 84 * 85 * <b>A) CAT1A Architecture</b>: 86 * 87 * 1) PSoC 6 MCUs support four system and three CPU power modes. 88 * These power modes are intended to minimize average power consumption 89 * in an application. 90 * 91 * System power modes: 92 * * <b>Low Power</b> - All peripheral and CPU power modes 93 * are available to be used at maximum device frequency and current 94 * consumption. 95 * * <b>Ultra Low Power</b> - All peripheral and 96 * CPU power modes are available, but the frequency and current consumption 97 * are limited to a device specific number. 98 * * <b>Deep Sleep</b> - Device and I/O states is retained. Low-frequency 99 * peripherals are available. Both CPUs are in CPU Deep Sleep power mode. 100 * * <b>Hibernate</b> - The device and I/O states are frozen and the device 101 * resets on wakeup. 102 * 103 * CPU power modes(standard ARM defined power modes, supported by 104 * the ARM CPUs and ISA): 105 * 106 * * <b>Active</b> 107 * * <b>Sleep</b> 108 * * <b>Deep Sleep</b> 109 * 110 * <b>B) CAT1B Architecture</b>: 111 * 112 * 1) CAT1B devices supports below Power Modes: 113 * 114 * * <b>ACTIVE, SLEEP </b> - standard ARM defined power modes, supported by 115 * the ARM CPUs and ISA. 116 * * <b>LPACTIVE/LPSLEEP</b> - are low power profiles implemented as register 117 * configurations within ACTIVE/SLEEP modes. 118 * * <b>DEEPSLEEP </b> - a lower power mode where high-frequency clocks are 119 * disabled. Most register state is retained and the platform supports saving 120 * a configurable amount of SRAM state. 121 * * <b>DEEPSLEEP-RAM </b> - a lower mode than DEEPSLEEP that keeps DeepSleep 122 * peripherals running, but on wakeup the CPU (and most peripherals) go 123 * through a reset. A configurable amount of system RAM is retained. 124 * * <b>DEEPSLEEP-OFF </b> - similar to DEEPSLEEP-RAM but does not retain 125 * system RAM. 126 * * <b>HIBERNATE </b> - is an even lower power mode than DEEPSLEEP-OFF, but 127 * on wakeup the CPU (and almost all peripherals) go through a full reset. 128 * DeepSleep peripherals do not operate in HIBERNATE. 129 * * <b>XRES </b> - occurs when an external reset is applied, either XRES or 130 * alternate XRES (AXRES). It is also considered a power mode with a current 131 * target spec. 132 * * <b>OFF </b> - state simply represents the state of the part with no power 133 * applied to it. 134 * 135 * CAT1B adopts the <b>ARM Power Control Architecture</b>.Below are 136 * key changes in the power system: 137 * 138 * * CAT1B supports three flavors of DEEPSLEEP: the original one, and two new 139 * ones called DEEPSLEEP-RAM and DEEPSLEEP-OFF. 140 * * SRSS implements an ARM Power Policy Unit (PPU) that provides the software 141 * interface to power mode control for VCCACT_PD.The PPU interacts with a 142 * Power Control State Machine (PSCM) that interfaces with the core SRSS 143 * to enter/exit DEEPSLEEP*. 144 * * SRSS implements a Power Dependency Control Matrix (PDCM) that allows hardware 145 * and software to specify dependencies between power domains. 146 * 147 * <b>C) CAT1C Architecture</b>: 148 * 149 * 1) CAT1C MCU's can operate in different power modes that are intended to minimize 150 * the average power consumption in an application. The power modes supported by 151 * CATC devices in the order of decreasing power consumption are: 152 * * <b>ACTIVE </b> - all peripherals are available 153 * * <b>Low-Power Active (LPACTIVE) profile </b>- Low-power profile of Active mode where 154 * all peripherals including the CPU are available, but with limited capability 155 * * <b>SLEEP </b> - all peripherals except the CPU are available 156 * * <b>Low-Power Sleep (LPSLEEP) profile </b>- Low-power profile of Sleep mode where 157 * all peripherals except the CPU are available, but with limited capability 158 * * <b>DEEPSLEEP </b>- only low-frequency peripherals are available 159 * * <b>HIBERNATE </b>- the device and I/O states are frozen and the device resets on wakeup 160 * * <b>XRES </b>- the device enters this state when the XRES_L pin is asserted 161 * 162 * Active, Sleep, and DeepSleep are standard Arm-defined power modes supported by 163 * the Arm CPUs and Instruction Set Architecture (ISA). 164 * LPACTIVE and LPSLEEP are similar to Active and Sleep modes, respectively; however, 165 * the high-current components are either frequency or current limited or turned off. 166 * Hibernate mode and XRES state are the lowest power mode/state that the CATC devices 167 * can be in. 168 * 169 * \subsection group_syspm_system_power_modes System Power Modes 170 * * <b>LP</b> - In this mode, code is executed and all logic and 171 * memories are powered. Firmware may disable/reduce clocks for specific 172 * peripherals and power down specific analog power domains. 173 * 174 * * <b>ULP</b> - This power mode is like LP mode, but 175 * with clock restrictions and limited/slower peripherals to achieve lower 176 * current consumption. Refer to \ref group_syspm_switching_into_ulp in 177 * Configuration considerations. 178 * 179 * * <b>LPACTIVE/LPSLEEP</b> - low power profiles implemented as register 180 * configurations within ACTIVE/SLEEP modes.Refer to 181 * \ref group_syspm_switching_into_lpactivelpsleep in Configuration considerations. 182 * 183 * * <b>DEEPSLEEP</b> - Is a lower power mode where high-frequency clocks are 184 * disabled. Refer to \ref group_syspm_switching_into_deepsleep in 185 * Configuration considerations. Deep-sleep-capable peripherals are available. 186 * A normal wakeup from Deep Sleep returns to either system LP or ULP mode, 187 * depending on the previous state and programmed behavior for the configured 188 * wakeup interrupt. Likewise, a debug wakes up from system Deep Sleep and 189 * woken CPU returns to CPU Sleep. Refer 190 * to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 191 * considerations. 192 * 193 * * <b>DEEPSLEEP-RAM</b> - a lower mode than DEEPSLEEP that keeps DeepSleep 194 * peripherals running, but on wakeup the CPU (and most peripherals) go through 195 * a reset. A configurable amount of system RAM is retained.Refer to 196 * \ref group_syspm_switching_into_deepsleep-ram in Configuration considerations. 197 * Refer to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 198 * considerations. 199 * 200 * * <b>DEEPSLEEP-OFF</b> - similar to DEEPSLEEP-RAM but does not retain system RAM. 201 * Refer to \ref group_syspm_switching_into_deepsleep-off in Configuration considerations. 202 * Refer to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 203 * considerations. 204 * 205 * * <b>Hibernate</b> - Is the lowest power mode that is entered from 206 * firmware. Refer to \ref group_syspm_switching_into_hibernate in 207 * Configuration considerations. On wakeup the CPU(s) and all peripherals 208 * go through a full reset. The I/O's state is frozen so that the 209 * output driver state is held in system Hibernate. Note that in this mode, 210 * the CPU(s) and all peripherals lose their states, so the system and firmware 211 * reboot on a wakeup event. Backup memory (if present) can be used to store 212 * limited system state for use on the next reboot. Refer to 213 * \ref group_syspm_wakingup_from_hibernate in Configuration considerations. 214 * 215 * \warning * Above is list of all the System Power modes in general, a device 216 * support subset of the above System Power modes.Please refer to TRM for more information. 217 * 218 * \subsubsection group_syspm_switching_into_lp Switching the System into Low Power 219 * To set system LP mode you need to set LP voltage for the active core 220 * regulator: 221 * * If active core regulator is the LDO, call: 222 * \code{.c} 223 * Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP); 224 * \endcode 225 * * If active core regulator is the Buck, call: 226 * \code{.c} 227 * Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP) 228 * \endcode 229 * 230 * After switching into system LP mode, the operating frequency and current 231 * consumption may now be increased up to \ref group_syspm_lp_limitations. 232 * The wait states for flash may be changed to increase device performance by 233 * calling SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where 234 * hfClkFreqMz is the frequency of HfClk0 in MHz. 235 * 236 * \subsubsection group_syspm_lp_limitations LP Limitations 237 * When the system is in LP mode, the core regulator voltage is set to 238 * <b>1.1 V (nominal)</b> and the following limitations must be met: 239 * 240 * - The maximum operating frequency for all Clk_HF paths must not exceed 241 * <b>150 MHz*</b>, and peripheral and slow clock must 242 * not exceed <b>100 MHz *</b> 243 * 244 * - The total current consumption must be less than or equal to 245 * <b>250 mA *</b> 246 * 247 * \warning * - Numbers shown are approximate and real limit values may be 248 * different because they are device specific. You should refer to the device 249 * datasheet for exact values of maximum frequency and current in system LP mode. 250 * 251 * \subsubsection group_syspm_switching_into_ulp Switching the System into Ultra Low Power 252 * Before switching into system ULP mode, ensure that the device meets 253 * \ref group_syspm_ulp_limitations. Decrease the clock frequencies, 254 * and slow or disable peripherals. Also ensure that appropriate wait state 255 * values are set for the flash. Flash wait states can be set by calling 256 * SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where hfClkFreqMz 257 * is the frequency of HfClk0 in MHz. 258 * 259 * After the \ref group_syspm_ulp_limitations are met and appropriate wait 260 * states are set, you must set ULP voltage for the active core regulator: 261 * * If active core regulator is the LDO Core Voltage Regulator, call 262 * Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_ULP) 263 * * If active core regulator is the Buck Core Voltage Regulator, then call 264 * Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_ULP) 265 * 266 * \subsubsection group_syspm_ulp_limitations ULP Limitations 267 * When the system is in ULP mode the core regulator voltage is set to <b>0.9 V 268 * (nominal)</b> and the following limitations must be meet: 269 * 270 * - The maximum operating frequency for all Clk_HF paths must not exceed 271 * <b>50 MHz *</b>, whereas the peripheral and slow clock must not exceed 272 * <b>25 MHz *</b>. 273 * 274 * - The total current consumption must be less than or equal 275 * to <b>20 mA*</b> 276 * 277 * - the flash write operations are prohibited. The flash works in the 278 * Read-only operation. If Write operations are required, you must switch to 279 * the system LP mode. 280 * 281 * \warning * - Numbers shown are approximate and real limit values may be 282 * different because they are device specific. You should refer to the device 283 * datasheet for exact values of maximum frequency and current in system 284 * ULP mode. 285 * 286 * \subsubsection group_syspm_switching_into_lpactivelpsleep Switching the System into LPACTIVE/LPSLEEP 287 * Call Cy_SysPm_SystemLpActiveEnter() to enter LPACTIVE/LPSLEEP mode and 288 * Cy_SysPm_SystemLpActiveExit() to exit. 289 * 290 * \subsubsection group_syspm_switching_into_sleep Switching CPU into Sleep 291 * For multi-CPU devices, the Cy_SysPm_CpuEnterSleep() switches only the CPU 292 * that calls the function into the CPU Sleep power mode. 293 * 294 * All pending interrupts must be cleared before the CPU is put into a 295 * Sleep mode, even if they are masked. 296 * 297 * The CPU event register can be set in the past, for example, as a result of 298 * internal system calls. So an old event can cause the CPU to not enter 299 * Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or 300 * polling loop as it might or might not cause entering of CPU Sleep mode. If 301 * the idle loop or polling loop is not used, then it is recommended to use 302 * WFI() instruction. 303 * 304 * \subsubsection group_syspm_switching_into_deepsleep Switching the System or CPU into Deep Sleep 305 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 306 * only the CPU that calls the function into the CPU Deep Sleep power mode. 307 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 308 * the Cy_SysPm_CpuEnterDeepSleep() function. 309 * 310 * \warning * For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 311 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 312 * function. 313 * 314 * \subsubsection group_syspm_switching_into_deepsleep-ram Switching the System or CPU into Deep Sleep-RAM 315 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 316 * only the CPU that calls the function into the CPU DEEPSLEEP-RAM power mode. 317 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 318 * the Cy_SysPm_CpuEnterDeepSleep() function. 319 * 320 * \warning * For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 321 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 322 * function. 323 * 324 * \subsubsection group_syspm_switching_into_deepsleep-off Switching the System or CPU into Deep Sleep-OFF 325 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 326 * only the CPU that calls the function into the CPU DEEPSLEEP-OFF power mode. 327 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 328 * the Cy_SysPm_CpuEnterDeepSleep() function. 329 * 330 * Note:- For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 331 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 332 * function. 333 * 334 * There are situations when the system does not switch into the Deep Sleep 335 * power mode immediately after the last CPU calls Cy_SysPm_CpuEnterDeepSleep(). 336 * The system will switch into Deep Sleep mode automatically a short time later, 337 * after the low power circuits are ready to switch into Deep Sleep. Refer to 338 * the Cy_SysPm_CpuEnterDeepSleep() description for more detail. 339 * 340 * All pending interrupts must be cleared before the system is put into a 341 * Deep Sleep mode, even if they are masked. 342 * 343 * The CPU event register can be set in the past, for example, as a result of 344 * internal system calls. So an old event can cause the CPU to not enter Deep 345 * Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or 346 * polling loop as it might or might not cause entering of CPU Deep Sleep mode. 347 * If the idle loop or polling loop is not used, then it is recommended to use 348 * WFI() instruction. 349 * 350 * For single-CPU devices, SysPm functions that return the status of the 351 * unsupported CPU always return CY_SYSPM_STATUS_<CPU>_DEEPSLEEP. 352 * 353 * \subsubsection group_syspm_wakingup_from_sleep_deepsleep Waking Up from Sleep or Deep Sleep 354 * For Arm-based devices, an interrupt is required for the CPU to wake up. 355 * For multi-CPU devices, one CPU can wake up the other CPU by sending the 356 * event instruction. Use the Cy_SysPm_CpuSendWakeupEvent() function. 357 * 358 * \subsubsection group_syspm_switching_into_hibernate Switching System to Hibernate 359 * If you call Cy_SysPm_SystemEnterHibernate() from either CPU, the system will 360 * be switched into the Hibernate power mode directly, because there is no 361 * handshake between CPUs. 362 * 363 * \subsubsection group_syspm_wakingup_from_hibernate Waking Up from Hibernate 364 * 365 * The system can wake up from Hibernate mode by configuring the following wakeup 366 * sources: 367 * - Wakeup pin 368 * - LP Comparator 369 * - RTC alarm 370 * - WDT interrupt 371 * 372 * Wakeup is supported from device specific pin(s) with programmable polarity. 373 * Additionally, unregulated peripherals can wake the system under some 374 * conditions. For example, a low power comparator can wake the system by 375 * comparing two external voltages, but does not support comparison to an 376 * internally-generated voltage. The backup power domain remains functional, and 377 * if present it can schedule an alarm to wake the system from Hibernate using 378 * the RTC. Alternatively, the Watchdog Timer (WDT) can be configured to wake-up 379 * the system by WDT interrupt. Refer to \ref Cy_SysPm_SetHibernateWakeupSource() 380 * for more detail. 381 * 382 * \subsection group_syspm_system_reg_curr_mode System Regulator Current Mode 383 * In addition to system ULP and LP modes, the five different resource 384 * power settings can be configured to reduce current consumption: 385 * -# <b>Linear regulator low power mode</b>. Can be used only if core current 386 * is below the LDO regulator LP threshold. 387 * -# <b>POR/BOD circuit low power mode</b>. Requires compatible power supply 388 * stability due to stability increase response time. 389 * -# <b>Bandgap reference circuits low power mode</b> (turns on Deep Sleep 390 * Bandgap). Requires design to accept reduced Vref accuracy. Active ref can 391 * be turned off after this feature is enabled. 392 * -# <b>Reference buffer circuit low power mode</b>. Requires design to accept 393 * reduced Vref accuracy. 394 * -# <b>Current reference circuit low power mode</b>. Require design to accept 395 * reduced Iref accuracy. 396 * 397 * These five sub features can modify both system LP or ULP modes as they are 398 * independent from LP/ULP settings. 399 * When all five sub features are set to their low power modes, the system 400 * operates in regulator minimum current mode. In regulator minimum current mode, 401 * the system current consumption is limited to a device-specific value. Refer to 402 * the device datasheet for the exact current consumption value in regulator 403 * minimum current mode. 404 * 405 * When all five sub features are set to their normal mode, the system operates 406 * in regulator normal current mode. When regulator normal current mode is set, 407 * the system may operate at device maximum current. 408 * 409 * \subsection group_syspm_system_set_min_reg_curr_mode Setting Minimum System Regulator Current Mode 410 * 411 * Before setting the regulator minimum current mode ensure that current limits 412 * are be met. After current limits are met, call the 413 * Cy_SysPm_SystemSetMinRegulatorCurrent() function. 414 * 415 * \subsection group_syspm_system_set_normal_reg_curr_mode Setting Normal System Regulator Current Mode 416 * 417 * To set regulator normal current mode, call the 418 * Cy_SysPm_SystemSetNormalRegulatorCurrent() function. After the function call, 419 * the current limits can be increased to a maximum current, depending on what 420 * system power mode is set: LP or ULP. 421 * 422 * \subsection group_syspm_managing_pmic Managing PMIC 423 * 424 * The SysPm driver also provides an API to configure the internal power 425 * management integrated circuit (PMIC) controller for an external PMIC that 426 * supplies Vddd. Use the API to enable the internal PMIC controller output that 427 * is routed to pmic_wakeup_out pin, and configure the polarity of the PMIC 428 * controller input (pmic_wakeup_in) that is used to wake up the PMIC. 429 * 430 * The PMIC controller is automatically enabled when: 431 * * The PMIC is locked by a call to Cy_SysPm_PmicLock() 432 * * The configured polarity of the PMIC input and the polarity driven to 433 * pmic_wakeup_in pin matches. 434 * 435 * Because a call to Cy_SysPm_PmicLock() automatically enables the PMIC 436 * controller, the PMIC can remain disabled only when it is unlocked. See Cy_SysPm_PmicUnlock() 437 * for more detail. 438 * 439 * Use Cy_SysPm_PmicIsLocked() to read the current PMIC lock status. 440 * 441 * To enable the PMIC, use these functions in this order: 442 * \code{.c} 443 * Cy_SysPm_PmicUnlock(); 444 * Cy_SysPm_PmicEnable(); 445 * Cy_SysPm_PmicLock(); 446 * \endcode 447 * 448 * To disable the PMIC controller, unlock the PMIC. Then call 449 * Cy_SysPm_PmicDisable() with the inverted value of the current active state of 450 * the pmic_wakeup_in pin. 451 * For example, assume the current state of the pmic_wakeup_in pin is active low. 452 * To disable the PMIC controller, call these functions in this order: 453 * \code{.c} 454 * Cy_SysPm_PmicUnlock(); 455 * Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_HIGH); 456 * \endcode 457 * Note that you do not call Cy_SysPm_PmicLock(), because that automatically 458 * enables the PMIC. 459 * 460 * While disabled, the PMIC controller is automatically enabled when the 461 * pmic_wakeup_in pin state is changed into a high state. 462 * 463 * To disable the PMIC controller output, call these functions in this order: 464 * Cy_SysPm_PmicUnlock(); 465 * Cy_SysPm_PmicDisableOutput(); 466 * 467 * Do not call Cy_SysPm_PmicLock() (which automatically enables the PMIC 468 * controller output). 469 * 470 * When disabled, the PMIC controller output is enabled when the PMIC is locked, 471 * or by calling Cy_SysPm_PmicEnableOutput(). 472 * 473 * \subsection group_syspm_managing_backup_domain Managing the Backup Domain 474 * The SysPm driver provide functions to: 475 * 476 * * Configure Supercapacitor charging 477 * * Select power supply source (Vbackup or Vddd) for Vddbackup 478 * * Measure Vddbackup using the ADC 479 * 480 * Refer to the \ref group_syspm_functions_backup functions for more detail. 481 * 482 * \subsection group_syspm_cb SysPm Callbacks 483 * The SysPm driver handles low power callbacks declared in the application. 484 * 485 * If there are no callbacks registered, the device executes the power mode 486 * transition. However, frequently your application firmware must make 487 * modifications for low power mode. For example, you may need to disable a 488 * peripheral, or ensure that a message is not being transmitted or received. 489 * 490 * To enable this, the SysPm driver implements a callback mechanism. When a lower 491 * power mode transition is about to take place (either entering or exiting 492 * \ref group_syspm_system_power_modes), the registered callbacks for that 493 * transition are called. 494 * 495 * The SysPm driver organizes all the callbacks into a linked list. While 496 * entering a low power mode, SysPm goes through that linked list from first to 497 * last, executing the callbacks one after another. While exiting low power mode, 498 * SysPm goes through that linked list again, but in the opposite direction from 499 * last to first. This ordering supports prioritization of callbacks relative to 500 * the transition event. 501 * 502 * For example, the picture below shows three callback structures organized into 503 * a linked list: myDeepSleep1, myDeepSleep2, myDeepSleep3 (represented with the 504 * \ref cy_stc_syspm_callback_t configuration structure). Each structure 505 * contains, among other fields, the address of the callback function. The code 506 * snippets below set this up so that myDeepSleep1 is called first when entering 507 * the low power mode. This also means that myDeepSleep1 will be the last one to 508 * execute when exiting the low power mode. 509 * 510 * The callback structures after registration: 511 * \image html syspm_register_eq.png 512 * 513 * Your application must register each callback, so that SysPm can execute it. 514 * Upon registration, the linked list is built by the SysPm driver. Notice 515 * the &myDeepSleep1 address in the myDeepSleep1 516 * \ref cy_stc_syspm_callback_t structure. This is filled in by the SysPm driver, 517 * when you register myDeepSleep1. The cy_stc_syspm_callback_t.order element 518 * defines the order of their execution by the SysPm driver. 519 * Call \ref Cy_SysPm_RegisterCallback() to register each callback function. 520 * 521 * A callback function is typically associated with a particular driver that 522 * handles the peripheral. So the callback mechanism enables a peripheral to 523 * prepare for a low power mode (for instance, shutting down the analog part); 524 * or to perform tasks while exiting a low power mode (like enabling the analog 525 * part again). 526 * 527 * With the callback mechanism you can prevent switching into a low power mode if 528 * a peripheral is not ready. For example, driver X is in the process of 529 * receiving a message. In the callback function implementation simply return 530 * CY_SYSPM_FAIL in a response to CY_SYSPM_CHECK_READY. 531 * 532 * If success is returned while executing a callback, the SysPm driver calls the 533 * next callback and so on to the end of the list. If at some point a callback 534 * returns CY_SYSPM_FAIL in response to the CY_SYSPM_CHECK_READY step, all the 535 * callbacks that have already executed are executed in reverse order, with the 536 * CY_SYSPM_CHECK_FAIL mode parameter. This allows each callback to know that 537 * entering the low power mode has failed. The callback can then undo whatever it 538 * did to prepare for low power mode, if required. For example, if the driver X 539 * callback shut down the analog part, it can re-enable the analog part. 540 * 541 * Let's switch to an example explaining the implementation, setup, and 542 * registration of three callbacks (myDeepSleep1, myDeepSleep2, myDeepSleep2) in 543 * the application. The \ref group_syspm_cb_config_consideration are provided 544 * after the \ref group_syspm_cb_example. 545 * 546 * \subsection group_syspm_cb_example SysPm Callbacks Example 547 * 548 * The following code snippets demonstrate how use the SysPm callbacks mechanism. 549 * We will build the prototype for an application that registers 550 * three callback functions: 551 * -# myDeepSleep1 - Handles CPU Deep Sleep. 552 * -# myDeepSleep2 - Handles CPU Deep Sleep and is associated with peripheral 553 * HW1_address (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> 554 * section to learn about the base hardware address). 555 * -# myDeepSleep3 - Handles entering and exiting system Deep Sleep and is 556 * associated with peripheral HW2_address. 557 * 558 * We set things up so that the myDeepSleep1 and myDeepSleep2 callbacks do 559 * nothing while entering the low power mode (skip on 560 * CY_SYSPM_SKIP_BEFORE_TRANSITION - 561 * see \ref group_syspm_cb_function_implementation in 562 * \ref group_syspm_cb_config_consideration). 563 * Skipping the actions while entering low power might be useful if you need 564 * to save time while switching low power modes. This is because the callback 565 * function with a skipped mode is not even called avoiding the call and return 566 * overhead. 567 * 568 * Let's first declare the callback functions. Each gets the pointer to the 569 * \ref cy_stc_syspm_callback_params_t structure as the argument. 570 * 571 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Declaration 572 * 573 * Now we setup the \ref cy_stc_syspm_callback_params_t structures that we will 574 * pass to the callback functions. Note that for the myDeepSleep2 and 575 * myDeepSleep3 callbacks we also pass pointers to the peripherals related to 576 * that callback (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> section 577 * to learn about base hardware addresses). 578 * The configuration considerations related to this structure are described 579 * in \ref group_syspm_cb_parameters in \ref group_syspm_cb_config_consideration. 580 * 581 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Params_Declaration 582 * 583 * Now we setup the actual callback configuration structures. Each of these 584 * contains, among the other fields, the address of the 585 * \ref cy_stc_syspm_callback_params_t we just set up. We will use the callback 586 * configuration structures later in the code to register the callbacks in the 587 * SysPm driver. Again, we set things up so that the myDeepSleep1 and 588 * myDeepSleep2 callbacks do nothing while entering the low power mode 589 * (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION) - see 590 * \ref group_syspm_cb_function_implementation in 591 * \ref group_syspm_cb_config_consideration. 592 * 593 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Structure_Declaration 594 * 595 * Note that in each case the last two fields are NULL. These are fields used by 596 * the SysPm driver to set up the linked list of callback functions. 597 * 598 * The callback structures are now defined and allocated in the user's 599 * memory space: 600 * \image html syspm_before_registration.png 601 * 602 * Now we implement the callback functions. See 603 * \ref group_syspm_cb_function_implementation in 604 * \ref group_syspm_cb_config_consideration for the instructions on how the 605 * callback functions should be implemented. 606 * 607 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Implementation 608 * 609 * Finally, we register the callbacks so that the SysPm driver knows about them. 610 * The order in which the callbacks will be called depends upon the order in 611 * which the callbacks are registered. If there are no callbacks registered, 612 * the device just executes the power mode transition. 613 * 614 * Callbacks that reconfigure global resources, such as clock frequencies, should 615 * be registered last. They then modify global resources as the final step before 616 * entering the low power mode, and restore those resources first, as the system 617 * returns from low power mode. 618 * 619 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 620 * 621 * We are done configuring three callbacks. Now the SysPm driver will execute the 622 * callbacks appropriately whenever there is a call to a power mode transition 623 * function: \ref Cy_SysPm_CpuEnterSleep(), \ref Cy_SysPm_CpuEnterDeepSleep(), 624 * \ref Cy_SysPm_SystemEnterUlp(), \ref Cy_SysPm_SystemEnterLp(), and 625 * \ref Cy_SysPm_SystemEnterHibernate(). 626 * \note On a wakeup from hibernate the device goes through a reset, so the 627 * callbacks with CY_SYSPM_AFTER_TRANSITION are not executed. Refer to 628 * \ref Cy_SysPm_SystemEnterHibernate() for more detail. 629 * 630 * Refer to \ref group_syspm_cb_unregistering in 631 * \ref group_syspm_cb_config_consideration to learn what to do if you need to 632 * remove the callback from the linked list. You might want to unregister the 633 * callback for debug purposes. 634 * 635 * Refer to \ref group_syspm_cb_flow in \ref group_syspm_cb_config_consideration 636 * to learn about how the SysPm processes the callbacks. 637 * 638 * \subsection group_syspm_cb_config_consideration Callback Configuration Considerations 639 * 640 * \subsubsection group_syspm_cb_parameters Callback Function Parameters 641 * 642 * The <b>callbackParams</b> parameter of the callback function is a 643 * \ref cy_stc_syspm_callback_params_t structure. The second parameter 644 * (<b>mode</b>) is for internal use. In the example code we used a 645 * dummy value CY_SYSPM_CHECK_READY to eliminate compilation errors associated 646 * with the enumeration. The driver sets the <b>mode</b> field to the correct 647 * value when calling the callback functions (the mode is referred to as step in 648 * the \ref group_syspm_cb_function_implementation). The callback function reads 649 * the value and executes code based on the mode set by the SysPm driver. 650 * The <b>base</b> and <b>context</b> fields are optional and can be NULL. 651 * Some drivers require a base hardware address and context to store information 652 * about the mode transition. If your callback routine requires access to the 653 * driver registers or context, provide those values 654 * (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> section 655 * to learn about Base Hardware Address). Be aware of MISRA warnings if these 656 * parameters are NULL. 657 * 658 * \subsubsection group_syspm_cb_structures Callback Function Structure 659 * For each callback, provide a \ref cy_stc_syspm_callback_t structure. Some 660 * fields in this structure are maintained by the driver. Use NULL for 661 * cy_stc_syspm_callback_t.prevItm and cy_stc_syspm_callback_t.nextItm. 662 * Driver uses these fields to build a linked list of callback functions. 663 * The value of cy_stc_syspm_callback_t.order element is used to define the order 664 * how the callbacks are put into linked list, and sequentially, how the 665 * callbacks are executed. See \ref group_syspm_cb_registering section. 666 * 667 * \warning The Cy_SysPm_RegisterCallback() function stores a pointer to the 668 * cy_stc_syspm_callback_t structure. Do not modify elements of the 669 * cy_stc_syspm_callback_t structure after the callback is registered. 670 * You are responsible for ensuring that the structure remains in scope. 671 * Typically the structure is declared as a global or static variable, or as a 672 * local variable in the main() function. 673 * 674 * \subsubsection group_syspm_cb_function_implementation Callback Function Implementation 675 * 676 * Every callback function should handle four possible steps (referred to as 677 * "mode") defined in \ref cy_en_syspm_callback_mode_t : 678 * * CY_SYSPM_CHECK_READY - Check if ready to enter a power mode. 679 * * CY_SYSPM_BEFORE_TRANSITION - The actions to be done before entering 680 * the low power mode. 681 * * CY_SYSPM_AFTER_TRANSITION - The actions to be done after exiting the 682 * low power mode. 683 * * CY_SYSPM_CHECK_FAIL - Roll back any actions performed in the callback 684 * executed previously with CY_SYSPM_CHECK_READY. 685 * 686 * A callback function can skip steps (see \ref group_syspm_skip_callback_modes). 687 * In our example myDeepSleep1 and myDeepSleep2 callbacks do nothing while 688 * entering the low power mode (skip on CY_SYSPM_BEFORE_TRANSITION). If there is 689 * anything preventing low power mode entry - return CY_SYSPM_FAIL in response to 690 * CY_SYSPM_CHECK_READY in your callback implementation. Note that the callback 691 * should return CY_SYSPM_FAIL only in response to CY_SYSPM_CHECK_READY. The 692 * callback function should always return CY_SYSPM_PASS for other modes: 693 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 694 * (see \ref group_syspm_cb_flow). 695 * 696 * \subsubsection group_syspm_cb_flow Callbacks Execution Flow 697 * 698 * This section explains what happens during a power transition, when callbacks 699 * are implemented and set up correctly. The following discussion assumes: 700 * * All required callback functions are defined and implemented 701 * * All cy_stc_syspm_callback_t structures are filled with required values 702 * * All callbacks are successfully registered 703 * 704 * User calls one of the power mode transition functions: \ref Cy_SysPm_CpuEnterSleep(), 705 * \ref Cy_SysPm_CpuEnterDeepSleep(), \ref Cy_SysPm_SystemEnterUlp(), 706 * \ref Cy_SysPm_SystemEnterLp(), or \ref Cy_SysPm_SystemEnterHibernate(). 707 * It calls each callback with the mode set to CY_SYSPM_CHECK_READY. This 708 * triggers execution of the code for that mode inside of each user callback. 709 * 710 * The intent of CY_SYSPM_CHECK_READY is to only signal if the resources is ready 711 * to transition. Ideally, no transition changes should be made at this time. 712 * In some cases a small change may be required. For example a communication 713 * resource callback may set a flag telling firmware not to start any new 714 * transition. 715 716 * If that process is successful for all callbacks, then 717 * \ref Cy_SysPm_ExecuteCallback() calls each callback with the mode set to 718 * CY_SYSPM_BEFORE_TRANSITION. This triggers execution of the code for that mode 719 * inside each user callback. We then enter the low power mode after all callback 720 * are executed. 721 * 722 * When exiting the low power mode, the SysPm driver executes 723 * \ref Cy_SysPm_ExecuteCallback() again. This time it calls each callback in 724 * reverse order, with the mode set to CY_SYSPM_AFTER_TRANSITION. This triggers 725 * execution of the code for that mode inside each user callback. The final 726 * execution of callbacks depends on the low power mode in which callbacks were 727 * called: 728 * * For CPU Sleep or Deep Sleep power modes, the CY_SYSPM_AFTER_TRANSITION mode 729 * is called after the CPU wakes from Sleep or Deep Sleep. 730 * * For system Hibernate, the CY_SYSPM_AFTER_TRANSITION mode is not executed 731 * because the device reboots after the wakeup from the Hibernate. 732 * * For system LP and ULP modes, after the CY_SYSPM_AFTER_TRANSITION mode was 733 * called the system remains in the new power mode: LP or ULP. 734 * 735 * A callback can return CY_SYSPM_FAIL only while executing the 736 * CY_SYSPM_CHECK_READY mode. If that happens, then the remaining callbacks are 737 * not executed. Any callbacks that have already executed are called again, in 738 * reverse order, with CY_SYSPM_CHECK_FAIL. This allows the system to return to 739 * the previous state. If a callback returns a fail then any of the functions 740 * (\ref Cy_SysPm_CpuEnterSleep(), \ref Cy_SysPm_CpuEnterDeepSleep(), 741 * \ref Cy_SysPm_SystemEnterUlp(), \ref Cy_SysPm_SystemEnterLp(), or 742 * \ref Cy_SysPm_SystemEnterHibernate()) that attempt to switch the device into 743 * a low power mode will also return CY_SYSPM_FAIL. 744 * 745 * Callbacks that reconfigure global resources, such as clock frequencies, 746 * should be registered last. They then modify global resources as the final 747 * step before entering the low power mode, and restore those resources first, 748 * as the system returns from low power mode. 749 * 750 * \subsubsection group_syspm_cb_registering Callback Registering 751 * While registration the callback is put into the linked list. The 752 * place where the callback structure is put into the linked list is based on 753 * cy_stc_syspm_callback_t.order. The callback with the lowest 754 * cy_stc_syspm_callback_t.order value will be placed at the beginning of linked 755 * list. The callback with the highest cy_stc_syspm_callback_t.order value will 756 * be placed at the end of the linked list. 757 * If there is already a callback structure in the linked list with the same 758 * cy_stc_syspm_callback_t.order value as you attend to register, then your 759 * callback will be placed right after such a callback. 760 * 761 * Such a registration order defines how the callbacks are executed: 762 * * Callbacks with the lower cy_stc_syspm_callback_t.order are executed first 763 * when entering into low power and last when exiting from low power. 764 * * Callbacks with the higher cy_stc_syspm_callback_t.order are executed last 765 * when entering into low power and first when exiting from low power. 766 * 767 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 768 * 769 * Callbacks with equal cy_stc_syspm_callback_t.order values are 770 * registered in the same order as they are registered: 771 * \image html syspm_register_eq.png 772 773 * Callbacks with a different cy_stc_syspm_callback_t.order value will be 774 * stored based on the cy_stc_syspm_callback_t.order value, with no matter when 775 * they when registered: 776 * 777 * \image html syspm_register_dif.png 778 * 779 * This can be useful to ensure that system resources (clock dividers, etc) are 780 * changed right before entering low power mode and immediately after exiting 781 * from low power. 782 * 783 * \subsubsection group_syspm_cb_unregistering Callback Unregistering 784 * 785 * Unregistering the callback might be useful when you need to dynamically manage 786 * the callbacks. 787 * 788 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_UnregisterCallback 789 * The callback structures after myDeepSleep2 callback is unregistered: 790 * \image html syspm_unregistration.png 791 * 792 * \section group_syspm_definitions Definitions 793 * 794 * <table class="doxtable"> 795 * <tr> 796 * <th>Term</th> 797 * <th>Definition</th> 798 * </tr> 799 * 800 * <tr> 801 * <td>LDO</td> 802 * <td>Low dropout linear regulator. The functions that manage this 803 * block are grouped as \ref group_syspm_functions_ldo under 804 * \ref group_syspm_functions_core_regulators</td> 805 * </tr> 806 * 807 * <tr> 808 * <td>SIMO Buck</td> 809 * <td>Single inductor multiple Output Buck regulator, referred as 810 * "Buck regulator" throughout the documentation. The functions that 811 * manage this block are grouped as \ref group_syspm_functions_buck under 812 * \ref group_syspm_functions_core_regulators</td> 813 * </tr> 814 * 815 * <tr> 816 * <td>SISO Buck</td> 817 * <td>Single inductor single output Buck regulator, referred as 818 * "Buck regulator" throughout the documentation. The functions that 819 * manage this block are grouped as \ref group_syspm_functions_buck under 820 * \ref group_syspm_functions_core_regulators</td> 821 * </tr> 822 823 * <tr> 824 * <td>PMIC</td> 825 * <td>Power management integrated circuit. The functions that manage this 826 * block are grouped as \ref group_syspm_functions_pmic</td> 827 * </tr> 828 * 829 * <tr> 830 * <td>LP</td> 831 * <td>System low power mode. See the \ref group_syspm_switching_into_lp 832 * section for details.</td> 833 * </tr> 834 * 835 * <tr> 836 * <td>ULP</td> 837 * <td>System ultra low power mode. See the 838 * \ref group_syspm_switching_into_ulp section for details.</td> 839 * </tr> 840 * </table> 841 * 842 * \section group_syspm_section_more_information More Information 843 * For more information on the SysPm driver, 844 * refer to the technical reference manual (TRM). 845 * 846 * \section group_syspm_changelog Changelog 847 * <table class="doxtable"> 848 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr> 849 * <tr> 850 * <td rowspan="4">5.94</td> 851 * <td> 852 * Newly added APIs \ref Cy_SysPm_SetSOCMemPartActivePwrMode, \ref Cy_SysPm_SetSOCMemPartDsPwrMode, \ref Cy_SysPm_GetSOCMemSramPartActivePwrMode, \ref Cy_SysPm_GetSOCMemSramPartDsPwrMode 853 * </td> 854 * <td>Support of SOCMEM control for CAT1D devices added .</td> 855 * </tr> 856 * <tr> 857 * <td>Newly added APIs \ref Cy_SysPm_ReghcConfigure, \ref Cy_SysPm_ReghcDeConfigure.</td> 858 * <td>Added REGHC configuration support for CAT1C devices .</td> 859 * </tr> 860 * <tr> 861 * <td>Newly added APIs \ref Cy_SysPm_SetSysDeepSleepMode, \ref Cy_SysPm_SetAppDeepSleepMode, \ref cy_pd_ppu_set_static_power_mode.</td> 862 * <td>DEEPSLEEP support for CAT1D devices added.</td> 863 * </tr> 864 * <tr> 865 * <td>Newly added APIs \ref Cy_SysPm_Cm33IsActive, \ref Cy_SysPm_Cm33IsSleep, \ref Cy_SysPm_Cm33IsDeepSleep, \ref Cy_SysPm_Cm55IsActive, \ref Cy_SysPm_Cm55IsSleep.</td> 866 * <td>Support for Core status check added for CAT1D devices .</td> 867 * </tr> 868 * <tr> 869 * <td>Newly added APIs \ref Cy_SysPm_SramLdoEnable, \ref Cy_SysPm_SramLdoSetVoltage, \ref Cy_SysPm_SramLdoGetVoltage.</td> 870 * <td>Support for SRAMLDO Regulator added for CAT1D devices .</td> 871 * </tr> 872 * <tr> 873 * <td>5.93</td> 874 * <td>Bug fix in definition of LPCOMP1 as wake-up source.</td> 875 * <td>The low power comparator #1 was unable to wake-up the system from hibernate state.</td> 876 * </tr> 877 * <tr> 878 * <td>5.92</td> 879 * <td>Support for CAT1D devices is added</td> 880 * <td>New devices support added</td> 881 * </tr> 882 * <tr> 883 * <td>5.91</td> 884 * <td>Updated \ref Cy_SysPm_Init() function.</td> 885 * <td>To remove the clearing of reset reason.</td> 886 * </tr> 887 * <tr> 888 * <td>5.90</td> 889 * <td> 890 * Added new function \ref Cy_SysPm_SetupDeepSleepRAM(). 891 * </td> 892 * <td>Added support for DSRAM Setup for CAT1B devices.</td> 893 * </tr> 894 * <tr> 895 * <td rowspan="4">5.80</td> 896 * <td> 897 * Support for CAT1C devices. 898 * </td> 899 * <td>Power Management support for CAT1C devices.</td> 900 * <tr> 901 * <td>New API's Added/Modified 902 * * Cy_SysPm_IsBgRefCtrl() 903 * * Cy_SysPm_BgRefCtrl() 904 * * Cy_SysPm_LdoSetMode() 905 * * Cy_SysPm_LdoGetMode() 906 * * Cy_SysPm_LdoIsEnabled() 907 * * Cy_SysPm_Cm7IsActive() 908 * * Cy_SysPm_Cm7IsSleep() 909 * * Cy_SysPm_Cm7IsDeepSleep() 910 * * Cy_SysPm_Cm7IsLowPower() 911 * * Cy_SysPm_Cm0IsActive() 912 * * Cy_SysPm_Cm0IsSleep() 913 * * Cy_SysPm_Cm0IsLowPower() 914 * * Cy_SysPm_Cm0IsDeepSleep() 915 * * Cy_SysPm_IsSystemLp() 916 * * Cy_SysPm_PmicEnable() 917 * * Cy_SysPm_PmicDisable() 918 * * Cy_SysPm_PmicAlwaysEnable() 919 * * Cy_SysPm_PmicEnableOutput() 920 * * Cy_SysPm_PmicDisableOutput() 921 * * Cy_SysPm_PmicLock() 922 * * Cy_SysPm_PmicUnlock() 923 * * Cy_SysPm_PmicIsEnabled() 924 * * Cy_SysPm_PmicIsOutputEnabled() 925 * * Cy_SysPm_PmicIsLocked() 926 * * Cy_SysPm_OvdEnable() 927 * * Cy_SysPm_OvdDisable() 928 * * Cy_SysPm_OvdVdddSelect() 929 * * Cy_SysPm_OvdVddaSelect() 930 * * Cy_SysPm_OvdActionSelect() 931 * * Cy_SysPm_BodEnable() 932 * * Cy_SysPm_BodDisable() 933 * * Cy_SysPm_BodVdddSelect() 934 * * Cy_SysPm_BodVddaSelect() 935 * * Cy_SysPm_BodActionSelect() 936 * * Cy_SysPm_SupplySupervisionStatus() 937 * * Cy_SysPm_SystemIsMinRegulatorCurrentSet() 938 * * Cy_SysPm_LinearRegDisable() 939 * * Cy_SysPm_LinearRegEnable() 940 * * Cy_SysPm_LinearRegGetStatus() 941 * * Cy_SysPm_DeepSleepRegDisable() 942 * * Cy_SysPm_DeepSleepRegEnable() 943 * * Cy_SySPm_IsDeepSleepRegEnabled() 944 * * Cy_SysPm_ReghcSelectMode() 945 * * Cy_SysPm_ReghcGetMode() 946 * * Cy_SysPm_ReghcSelectDriveOut() 947 * * Cy_SysPm_ReghcGetDriveOut() 948 * * Cy_SysPm_ReghcAdjustOutputVoltage() 949 * * Cy_SysPm_ReghcDisableIntSupplyWhileExtActive() 950 * * Cy_SysPm_ReghcEnableIntSupplyWhileExtActive() 951 * * Cy_SysPm_ReghcDisablePmicEnableOutput() 952 * * Cy_SysPm_ReghcEnablePmicEnableOutput() 953 * * Cy_SysPm_ReghcEnablePmicStatusInput() 954 * * Cy_SysPm_ReghcDisablePmicStatusInput() 955 * * Cy_SysPm_ReghcSetPmicStatusWaitTime() 956 * * Cy_SysPm_ReghcIsConfigured() 957 * * Cy_SysPm_ReghcSetConfigured() 958 * * Cy_SysPm_ReghcDisable() 959 * * Cy_SysPm_ReghcEnable() 960 * * Cy_SysPm_ReghcDisablePmicStatusTimeout() 961 * * Cy_SysPm_ReghcEnablePmicStatusTimeout() 962 * * Cy_SysPm_ReghcIsEnabled() 963 * * Cy_SysPm_ReghcIsStatusOk() 964 * * Cy_SysPm_ReghcIsSequencerBusy() 965 * * Cy_SysPm_ReghcDisableVAdj() 966 * * Cy_SysPm_ReghcEnableVAdj() 967 * * Cy_SysPm_ReghcDisablePmicInDeepSleep() 968 * * Cy_SysPm_ReghcEnablePmicInDeepSleep() 969 * * Cy_SysPm_ReghcIsOcdWithinLimits() 970 * * Cy_SysPm_ReghcIsCircuitEnabledAndOperating() 971 * 972 * </td> 973 * <td>New API's to handle CAT1C devices.</td> 974 * <tr> 975 * <td>Added \ref group_syspm_functions_ovd, \ref group_syspm_functions_bod, \ref group_syspm_functions_linearreg and \ref group_syspm_functions_reghc API's.</td> 976 * <td>New API's to handle Power Management in CAT1C Devices.</td> 977 * </tr> 978 * <tr> 979 * <td> 980 * Added following functions for BTSS IP Reset: 981 * \ref Cy_BTSS_AssertReset(), \ref Cy_BTSS_IsResetAsserted(), 982 * </td> 983 * <td>Added API's to support for BTSS IP Reset.</td> 984 * </tr> 985 * <tr> 986 * <td rowspan="3">5.70</td> 987 * <td> 988 * Support for CAT1B devices. 989 * </td> 990 * <td>Power Management support for CAT1B devices.</td> 991 * <tr> 992 * <td>New API's Added 993 * * Cy_SysPm_Init() 994 * * Cy_SysPm_SystemLpActiveEnter() 995 * * Cy_SysPm_SystemLpActiveExit() 996 * * Cy_SysPm_IsSystemLpActiveEnabled() 997 * * Cy_SysPm_SetDeepSleepMode() 998 * * Cy_SysPm_GetDeepSleepMode() 999 * * Cy_SysPm_GetBootMode() 1000 * * Cy_SysPm_TriggerSoftReset() 1001 * * Cy_SysPm_GetHibernateWakeupCause() 1002 * * Cy_SysPm_ClearHibernateWakeupCause() 1003 * * Cy_SysPm_CoreBuckSetVoltage() 1004 * * Cy_SysPm_CoreBuckGetVoltage() 1005 * * Cy_SysPm_CoreBuckSetMode() 1006 * * Cy_SysPm_CoreBuckGetMode() 1007 * * Cy_SysPm_CoreBuckConfig() 1008 * * Cy_SysPm_CoreBuckStatus() 1009 * * Cy_SysPm_LdoExtraRequesterConfig() 1010 * * Cy_SysPm_SdrConfigure() 1011 * * Cy_SysPm_SdrSetVoltage() 1012 * * Cy_SysPm_SdrGetVoltage() 1013 * * Cy_SysPm_SdrEnable() 1014 * * Cy_SysPm_IsSdrEnabled() 1015 * * Cy_SysPm_HvLdoConfigure() 1016 * * Cy_SysPm_HvLdoSetVoltage() 1017 * * Cy_SysPm_HvLdoGetVoltage() 1018 * * Cy_SysPm_HvLdoEnable() 1019 * * Cy_SysPm_IsHvLdoEnabled() 1020 * * Cy_SysPm_IoUnfreeze() 1021 * * Cy_SysPm_DeepSleepIoIsFrozen() 1022 * * Cy_SysPm_DeepSleepIoUnfreeze() 1023 * * Cy_SysPm_BackupWordStore() 1024 * * Cy_SysPm_BackupWordReStore() 1025 * * Cy_SysPm_CpuEnterRAMOffDeepSleep() 1026 * 1027 * </td> 1028 * <td>New API's to handle CAT1B devices.</td> 1029 * <tr> 1030 * <td>Added \ref group_syspm_ppu, \ref group_syspm_pdcm and \ref group_syspm_btss API's.</td> 1031 * <td>New API's to handle Power Management in CAT1B Devices.</td> 1032 * </tr> 1033 * </tr> 1034 * <tr> 1035 * <td rowspan="2">5.60</td> 1036 * <td> 1037 * For PSoC64 device, allow CM0+ to call CY_PRA_FUNCTION_CALL_X_X API in functions 1038 * accessing FUNCTION_POLICY registers. So that System Configuration structure is 1039 * updated with new parameters. 1040 * </td> 1041 * <td>For PSoC64 device, System configuration can be done from CM0+ application.</td> 1042 * </tr> 1043 * <tr> 1044 * <td>Fixed MISRA 2012 violations.</td> 1045 * <td>MISRA 2012 compliance.</td> 1046 * </tr> 1047 * <tr> 1048 * <td>5.50</td> 1049 * <td> 1050 * Added following functions for SRAM power mode configuration: 1051 * \ref Cy_SysPm_SetSRAMMacroPwrMode(), \ref Cy_SysPm_SetSRAMPwrMode(), 1052 * \ref Cy_SysPm_GetSRAMMacroPwrMode(). For PSoC 64 devices these 1053 * functions can return PRA driver status value. 1054 * </td> 1055 * <td>Added support for SRAM power mode configuration.</td> 1056 * </tr> 1057 * <tr> 1058 * <td>5.40</td> 1059 * <td>Support for CM33.</td> 1060 * <td>New devices support.</td> 1061 * </tr> 1062 * <tr> 1063 * <td rowspan="3">5.30</td> 1064 * <td> 1065 * Updated \ref Cy_SysPm_LdoSetVoltage() and Cy_SysPm_SystemSetMinRegulatorCurrent() 1066 * to extend the wakeup delay from Deep Sleep for 1.1 V LDO for the case when system 1067 * regulator is configured to the minimum current mode. Please refer to 1068 * \ref group_syspm_system_reg_curr_mode for the more details on system regulator modes. 1069 * </td> 1070 * <td>Ensure valid VCCD upon wakeup for the system regulator's minimum current mode.</td> 1071 * </tr> 1072 * <tr> 1073 * <td>Fixed MISRA 2012 violations.</td> 1074 * <td>MISRA 2012 compliance.</td> 1075 * </tr> 1076 * <tr> 1077 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function to ensure the Low-power mode 1078 * entry abort when a system call initiated by Cortex-M4 or Cortex-M0+ is pending.</td> 1079 * <td>Fixed the issue when the non-blocking flash write initiated by the Cortex-M4 application 1080 * fails to complete because the Cortex-M0+ CPU is in Deep Sleep mode.</td> 1081 * </tr> 1082 * <tr> 1083 * <td>5.20</td> 1084 * <td> 1085 * Updated \ref Cy_SysPm_CpuEnterDeepSleep() function for 1086 * the CYB06xx7 devices. 1087 * </td> 1088 * <td>Added CYB06xx7 device support.</td> 1089 * </tr> 1090 * <tr> 1091 * <td rowspan="3">5.10</td> 1092 * <td> 1093 * Updated the following functions for the PSoC 64 devices: 1094 * \ref Cy_SysPm_CpuEnterDeepSleep(), \ref Cy_SysPm_SystemEnterLp(), 1095 * \ref Cy_SysPm_SystemEnterUlp, \ref Cy_SysPm_SystemEnterHibernate, 1096 * \ref Cy_SysPm_SetHibernateWakeupSource, 1097 * \ref Cy_SysPm_ClearHibernateWakeupSource, 1098 * \ref Cy_SysPm_SystemSetMinRegulatorCurrent, 1099 * \ref Cy_SysPm_SystemSetNormalRegulatorCurrent, 1100 * \ref Cy_SysPm_LdoSetVoltage, \ref Cy_SysPm_LdoSetMode, 1101 * \ref Cy_SysPm_BuckEnable, \ref Cy_SysPm_BuckSetVoltage1, 1102 * Following functions are updated as unavailable for PSoC 64 devices: 1103 * \ref Cy_SysPm_WriteVoltageBitForFlash, \ref Cy_SysPm_SaveRegisters, 1104 * \ref Cy_SysPm_RestoreRegisters, 1105 * \ref Cy_SysPm_BuckSetVoltage2, \ref Cy_SysPm_BuckEnableVoltage2, 1106 * \ref Cy_SysPm_BuckDisableVoltage2, 1107 * \ref Cy_SysPm_BuckSetVoltage2HwControl, SetReadMarginTrimUlp, 1108 * SetReadMarginTrimLp, SetWriteAssistTrimUlp, IsVoltageChangePossible. 1109 * </td> 1110 * <td> 1111 * Added PSoC 64 device support. 1112 * </td> 1113 * </tr> 1114 * <tr> 1115 * <td> 1116 * For PSoC 64 devices the following functions can return PRA driver 1117 * status value: 1118 * \ref Cy_SysPm_CpuEnterDeepSleep(), 1119 * \ref Cy_SysPm_SystemEnterHibernate(), 1120 * \ref Cy_SysPm_SystemEnterLp(), 1121 * \ref Cy_SysPm_SystemEnterUlp(), 1122 * \ref Cy_SysPm_SystemSetMinRegulatorCurrent(), 1123 * \ref Cy_SysPm_SystemSetNormalRegulatorCurrent(), 1124 * \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_LdoSetMode(), 1125 * \ref Cy_SysPm_BuckEnable(), \ref Cy_SysPm_BuckSetVoltage1(), 1126 * </td> 1127 * <td> 1128 * For PSoC 64 devices the SysPm driver uses the PRA driver to change 1129 * the protected registers. A SysPm driver function that calls a PRA 1130 * driver function will return the PRA error status code if the called 1131 * PRA function returns an error. In these cases, refer to PRA return 1132 * statuses \ref cy_en_pra_status_t. 1133 * </td> 1134 * </tr> 1135 * <tr> 1136 * <td>Minor documentation updates.</td> 1137 * <td>Documentation enhancement.</td> 1138 * </tr> 1139 * <tr> 1140 * <td>5.0</td> 1141 * <td> 1142 * Updated the internal IsVoltageChangePossible() function 1143 * (\ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), 1144 * \ref Cy_SysPm_BuckSetVoltage1(), \ref Cy_SysPm_SystemEnterUlp() 1145 * and \ref Cy_SysPm_SystemEnterLp() functions are affected). 1146 * For all the devices except CY8C6xx6 and CY8C6xx7 added the check if 1147 * modifying the RAM trim register is allowed. 1148 * </td> 1149 * <td> 1150 * Protecting the system from a possible CPU hard-fault cause. If you 1151 * are using PC > 0 in your project and you want to switch the power 1152 * modes (LP<->ULP), you need to unprotect the CPUSS_TRIM_RAM_CTL and 1153 * CPUSS_TRIM_ROM_CTL registers and can use a programmable PPU for that. 1154 * </td> 1155 * </tr> 1156 * <tr> 1157 * <td rowspan="2">4.50</td> 1158 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function.</td> 1159 * <td> 1160 * Updated the mechanism for saving/restoring not retained UDB and clock 1161 * registers in the Cy_SysPm_CpuEnterDeepSleep() function. 1162 * </td> 1163 * </tr> 1164 * <tr> 1165 * <td> 1166 * Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function to use values 1167 * stored into the variable instead of reading them directly from 1168 * SFLASH memory. 1169 * </td> 1170 * <td> 1171 * SFLASH memory can be unavailable to read the correct value after 1172 * a Deep sleep state on the CY8C6xx6 and CY8C6xx7 devices. 1173 * </td> 1174 * </tr> 1175 * <tr> 1176 * <td>4.40</td> 1177 * <td> 1178 * Fixed \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), and 1179 * \ref Cy_SysPm_BuckSetVoltage1() functions. Corrected the sequence for 1180 * setting the RAM trim value. This behavior is applicable for all 1181 * devices, except CY8C6xx6 and CY8C6xx7. 1182 * </td> 1183 * <td> 1184 * For all devices, except CY8C6xx6 and CY8C6xx7, the trim 1185 * sequence was setting incorrect trim values for RAM. 1186 * This could cause a CPU hard fault. 1187 * </td> 1188 * </tr> 1189 * <tr> 1190 * <td>4.30</td> 1191 * <td> 1192 * Corrected the \ref Cy_SysPm_CpuEnterDeepSleep() function. 1193 * Removed early access to flash values after system Deep Sleep, when 1194 * flash is not ready to be used. Now the \ref Cy_SysPm_CpuEnterDeepSleep() 1195 * function does not access flash until the flash is ready. 1196 * This behavior is applicable only on multi-CPU devices CY8C6xx6 and 1197 * CY8C6xx7. 1198 * </td> 1199 * <td> 1200 * For CY8C6xx6 and CY8C6xx7 early access to flash values after 1201 * system Deep Sleep could potentially cause hard fault. 1202 * Now after system Deep Sleep only ram values are used before 1203 * flash is ready. 1204 * </td> 1205 * </tr> 1206 * <tr> 1207 * <td rowspan="3">4.20</td> 1208 * <td>Updated the \ref Cy_SysPm_RegisterCallback() function. 1209 * Added a new element to callback structure - 1210 * cy_stc_syspm_callback_t.order</td> 1211 * <td>Enhanced the mechanism of callbacks registration and execution. Now 1212 * callbacks can be ordered during registration. This means the 1213 * execution flow now is based on cy_stc_syspm_callback_t.order. 1214 * For more details, see the \ref group_syspm_cb_registering section. </td> 1215 * </tr> 1216 * <tr> 1217 * <td>Updated \ref group_syspm_cb section. 1218 * Added \ref group_syspm_cb_registering section</td> 1219 * <td>Added explanations how to use updated callbacks registration 1220 * mechanism. </td> 1221 * </tr> 1222 * <tr> 1223 * <td>Added new function \ref Cy_SysPm_GetFailedCallback()</td> 1224 * <td>Added new functionality to support callback debugging</td> 1225 * </tr> 1226 * <tr> 1227 * <td>4.10.1</td> 1228 * <td> 1229 * Updated the Cy_SysPm_BackupEnableVoltageMeasurement() description 1230 * </td> 1231 * <td> 1232 * Changed the scale number from 40% to 10% to correctly reflect a real value. 1233 * </td> 1234 * </tr> 1235 * <tr> 1236 * <td rowspan="3">4.10</td> 1237 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function.</td> 1238 * <td> 1239 * Corrected the mechanism for saving/restoring not retained UDB 1240 * registers in the Cy_SysPm_CpuEnterDeepSleep() function. 1241 * 1242 * Now, the \ref Cy_SysPm_CpuEnterDeepSleep() function does not put CM0+ CPU 1243 * into Deep Sleep and returns \ref CY_SYSPM_SYSCALL_PENDING status, if a 1244 * syscall operation is pending. This behavior is applicable on multi-CPU 1245 * devices except CY8C6xx6 and CY8C6xx7. 1246 * </td> 1247 * </tr> 1248 * <tr> 1249 * <td>Updated the \ref Cy_SysPm_CpuEnterSleep() function.</td> 1250 * <td>Removed the redundant second call of the WFE() instruction on CM4 CPU. 1251 * This change is applicable for all devices except CY8C6xx6, 1252 * CY8C6xx7. 1253 * </td> 1254 * </tr> 1255 * <tr> 1256 * <td>Added a new \ref CY_SYSPM_SYSCALL_PENDING return status. </td> 1257 * <td>Expanded driver return statuses for indicating new possible events in 1258 * the driver. 1259 * </td> 1260 * </tr> 1261 * </tr> 1262 * <tr> 1263 * <td rowspan="6">4.0</td> 1264 * <td> 1265 * Flattened the organization of the driver source code into the single 1266 * source directory and the single include directory. 1267 * </td> 1268 * <td>Driver library directory-structure simplification.</td> 1269 * </tr> 1270 * <tr> 1271 * <td> 1272 * Changed power modes names. See \ref group_syspm_system_power_modes. 1273 * 1274 * Renamed the following functions: 1275 * - Cy_SysPm_Sleep to Cy_SysPm_CpuEnterSleep 1276 * - Cy_SysPm_DeepSleep to Cy_SysPm_CpuEnterDeepSleep 1277 * - Cy_SysPm_Hibernate to Cy_SysPm_SystemEnterHibernate 1278 * - Cy_SysPm_SleepOnExit to Cy_SysPm_CpuSleepOnExit 1279 * - Cy_SysPm_EnterLowPowerMode to Cy_SysPm_SystemSetMinRegulatorCurrent 1280 * - Cy_SysPm_ExitLowPowerMode to Cy_SysPm_SystemSetNormalRegulatorCurrent 1281 * - Cy_SysPm_IsLowPower to Cy_SysPm_IsSystemUlp 1282 * 1283 * For all renamed functions, added BWC macros to simplify migration. 1284 * </td> 1285 * <td>Device power modes simplification</td> 1286 * </tr> 1287 * <tr> 1288 * <td> 1289 * Added the following functions: 1290 * - Cy_SysPm_LdoSetMode 1291 * - Cy_SysPm_LdoGetMode 1292 * - Cy_SysPm_WriteVoltageBitForFlash 1293 * - Cy_SysPm_SaveRegisters 1294 * - Cy_SysPm_RestoreRegisters 1295 * - Cy_SysPm_CpuSendWakeupEvent 1296 * - Cy_SysPm_SystemIsMinRegulatorCurrentSet 1297 * - Cy_SysPm_SystemEnterLp 1298 * - Cy_SysPm_SystemEnterUlp 1299 * - Cy_SysPm_IsSystemLp 1300 * </td> 1301 * <td>Added new functionality to configure device power modes</td> 1302 * </tr> 1303 * <tr> 1304 * <td> 1305 * Callback mechanism changes: 1306 * - Removed the limitation for numbers of registered callbacks. Previously it 1307 * was possible to register up to 32 callbacks. Now the maximum registered 1308 * callbacks is not limited by the SysPm driver. 1309 * - Internal enhancement in callback execution flow. 1310 * - <b>Changes with BWC issues</b>: 1311 * -# Removed the <b>mode</b> element from cy_stc_syspm_callback_params_t 1312 * structure. Now this element is a separate parameter in the 1313 * callback function. 1314 * -# Changed the interface of the callback function, 1315 * added the cy_en_syspm_callback_mode_t mode parameter: 1316 * - was cy_en_syspm_status_t FuncName (cy_stc_syspm_callback_params_t *callbackParams); 1317 * - now cy_en_syspm_status_t FuncName (cy_stc_syspm_callback_params_t *callbackParams, 1318 * cy_en_syspm_callback_mode_t mode); 1319 * </td> 1320 * <td>Callback mechanism enhancements</td> 1321 * </tr> 1322 * <tr> 1323 * <td>Added register access layer. Use register access macros instead 1324 * of direct register access using dereferenced pointers.</td> 1325 * <td>Makes register access device-independent, so that the PDL does 1326 * not need to be recompiled for each supported part number.</td> 1327 * </tr> 1328 * <tr> 1329 * <td>Added \ref group_syspm_migration_guide_for_syspm_4_0.</td> 1330 * <td>Provided a guidance for migrating to the latest SysPm driver version</td> 1331 * </tr> 1332 * <tr> 1333 * <td rowspan="2">3.0</td> 1334 * <td>Removed three functions: 1335 * - Cy_SysPm_Cm4IsLowPower 1336 * - Cy_SysPm_Cm0IsLowPower 1337 * - Cy_SysPm_IoFreeze 1338 * 1339 * Removed the following macros: 1340 * - CY_SYSPM_STATUS_CM0_LOWPOWER 1341 * - CY_SYSPM_STATUS_CM4_LOWPOWER 1342 * </td> 1343 * <td> 1344 * Removed the two functions Cy_SysPm_Cm4IsLowPower, 1345 * Cy_SysPm_Cm0IsLowPower because low power mode is related to the 1346 * device and not to the CPU. 1347 * The function Cy_SysPm_IsSystemUlp must be used instead of these two 1348 * functions. 1349 * 1350 * Removed Cy_SysPm_IoFreeze because the are no known use cases with IOs 1351 * freeze in power modes, except Hibernate. In Hibernate power mode, the 1352 * IOs are frozen automatically. 1353 * </td> 1354 * </tr> 1355 * <tr> 1356 * <td> 1357 * Corrected the syspm callback mechanism behavior. Now callbacks with 1358 * CY_SYSPM_AFTER_TRANSITION mode are executed from the last registered 1359 * to the first registered. Previously callbacks with 1360 * CY_SYSPM_AFTER_TRANSITION mode were executed from last executed to 1361 * the first registered. 1362 * </td> 1363 * <td>Corrected the syspm callbacks execution sequence</td> 1364 * </tr> 1365 * <tr> 1366 * <td>2.21</td> 1367 * <td>Removed saving/restoring the SysClk measurement counters while 1368 * in Deep Sleep routine 1369 * </td> 1370 * <td>Removed possible corruption of SysClk measurement counters if the 1371 * core wakes up from the Deep Sleep. 1372 * </td> 1373 * </tr> 1374 * <tr> 1375 * <td>2.20</td> 1376 * <td> \n 1377 * * Added support for changing core voltage when the protection context 1378 * is other that zero. Such support is available only for devices 1379 * that support modifying registers via syscall. 1380 * 1381 * * For preproduction PSoC 6 devices the changing core voltage 1382 * is prohibited when the protection context is other than zero. 1383 * 1384 * * Updated the following functions. They now have a 1385 * \ref cy_en_syspm_status_t return value and use a syscall: 1386 * - Cy_SysPm_LdoSetVoltage 1387 * - Cy_SysPm_BuckSetVoltage1 1388 * - Cy_SysPm_BuckEnable 1389 * 1390 * No backward compatibility issues. 1391 * 1392 * * Added new CY_SYSPM_CANCELED element in 1393 * the \ref cy_en_syspm_status_t. 1394 * 1395 * * Documentation updates. 1396 * 1397 * * Added warning that 1398 * Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW) is not 1399 * supported by hardware. 1400 * </td> 1401 * <td>Added support for changing the core voltage in protection context 1402 * higher than zero (PC > 0). 1403 * 1404 * Documentation update and clarification 1405 * </td> 1406 * </tr> 1407 * <tr> 1408 * <td>2.10</td> 1409 * <td> \n 1410 * * Changed names for all Backup, Buck-related functions, defines, 1411 * and enums 1412 * * Changed next power mode function names: 1413 * Cy_SysPm_EnterLowPowerMode 1414 * Cy_SysPm_ExitLpMode 1415 * Cy_SysPm_SetHibWakeupSource 1416 * Cy_SysPm_ClearHibWakeupSource 1417 * Cy_SysPm_GetIoFreezeStatus 1418 * * Changed following enumeration names: 1419 * cy_en_syspm_hib_wakeup_source_t 1420 * cy_en_syspm_simo_buck_voltage1_t 1421 * cy_en_syspm_simo_buck_voltage2_t 1422 * * Updated Power Modes documentation section 1423 * * Added Low Power Callback Managements section 1424 * * Documentation edits 1425 * </td> 1426 * <td> \n 1427 * * Improvements made based on usability feedback 1428 * * Documentation update and clarification 1429 * </td> 1430 * </tr> 1431 * <tr> 1432 * <td>2.0</td> 1433 * <td>Enhancement and defect fixes: 1434 * * Added input parameter(s) validation to all public functions 1435 * * Removed "_SysPm_" prefixes from the internal functions names 1436 * * Changed the type of elements with limited set of values, from 1437 * uint32_t to enumeration 1438 * * Enhanced syspm callback mechanism 1439 * * Added functions to control: 1440 * * Power supply for the Vddbackup 1441 * * Supercapacitor charge 1442 * * Vddbackup measurement by ADC 1443 * </td> 1444 * <td></td> 1445 * </tr> 1446 * <tr> 1447 * <td>1.0</td> 1448 * <td>Initial version</td> 1449 * <td></td> 1450 * </tr> 1451 * </table> 1452 * 1453 * \subsection group_syspm_migration_guide_for_syspm_4_0 Migration Guide: Moving to SysPm v4.0 1454 * 1455 * This section provides a guideline to migrate from v2.21 to v4.0 of the SysPm 1456 * driver. 1457 * 1458 * \subsubsection group_syspm_migration_into_4_0_intro Introduction 1459 * 1460 * If your application currently uses SysPm v2.21 APIs, you must 1461 * migrate to SysPm v4.0 so that your application continues to operate. 1462 * 1463 * Take a few minutes to review the following information: 1464 * - The APIs related to PSoC 6 \ref group_syspm_power_modes are changed. Old 1465 * power modes APIs function names are now deprecated and should not be used 1466 * in new applications. 1467 * - The \ref group_syspm_cb mechanism is changed. The mode element is removed 1468 * from cy_stc_syspm_callback_params_t structure. Now this element is a 1469 * separate parameter in the callback function. 1470 * 1471 * \subsubsection group_syspm_migration_into_4_0_names Migrating to new power modes APIs. 1472 * The table below shows the new APIs names that should be used in the 1473 * application instead of old names: 1474 * 1475 * <table class="doxtable"> 1476 * <tr><th>SysPm v2.21 API name</th><th>SysPm v4.0 API name</th><th>Comment</th></tr> 1477 * <tr> 1478 * <td>Cy_SysPm_Sleep</td> 1479 * <td>\ref Cy_SysPm_CpuEnterSleep</td> 1480 * <td>Renamed, no functional changes</td> 1481 * </tr> 1482 * <tr> 1483 * <td>Cy_SysPm_DeepSleep</td> 1484 * <td>\ref Cy_SysPm_CpuEnterDeepSleep</td> 1485 * <td>Renamed, no functional changes</td> 1486 * </tr> 1487 * <tr> 1488 * <td>Cy_SysPm_Hibernate</td> 1489 * <td>\ref Cy_SysPm_SystemEnterHibernate</td> 1490 * <td>Renamed, no functional changes</td> 1491 * </tr> 1492 * <tr> 1493 * <td>Cy_SysPm_SleepOnExit</td> 1494 * <td>\ref Cy_SysPm_CpuSleepOnExit</td> 1495 * <td>Renamed, no functional changes</td> 1496 * </tr> 1497 * <tr> 1498 * <td>Cy_SysPm_IsLowPower</td> 1499 * <td>\ref Cy_SysPm_IsSystemUlp</td> 1500 * <td>Now this function checks whether the device is in ULP mode</td> 1501 * </tr> 1502 * <tr> 1503 * <td>Cy_SysPm_EnterLowPowerMode</td> 1504 * <td>\ref Cy_SysPm_SystemSetMinRegulatorCurrent</td> 1505 * <td>The low power active mode does not exist anymore. 1506 * The \ref group_syspm_system_reg_curr_mode is implemented instead </td> 1507 * </tr> 1508 * <tr> 1509 * <td>Cy_SysPm_ExitLowPowerMode</td> 1510 * <td>\ref Cy_SysPm_SystemSetNormalRegulatorCurrent</td> 1511 * <td>The low power active mode does not exist anymore. 1512 * The \ref group_syspm_system_reg_curr_mode is implemented instead</td> 1513 * </tr> 1514 * <tr> 1515 * <td>Cy_SysPm_Cm4IsLowPower</td> 1516 * <td>Removed</td> 1517 * <td>This function is removed because low power mode is related to the system 1518 * and not to the CPU</td> 1519 * </tr> 1520 * <tr> 1521 * <td>Cy_SysPm_Cm0IsLowPower</td> 1522 * <td>Removed</td> 1523 * <td>This function is removed because low power mode is related to the system 1524 * and not to the CPU</td> 1525 * </tr> 1526 * <tr> 1527 * <td>Cy_SysPm_IoFreeze</td> 1528 * <td>Removed</td> 1529 * <td>This function is removed because there are no known use cases to 1530 * freeze in power modes other than Hibernate</td> 1531 * </tr> 1532 * </table> 1533 * 1534 * In addition to renamed power modes APIs, the following defines and enum 1535 * elements names are changed: 1536 * <table class="doxtable"> 1537 * <tr><th>SysPm v2.21 defines</th><th>SysPm v4.0 defines</th><th>Comment</th></tr> 1538 * <tr> 1539 * <td>CY_SYSPM_ENTER_LP_MODE</td> 1540 * <td>CY_SYSPM_ULP</td> 1541 * <td>The \ref cy_en_syspm_callback_type_t element is renamed to align 1542 * callback types names to new power modes names</td> 1543 * </tr> 1544 * <tr> 1545 * <td>CY_SYSPM_EXIT_LP_MODE</td> 1546 * <td>CY_SYSPM_LP</td> 1547 * <td>The \ref cy_en_syspm_callback_type_t element is renamed to align 1548 * callback types names to new power modes names</td> 1549 * <tr> 1550 * <td>CY_SYSPM_STATUS_SYSTEM_LOWPOWER</td> 1551 * <td>CY_SYSPM_STATUS_SYSTEM_ULP</td> 1552 * <td>Status define, renamed to align new power modes names 1553 * and abbreviations</td> 1554 * </tr> 1555 * </table> 1556 * 1557 * \subsubsection group_syspm_migration_into_4_0_callbacks Migrating to SysPm v4.0 callbacks 1558 * 1559 * Review this section if your application is using the syspm callback mechanism. 1560 * 1561 * To migrate to SysPm v4.0 callbacks you need to perform the following steps: 1562 * -# Remove mode element from all \ref cy_stc_syspm_callback_params_t 1563 * structures defined in your application. In SysPm v2.21 this structure is: 1564 * \code{.c} 1565 * cy_stc_syspm_callback_params_t deepSleepParam1 = 1566 * { 1567 * CY_SYSPM_CHECK_READY, 1568 * &HW1_address, 1569 * &context 1570 * }; 1571 * \endcode 1572 * 1573 * In SysPm v4.0 this structure should be: 1574 * \code{.c} 1575 * cy_stc_syspm_callback_params_t deepSleepParam1 = 1576 * { 1577 * &HW1_address, 1578 * &context 1579 * }; 1580 * \endcode 1581 * -# Update all defined syspm callback function prototypes to have two 1582 * parameters instead of one. The SysPm v2.21 callback function prototype is: 1583 * \code{.c} 1584 * cy_en_syspm_status_t Func1 (cy_stc_syspm_callback_params_t *callbackParams); 1585 * \endcode 1586 * The SysPm v4.0 callback function prototype should be: 1587 * \code{.c} 1588 * cy_en_syspm_status_t Func1 (cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode); 1589 * \endcode 1590 * -# Change the syspm callback function implementation to not use a mode 1591 * value as an element of the callbackParams structure, but, as separate 1592 * function parameter: 1593 * SysPm v2.21 callback function implementation: 1594 * \code{.c} 1595 * cy_en_syspm_status_t Func1(cy_stc_syspm_callback_params_t *callbackParams) 1596 * { 1597 * cy_en_syspm_status_t retVal = CY_SYSPM_FAIL; 1598 * 1599 * switch(callbackParams->mode) 1600 * { 1601 * case CY_SYSPM_CHECK_READY: 1602 * ... 1603 * } 1604 * 1605 * return (retVal); 1606 * } 1607 * \endcode 1608 * SysPm v4.0 callback function implementation: 1609 * \code{.c} 1610 * cy_en_syspm_status_t Func1(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode) 1611 * { 1612 * cy_en_syspm_status_t retVal = CY_SYSPM_FAIL; 1613 * 1614 * switch(mode) 1615 * { 1616 * case CY_SYSPM_CHECK_READY: 1617 * ... 1618 * } 1619 * 1620 * return (retVal); 1621 * } 1622 * \endcode 1623 * After the changes above are done, you have successfully migrated to SysPm v4.0. 1624 * 1625 * Do not forget to review newly added functionality for SysPm v4.0 in the 1626 * \ref group_syspm_changelog. 1627 1628 * \defgroup group_syspm_macros Macros 1629 * \defgroup group_syspm_functions Functions 1630 * \{ 1631 \defgroup group_syspm_functions_general General 1632 * \defgroup group_syspm_functions_power Power Modes 1633 * \defgroup group_syspm_functions_power_status Power Status 1634 * \defgroup group_syspm_functions_iofreeze I/Os Freeze 1635 * \defgroup group_syspm_functions_core_regulators Core Voltage Regulation 1636 * \{ 1637 * \defgroup group_syspm_functions_ldo LDO 1638 * \defgroup group_syspm_functions_buck Buck 1639 * \} 1640 * \defgroup group_syspm_functions_pmic PMIC 1641 * \defgroup group_syspm_functions_backup Backup Domain 1642 * \defgroup group_syspm_functions_callback Low Power Callbacks 1643 * \defgroup group_syspm_functions_linearreg Linear Regulator 1644 * \defgroup group_syspm_functions_reghc REGHC (High Current Regulator) 1645 * \defgroup group_syspm_functions_ovd OVD 1646 * \defgroup group_syspm_functions_bod BOD 1647 * \} 1648 * \defgroup group_syspm_data_structures Data Structures 1649 * \defgroup group_syspm_data_enumerates Enumerated Types 1650 */ 1651 1652 #if !defined (CY_SYSPM_H) 1653 #define CY_SYSPM_H 1654 1655 #include "cy_device.h" 1656 1657 #if defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) 1658 1659 #include <stdbool.h> 1660 #include <stddef.h> 1661 1662 #include "cy_device.h" 1663 #include "cy_device_headers.h" 1664 #include "cy_syslib.h" 1665 1666 #if ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) 1667 #include "cy_pra.h" 1668 #endif /* #if ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) */ 1669 1670 #ifdef __cplusplus 1671 extern "C" { 1672 #endif 1673 1674 /******************************************************************************* 1675 * Register Constants 1676 *******************************************************************************/ 1677 1678 /** 1679 * \addtogroup group_syspm_macros 1680 * \{ 1681 */ 1682 1683 /** Driver major version */ 1684 #define CY_SYSPM_DRV_VERSION_MAJOR 5 1685 1686 /** Driver minor version */ 1687 #define CY_SYSPM_DRV_VERSION_MINOR 94 1688 1689 /** SysPm driver identifier */ 1690 #define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U)) 1691 1692 1693 /******************************************************************************* 1694 * Internal Defines 1695 *******************************************************************************/ 1696 1697 /** \cond INTERNAL */ 1698 1699 1700 /* Macro to validate parameters in Cy_SysPm_SetHibernateWakeupSource() and for Cy_SysPm_ClearHibernateWakeupSource() function */ 1701 #define CY_SYSPM_IS_WAKE_UP_SOURCE_VALID(wakeupSource) (0UL == ((wakeupSource) & \ 1702 ((uint32_t) ~(CY_SYSPM_HIB_WAKEUP_SOURSE_MASK)))) 1703 1704 1705 #if defined (CY_IP_MXS40SRSS) 1706 /** 1707 * \note 1708 * This macro is available for CAT1A devices. 1709 **/ 1710 1711 /* Macro to validate parameters in Cy_SysPm_PmicDisable() function */ 1712 #define CY_SYSPM_IS_POLARITY_VALID(polarity) (((polarity) == CY_SYSPM_PMIC_POLARITY_LOW) || \ 1713 ((polarity) == CY_SYSPM_PMIC_POLARITY_HIGH)) 1714 1715 /* Macro to validate parameters in Cy_SysPm_BuckSetVoltage1() function */ 1716 #define CY_SYSPM_IS_BUCK_VOLTAGE1_VALID(voltage) (((voltage) == CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V) || \ 1717 ((voltage) == CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V)) 1718 1719 /* Macro to validate parameters in Cy_SysPm_BuckSetVoltage2() function */ 1720 #define CY_SYSPM_IS_BUCK_VOLTAGE2_VALID(voltage) (((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V) || \ 1721 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V) || \ 1722 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V) || \ 1723 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V) || \ 1724 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V) || \ 1725 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V) || \ 1726 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V) || \ 1727 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V)) 1728 1729 /* Macro to validate parameters in Cy_SysPm_BuckIsOutputEnabled() function */ 1730 #define CY_SYSPM_IS_BUCK_OUTPUT_VALID(output) (((output) == CY_SYSPM_BUCK_VBUCK_1) || \ 1731 ((output) == CY_SYSPM_BUCK_VRF)) 1732 1733 /* Macro to validate parameters in Cy_SysPm_LdoSetVoltage() function */ 1734 #define CY_SYSPM_IS_LDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_LDO_VOLTAGE_0_9V) || \ 1735 ((voltage) == CY_SYSPM_LDO_VOLTAGE_1_1V)) 1736 #endif 1737 1738 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 1739 #if defined (CY_IP_MXS40SRSS) 1740 #if (CY_IP_MXS40SRSS_VERSION < 3) 1741 1742 /** 1743 * \note 1744 * This macro is available for CAT1A devices. 1745 **/ 1746 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1747 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1748 ((type) == CY_SYSPM_HIBERNATE) || \ 1749 ((type) == CY_SYSPM_ULP) || \ 1750 ((type) == CY_SYSPM_LP)) 1751 #endif /* (CY_IP_MXS40SRSS_VERSION < 3) */ 1752 1753 #if (CY_IP_MXS40SRSS_VERSION >= 3) 1754 1755 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 1756 /** 1757 * \note 1758 * This macro is available for CAT1C devices. 1759 **/ 1760 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1761 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1762 ((type) == CY_SYSPM_HIBERNATE) || \ 1763 ((type) == CY_SYSPM_LPACTIVE_ENTER) || \ 1764 ((type) == CY_SYSPM_LPACTIVE_EXIT)) 1765 1766 /* Macro to validate OVD ACTION */ 1767 /** 1768 * \note 1769 * This macro is available for CAT1C devices. 1770 **/ 1771 1772 #define CY_OVD_CHECK_ACTION_CFG(ovdActionSelect) (((ovdActionSelect) == CY_SYSPM_OVD_ACTION_NOTHING) || \ 1773 ((ovdActionSelect) == CY_SYSPM_OVD_ACTION_FAULT) || \ 1774 ((ovdActionSelect) == CY_SYSPM_OVD_ACTION_RESET)) 1775 1776 /* Macro to validate BOD ACTION */ 1777 /** 1778 * \note 1779 * This macro is available for CAT1C devices. 1780 **/ 1781 1782 #define CY_BOD_CHECK_ACTION_CFG(bodActionSelect) (((bodActionSelect) == CY_SYSPM_BOD_ACTION_NOTHING) || \ 1783 ((bodActionSelect) == CY_SYSPM_BOD_ACTION_FAULT) || \ 1784 ((bodActionSelect) == CY_SYSPM_BOD_ACTION_RESET)) 1785 1786 /* Macro to validate SUPPLY ENTITY */ 1787 /** 1788 * \note 1789 * This macro is available for CAT1C devices. 1790 **/ 1791 #define CY_OVD_CHECK_SUPPLY_ENTITY(supplyEntitySelect) (((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VDDD) || \ 1792 ((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VDDA) || \ 1793 ((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VCCD) || \ 1794 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VDDD) || \ 1795 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VDDA) || \ 1796 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VCCD)) 1797 1798 #endif /* (CY_IP_MXS40SRSS_VERSION >= 3) */ 1799 #endif /* defined (CY_IP_MXS40SRSS) */ 1800 1801 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 1802 1803 /** 1804 * \note 1805 * This macro is available for CAT1D devices. 1806 **/ 1807 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1808 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1809 ((type) == CY_SYSPM_DEEPSLEEP_RAM) || \ 1810 ((type) == CY_SYSPM_DEEPSLEEP_OFF) || \ 1811 ((type) == CY_SYSPM_LP) || \ 1812 ((type) == CY_SYSPM_ULP) || \ 1813 ((type) == CY_SYSPM_MF) || \ 1814 ((type) == CY_SYSPM_HIBERNATE)) 1815 1816 /* Macro to validate parameters in Cy_SysPm_CoreBuckSetVoltage() & Cy_SysPm_CoreBuckConfig functions */ 1817 #define CY_SYSPM_IS_CORE_BUCK_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_58V) || \ 1818 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_60V) || \ 1819 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_62V) || \ 1820 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_64V) || \ 1821 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_66V) || \ 1822 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_68V) || \ 1823 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_70V) || \ 1824 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_72V) || \ 1825 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_74V) || \ 1826 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V) || \ 1827 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V) || \ 1828 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V) || \ 1829 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V) || \ 1830 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V) || \ 1831 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V) || \ 1832 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V) || \ 1833 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V) || \ 1834 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V) || \ 1835 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V) || \ 1836 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V) || \ 1837 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V) || \ 1838 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V) || \ 1839 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V) || \ 1840 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V) || \ 1841 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V) || \ 1842 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V) || \ 1843 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V) || \ 1844 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V) || \ 1845 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V) || \ 1846 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V) || \ 1847 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V) || \ 1848 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V)) 1849 1850 /* Macro to validate core buck profile in Cy_SysPm_CoreBuckSetProfile() function */ 1851 #define CY_SYSPM_IS_CORE_BUCK_PROFILE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_PROFILE_MF) || \ 1852 ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_LP) || \ 1853 ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_ULP)) 1854 1855 /* Macro to validate parameters in Cy_SysPm_RetLdoConfigure() */ 1856 #define CY_SYSPM_IS_RETLDO_VOLTAGE_VALID(voltage) (((voltage) >= CY_SYSPM_RETLDO_VOLTAGE_LVL_0) && \ 1857 ((voltage) <= CY_SYSPM_RETLDO_VOLTAGE_LVL_31)) 1858 1859 /* Macro to validate parameters in Cy_SysPm_RetLdoConfigure() */ 1860 #define CY_SYSPM_IS_RETLDO_GAIN_VALID(voltage) (((voltage) == CY_SYSPM_RETLDO_GAIN_2) || \ 1861 ((voltage) == CY_SYSPM_RETLDO_GAIN_2_47)) 1862 1863 /* Macro to validate parameters in Cy_SysPm_SramLdoConfigure() */ 1864 #define CY_SYSPM_IS_SRAMLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_58V) || \ 1865 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_60V) || \ 1866 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_62V) || \ 1867 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_64V) || \ 1868 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_66V) || \ 1869 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_68V) || \ 1870 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_70V) || \ 1871 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_72V) || \ 1872 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_74V) || \ 1873 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_76V) || \ 1874 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_78V) || \ 1875 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_80V) || \ 1876 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_82V) || \ 1877 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_84V) || \ 1878 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_86V) || \ 1879 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_88V) || \ 1880 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_90V) || \ 1881 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_92V) || \ 1882 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_94V) || \ 1883 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_96V) || \ 1884 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_98V) || \ 1885 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_00V) || \ 1886 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_02V) || \ 1887 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_04V) || \ 1888 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_06V) || \ 1889 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_08V) || \ 1890 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_10V) || \ 1891 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_12V) || \ 1892 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_14V) || \ 1893 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_16V) || \ 1894 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_18V) || \ 1895 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_20V)) 1896 1897 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1898 #define CY_SYSPM_IS_MISCLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_58V) || \ 1899 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_60V) || \ 1900 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_62V) || \ 1901 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_64V) || \ 1902 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_66V) || \ 1903 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_68V) || \ 1904 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_70V) || \ 1905 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_72V) || \ 1906 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_74V) || \ 1907 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_76V) || \ 1908 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_78V) || \ 1909 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_80V) || \ 1910 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_82V) || \ 1911 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_84V) || \ 1912 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_86V) || \ 1913 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_88V) || \ 1914 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_90V) || \ 1915 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_92V) || \ 1916 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_94V) || \ 1917 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_96V) || \ 1918 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_98V) || \ 1919 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_00V) || \ 1920 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_02V) || \ 1921 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_04V) || \ 1922 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_06V) || \ 1923 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_08V) || \ 1924 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_10V) || \ 1925 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_12V) || \ 1926 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_14V) || \ 1927 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_16V) || \ 1928 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_18V) || \ 1929 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_20V)) 1930 1931 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1932 #define CY_SYSPM_IS_MISCLDO_MODE_VALID(mode) (((mode) == CY_SYSPM_MISCLDO_VCCACT) || \ 1933 ((mode) == CY_SYSPM_MISCLDO_VOUT)) 1934 1935 1936 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1937 #define CY_SYSPM_IS_MISCLDO_VCCACT_TRIM_VALID(trim) (((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_0) || \ 1938 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_5) || \ 1939 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_10) || \ 1940 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_15) || \ 1941 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_20) || \ 1942 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_25) || \ 1943 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_30) || \ 1944 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_35) || \ 1945 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_40) || \ 1946 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_35) || \ 1947 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_30) || \ 1948 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_25) || \ 1949 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_20) || \ 1950 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_15) || \ 1951 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_10) || \ 1952 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_5)) 1953 1954 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 1955 1956 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 1957 /** 1958 * \note 1959 * This macro is available for CAT1B and CAT1D devices. 1960 **/ 1961 1962 /* Macro to validate deep sleep modes in Cy_SysPm_CpuEnterDeepSleep() function */ 1963 #define CY_SYSPM_IS_DEEPSLEEP_MODE_VALID(mode) (((mode) == CY_SYSPM_DEEPSLEEP) || \ 1964 ((mode) == CY_SYSPM_DEEPSLEEP_RAM) || \ 1965 ((mode) == CY_SYSPM_DEEPSLEEP_OFF)) 1966 /* Macro to validate parameters in Cy_SysPm_SetupDeepSleepRAM() function */ 1967 #define CY_SYSPM_IS_DSRAM_CHECK_VALID(dsramCheck) (((dsramCheck) == CY_SYSPM_PRE_DSRAM) || \ 1968 ((dsramCheck) == CY_SYSPM_POST_DSRAM)) 1969 1970 /* Macro to validate core buck mode in Cy_SysPm_CoreBuckConfig() function */ 1971 #define CY_SYSPM_IS_CORE_BUCK_MODE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_MODE_LP) || \ 1972 ((mode) == CY_SYSPM_CORE_BUCK_MODE_HP)) 1973 1974 /* Macro to validate SOCMEM SRAM Power modes in Cy_SysPm_SetSOCMemPartitionPwrMode() function */ 1975 #define CY_SYSPM_IS_SOCMEM_PWR_MODE_VALID(mode) (((mode) == CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_ON) || \ 1976 ((mode) == CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_OFF) || \ 1977 ((mode) == CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_ON) || \ 1978 ((mode) == CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_OFF)) 1979 1980 #endif 1981 1982 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 1983 /** 1984 * \note 1985 * This macro is available for CAT1B devices. 1986 **/ 1987 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1988 ((type) == CY_SYSPM_LPACTIVE_ENTER)|| \ 1989 ((type) == CY_SYSPM_LPACTIVE_EXIT) || \ 1990 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1991 ((type) == CY_SYSPM_DEEPSLEEP_RAM) || \ 1992 ((type) == CY_SYSPM_DEEPSLEEP_OFF) || \ 1993 ((type) == CY_SYSPM_HIBERNATE)) 1994 1995 1996 /* Macro to validate parameters in Cy_SysPm_CoreBuckSetVoltage() & Cy_SysPm_CoreBuckConfig functions */ 1997 #define CY_SYSPM_IS_CORE_BUCK_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V) || \ 1998 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V) || \ 1999 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V) || \ 2000 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V) || \ 2001 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V) || \ 2002 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V) || \ 2003 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V) || \ 2004 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V) || \ 2005 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V) || \ 2006 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V) || \ 2007 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V) || \ 2008 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V) || \ 2009 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V) || \ 2010 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V) || \ 2011 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V) || \ 2012 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V) || \ 2013 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V) || \ 2014 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V) || \ 2015 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V) || \ 2016 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V) || \ 2017 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V) || \ 2018 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V) || \ 2019 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V) || \ 2020 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_22V) || \ 2021 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_24V) || \ 2022 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_26V) || \ 2023 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_28V) || \ 2024 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_30V) || \ 2025 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_32V) || \ 2026 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_34V) || \ 2027 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_36V) || \ 2028 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_38V)) 2029 2030 /* Macro to Enable/Disable Pause on Core Buck Regulator */ 2031 #define CY_SYSPM_CORE_BUCK_PAUSE_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_PAUSE, \ 2032 enable) 2033 2034 /* Macro to Enable/Disable Override on Core Buck Regulator */ 2035 #define CY_SYSPM_CORE_BUCK_OVERRRIDE_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_OVERRIDE, \ 2036 enable) 2037 2038 /* Macro to Enable/Disable Copy Settings of Core Buck Regulator*/ 2039 #define CY_SYSPM_CORE_BUCK_COPY_SETTINGS_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_COPY_SETTINGS, \ 2040 enable) 2041 2042 2043 /* Macro to validate core buck Inrush Limit in Cy_SysPm_CoreBuckConfig() function */ 2044 #define CY_SYSPM_IS_CORE_BUCK_INRUSH_LIMIT_VALID(limit) (((limit) == CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_10) || \ 2045 ((limit) == CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_100)) 2046 2047 /* Macro to validate parameters in Cy_SysPm_LdoSdrConfigure() function */ 2048 #define CY_SYSPM_IS_SDR_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SDR_VOLTAGE_0_900V) || \ 2049 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_000V) || \ 2050 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_100V)) 2051 2052 /* Macro to validate parameters in Cy_SysPm_HvLdoConfigure() function */ 2053 #define CY_SYSPM_IS_HVLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_500V) || \ 2054 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_600V) || \ 2055 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_700V) || \ 2056 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_800V) || \ 2057 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_900V) || \ 2058 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_000V) || \ 2059 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_100V) || \ 2060 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_200V) || \ 2061 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_300V) || \ 2062 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_400V) || \ 2063 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_500V) || \ 2064 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_600V) || \ 2065 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_700V) || \ 2066 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_800V) || \ 2067 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_900V) || \ 2068 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_3_000V)) 2069 2070 /* Macro to validate if the SDR number in Cy_SysPm_LdoSdrConfigure() function */ 2071 #define CY_SYSPM_IS_SDR_NUM_VALID(num) (((num) == CY_SYSPM_SDR_0) || \ 2072 ((num) == CY_SYSPM_SDR_1)) 2073 2074 /* Macro to validate parameters in RAM/ROM TRIM functions */ 2075 #define CY_SYSPM_IS_SDR_TRIM_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SDR_VOLTAGE_0_900V) || \ 2076 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_000V) || \ 2077 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_100V)) 2078 2079 /** 2080 * \note 2081 * This macro is available for CAT1B devices. 2082 **/ 2083 /* Macro to validate number of Macros supported in SRAM0 */ 2084 2085 #define CY_SYSPM_IS_SRAM0_MACRO_NUM_VALID(macroNum) (((macroNum) == CY_SYSPM_SRAM0_MACRO_0) || \ 2086 ((macroNum) == CY_SYSPM_SRAM0_MACRO_1)) 2087 2088 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 2089 2090 2091 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 2092 2093 #if defined (CY_IP_MXS40SSRSS) 2094 #define CY_SYSPM_IS_CALLBACK_MODE_VALID(mode) (((mode) == CY_SYSPM_CHECK_READY) || \ 2095 ((mode) == CY_SYSPM_CHECK_FAIL) || \ 2096 ((mode) == CY_SYSPM_BEFORE_TRANSITION) || \ 2097 ((mode) == CY_SYSPM_AFTER_TRANSITION) || \ 2098 ((mode) == CY_SYSPM_AFTER_DS_WFI_TRANSITION)) 2099 #else 2100 #define CY_SYSPM_IS_CALLBACK_MODE_VALID(mode) (((mode) == CY_SYSPM_CHECK_READY) || \ 2101 ((mode) == CY_SYSPM_CHECK_FAIL) || \ 2102 ((mode) == CY_SYSPM_BEFORE_TRANSITION) || \ 2103 ((mode) == CY_SYSPM_AFTER_TRANSITION)) 2104 #endif 2105 2106 2107 /* Macro to validate parameters in Cy_SysPm_CpuEnterSleep() and for Cy_SysPm_CpuEnterDeepSleep() function */ 2108 #define CY_SYSPM_IS_WAIT_FOR_VALID(waitFor) (((waitFor) == CY_SYSPM_WAIT_FOR_INTERRUPT) || \ 2109 ((waitFor) == CY_SYSPM_WAIT_FOR_EVENT)) 2110 2111 /* Macro to validate parameters in Cy_SysPm_BackupSetSupply() function */ 2112 #define CY_SYSPM_IS_VDDBACKUP_VALID(vddBackControl) (((vddBackControl) == CY_SYSPM_VDDBACKUP_DEFAULT) || \ 2113 ((vddBackControl) == CY_SYSPM_VDDBACKUP_VBACKUP)) 2114 2115 /* Macro to validate parameters in Cy_SysPm_BackupSuperCapCharge() function */ 2116 #define CY_SYSPM_IS_SC_CHARGE_KEY_VALID(key) (((key) == CY_SYSPM_SC_CHARGE_ENABLE) || \ 2117 ((key) == CY_SYSPM_SC_CHARGE_DISABLE)) 2118 2119 /* Macro to validate parameters in Cy_SysPm_LdoSetMode() function */ 2120 #define CY_SYSPM_IS_LDO_MODE_VALID(key) (((mode) == CY_SYSPM_LDO_MODE_DISABLED) || \ 2121 ((mode) == CY_SYSPM_LDO_MODE_NORMAL) || \ 2122 ((mode) == CY_SYSPM_LDO_MODE_MIN)) 2123 2124 /* Macro to validate parameters in Cy_SysPm_WriteVoltageBitForFlash() function */ 2125 #define CY_SYSPM_IS_BIT_FOR_FLASH_VALID(value) (((value) == CY_SYSPM_FLASH_VOLTAGE_BIT_ULP) || \ 2126 ((value) == CY_SYSPM_FLASH_VOLTAGE_BIT_LP)) 2127 2128 /** The internal define of the SRAM PWR MACRO register key for write operation */ 2129 #define CY_SYSPM_PWR_MACRO_CTL_WRITE_KEY (0x05FAU) 2130 2131 /** The internal define of the unlock value for the PMIC functions */ 2132 #define CY_SYSPM_PMIC_UNLOCK_KEY (0x3AU) 2133 2134 /** The internal define of the first wakeup pin bit used in the 2135 * Cy_SysPm_SetHibernateWakeupSource() function 2136 */ 2137 #define CY_SYSPM_HIB_WAKEUP_PIN0_POS (1UL) 2138 2139 /** The internal define of the second wakeup pin bit 2140 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2141 */ 2142 #define CY_SYSPM_HIB_WAKEUP_PIN1_POS (2UL) 2143 2144 /** 2145 * The internal define of the first LPComparator bit 2146 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2147 */ 2148 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS (4UL) 2149 2150 /** 2151 * The internal define for the second LPComparator bit 2152 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2153 */ 2154 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS (8UL) 2155 2156 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2157 2158 /** 2159 * The internal define of the first LPComparator value 2160 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2161 */ 2162 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2163 2164 /** 2165 * The internal define of the second LPComparator value 2166 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2167 */ 2168 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2169 2170 /** 2171 * The internal define of the first wake-up pin value 2172 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2173 */ 2174 #define CY_SYSPM_HIB_WAKEUP_PIN0_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2175 2176 /** 2177 * The internal define of the second wake-up pin value used 2178 * in the Cy_SysPm_SetHibernateWakeupSource() function 2179 */ 2180 #define CY_SYSPM_HIB_WAKEUP_PIN1_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2181 2182 /** The internal define for the first LPComparator polarity configuration */ 2183 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK \ 2184 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2185 2186 /** The internal define for the second LPComparator polarity configuration */ 2187 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK \ 2188 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2189 2190 /** The internal define for the first wake-up pin polarity configuration */ 2191 #define CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK \ 2192 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2193 2194 /** The internal define for the second wake-up pin polarity configuration */ 2195 #define CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK \ 2196 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2197 2198 /** 2199 * The internal define of the WDT wakeup source 2200 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2201 */ 2202 #define CY_SYSPM_HIB_WAKEUP_WDT_MASK SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_WDT_Msk 2203 2204 /** 2205 * The internal define of the WDT wakeup source 2206 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2207 */ 2208 #define CY_SYSPM_HIB_WAKEUP_RTC_MASK SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_RTC_Msk 2209 2210 #else 2211 2212 /** 2213 * The internal define of the first LPComparator value 2214 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2215 */ 2216 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2217 2218 /** 2219 * The internal define of the second LPComparator value 2220 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2221 */ 2222 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2223 2224 /** 2225 * The internal define of the first wake-up pin value 2226 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2227 */ 2228 #define CY_SYSPM_HIB_WAKEUP_PIN0_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2229 2230 /** 2231 * The internal define of the second wake-up pin value used 2232 * in the Cy_SysPm_SetHibernateWakeupSource() function 2233 */ 2234 #define CY_SYSPM_HIB_WAKEUP_PIN1_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2235 2236 /** The internal define for the first LPComparator polarity configuration */ 2237 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK \ 2238 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2239 2240 /** The internal define for the second LPComparator polarity configuration */ 2241 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK \ 2242 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2243 2244 /** The internal define for the first wake-up pin polarity configuration */ 2245 #define CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK \ 2246 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2247 2248 /** The internal define for the second wake-up pin polarity configuration */ 2249 #define CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK \ 2250 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2251 2252 #endif 2253 2254 /* Internal macro of all possible wakeup sources from hibernate power mode */ 2255 #define CY_SYSPM_HIB_WAKEUP_SOURSE_MASK (CY_SYSPM_HIBERNATE_LPCOMP0_LOW | CY_SYSPM_HIBERNATE_LPCOMP0_HIGH |\ 2256 CY_SYSPM_HIBERNATE_LPCOMP1_LOW | CY_SYSPM_HIBERNATE_LPCOMP1_HIGH |\ 2257 CY_SYSPM_HIBERNATE_RTC_ALARM | CY_SYSPM_HIBERNATE_WDT |\ 2258 CY_SYSPM_HIBERNATE_PIN0_LOW | CY_SYSPM_HIBERNATE_PIN0_HIGH |\ 2259 CY_SYSPM_HIBERNATE_PIN1_LOW | CY_SYSPM_HIBERNATE_PIN1_HIGH) 2260 2261 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2262 /** 2263 * \note 2264 * This macro is available for CAT1B & CAT1C devices. 2265 **/ 2266 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2267 * reference, Reference buffer, Current reference) when active core regulator is 2268 * LDO 2269 */ 2270 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_LDO_MASK (SRSS_PWR_CTL2_LINREG_LPMODE_Msk | CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK) 2271 2272 /** 2273 * \note 2274 * This macro is available for CAT1B & CAT1C devices. 2275 **/ 2276 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2277 * reference, Reference buffer, Current reference) when active core regulator is 2278 * Buck 2279 */ 2280 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK (SRSS_PWR_CTL2_PORBOD_LPMODE_Msk |\ 2281 SRSS_PWR_CTL2_REFVBUF_DIS_Msk |\ 2282 SRSS_PWR_CTL2_BGREF_LPMODE_Msk) 2283 2284 /** 2285 * \note 2286 * This macro is available for CAT1B & CAT1C devices. 2287 **/ 2288 /* Macro to validate the word index supported in Backup Domain for Store/Restore */ 2289 #define CY_SYSPM_IS_WORD_INDEX_VALID(index) ((index < CY_SRSS_BACKUP_NUM_BREG) && \ 2290 (index > 0U)) 2291 2292 /** 2293 * \note 2294 * This macro is available for CAT1B & CAT1C devices. 2295 **/ 2296 /* Macro to validate number of words supported in Backup Domain for Store/Restore */ 2297 #define CY_SYSPM_IS_WORD_SIZE_VALID(size) ((size) <= CY_SRSS_BACKUP_NUM_BREG) 2298 2299 #else 2300 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2301 * reference, Reference buffer, Current reference) when active core regulator is 2302 * LDO 2303 */ 2304 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_LDO_MASK (SRSS_PWR_CTL_LINREG_LPMODE_Msk | CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK) 2305 2306 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2307 * reference, Reference buffer, Current reference) when active core regulator is 2308 * Buck 2309 */ 2310 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK (SRSS_PWR_CTL_PORBOD_LPMODE_Msk |\ 2311 SRSS_PWR_CTL_ACT_REF_DIS_Msk |\ 2312 SRSS_PWR_CTL_VREFBUF_LPMODE_Msk |\ 2313 SRSS_PWR_CTL_IREF_LPMODE_Msk) 2314 #endif 2315 /** \endcond */ 2316 2317 /** 2318 * \defgroup group_syspm_return_status The Power Mode Status Defines 2319 * \{ 2320 * Defines for the CPU and system power modes status. 2321 */ 2322 2323 #ifdef CY_IP_M4CPUSS 2324 2325 /** The CM4 is in CPU Active mode */ 2326 #define CY_SYSPM_STATUS_CM4_ACTIVE (0x1U) 2327 2328 /** The CM4 is in CPU Sleep mode */ 2329 #define CY_SYSPM_STATUS_CM4_SLEEP (0x2U) 2330 2331 /** The CM4 is in CPU Deep Sleep mode */ 2332 #define CY_SYSPM_STATUS_CM4_DEEPSLEEP (0x4U) 2333 2334 #endif 2335 2336 #if (__CORTEX_M == 0) || (defined (__CM0P_PRESENT) && (__CM0P_PRESENT == 1)) 2337 2338 2339 /** The CM0p is CPU Active mode */ 2340 #define CY_SYSPM_STATUS_CM0_ACTIVE ((uint32_t) 0x1U << 4U) 2341 2342 /** The CM0p is in CPU Sleep mode */ 2343 #define CY_SYSPM_STATUS_CM0_SLEEP ((uint32_t) 0x2U << 4U) 2344 2345 /** The CM0p is in CPU Deep Sleep mode */ 2346 #define CY_SYSPM_STATUS_CM0_DEEPSLEEP ((uint32_t) 0x4U << 4U) 2347 2348 /** The CM0 is in low power mode, This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2349 #define CY_SYSPM_STATUS_CM0_LOWPOWER ((uint32_t) 0x88U << 8U) 2350 2351 #endif 2352 2353 2354 #ifdef CY_IP_M7CPUSS 2355 2356 /** The CM7_0 is Active */ 2357 #define CY_SYSPM_STATUS_CM7_0_ACTIVE ((uint32_t) ((uint32_t)0x1U << 8U)) 2358 2359 /** The CM7_0 is in Sleep */ 2360 #define CY_SYSPM_STATUS_CM7_0_SLEEP ((uint32_t) ((uint32_t)0x2U << 8U)) 2361 2362 /** The CM7_0 is in DeepSleep */ 2363 #define CY_SYSPM_STATUS_CM7_0_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 8U)) 2364 2365 /** The CM7_0 is Low Power mode. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2366 #define CY_SYSPM_STATUS_CM7_0_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 16U)) 2367 2368 /** The define of retained power mode of the CM7_0. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2369 #define CY_SYSPM_CM7_0_PWR_CTL_PWR_MODE_RETAINED (2U) 2370 2371 /** The CM7_1 is Active */ 2372 #define CY_SYSPM_STATUS_CM7_1_ACTIVE ((uint32_t) ((uint32_t)0x1U << 12U)) 2373 2374 /** The CM7_1 is in Sleep */ 2375 #define CY_SYSPM_STATUS_CM7_1_SLEEP ((uint32_t) ((uint32_t)0x2U << 12U)) 2376 2377 /** The CM7_1 is in DeepSleep */ 2378 #define CY_SYSPM_STATUS_CM7_1_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 12U)) 2379 2380 /** The CM7_1 is Low Power mode. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2381 #define CY_SYSPM_STATUS_CM7_1_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 24U)) 2382 2383 /** The define of retained power mode of the CM7_1. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2384 #define CY_SYSPM_CM7_1_PWR_CTL_PWR_MODE_RETAINED (2U) 2385 2386 #endif /* CY_IP_M7CPUSS */ 2387 2388 2389 #if defined (CY_IP_MXS22SRSS) 2390 2391 /** The CM33 is Active */ 2392 #define CY_SYSPM_STATUS_CM33_ACTIVE ((uint32_t) ((uint32_t)0x1U << 16U)) 2393 2394 /** The CM33 is in Sleep */ 2395 #define CY_SYSPM_STATUS_CM33_SLEEP ((uint32_t) ((uint32_t)0x2U << 16U)) 2396 2397 /** The CM33 is in DeepSleep */ 2398 #define CY_SYSPM_STATUS_CM33_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 16U)) 2399 2400 2401 /** The CM55 is Active */ 2402 #define CY_SYSPM_STATUS_CM55_ACTIVE ((uint32_t) ((uint32_t)0x1U << 20U)) 2403 2404 /** The CM55 is in Sleep */ 2405 #define CY_SYSPM_STATUS_CM55_SLEEP ((uint32_t) ((uint32_t)0x2U << 20U)) 2406 2407 /** The CM55 is in DeepSleep */ 2408 #define CY_SYSPM_STATUS_CM55_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 20U)) 2409 2410 #endif /* defined (CY_IP_MXS22SRSS) */ 2411 2412 /** The system is Low Power mode */ 2413 #define CY_SYSPM_STATUS_SYSTEM_LP ((uint32_t) ((uint32_t)0x80U)) 2414 2415 /** The system is in Ultra Low Power mode */ 2416 #define CY_SYSPM_STATUS_SYSTEM_ULP ((uint32_t) ((uint32_t)0x08U << 8U)) 2417 2418 /** The system is LPACTIVE Power mode */ 2419 #define CY_SYSPM_STATUS_SYSTEM_LPACTIVE ((uint32_t) ((uint32_t)0x08UL << 16U)) 2420 2421 /** The system is MF Low Power mode */ 2422 #define CY_SYSPM_STATUS_SYSTEM_MF ((uint32_t) ((uint32_t)0x08UL << 24U)) 2423 2424 /** The wait time for transition of the device from the Active into 2425 * the LPActive (Low Power Active) 2426 */ 2427 #define CY_SYSPM_ACTIVE_TO_LP_WAIT_US (1u) 2428 2429 /** The wait delay time which occurs before the Active reference is settled. 2430 * This delay is used in transition of the device from Active into the 2431 * LPACTIVE (Low Power Active) mode 2432 */ 2433 #define CY_SYSPM_LP_TO_ACTIVE_WAIT_BEFORE_US (8u) 2434 2435 /** The wait delay time which occurs after the Active reference is settled. 2436 * This delay is used in transition the device from Active into the 2437 * LPACTIVE (Low Power Active) mode 2438 */ 2439 #define CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US (1u) 2440 2441 /** The internal define of the tries number in the Cy_SysPm_ExitLpMode() 2442 * function 2443 */ 2444 #define CY_SYSPM_WAIT_DELAY_TRYES (100u) 2445 2446 /** \} group_syspm_return_status */ 2447 2448 /** \} group_syspm_macros */ 2449 2450 /******************************************************************************* 2451 * Configuration Structures 2452 *******************************************************************************/ 2453 2454 /** 2455 * \addtogroup group_syspm_data_enumerates 2456 * \{ 2457 */ 2458 2459 /** The SysPm function return value status definitions. */ 2460 typedef enum 2461 { 2462 CY_SYSPM_SUCCESS = 0x0U, /**< Successful. */ 2463 CY_SYSPM_BAD_PARAM = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< One or more invalid parameters. */ 2464 CY_SYSPM_TIMEOUT = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x02U, /**< A time-out occurred. */ 2465 CY_SYSPM_INVALID_STATE = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x03U, /**< The operation is not setup or is in an 2466 improper state. */ 2467 CY_SYSPM_CANCELED = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x04U, /**< Operation canceled. */ 2468 CY_SYSPM_SYSCALL_PENDING = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x05U, /**< Canceled due syscall operation pending. */ 2469 CY_SYSPM_FAIL = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0xFFU /**< Unknown failure. */ 2470 } cy_en_syspm_status_t; 2471 2472 /** 2473 * This enumeration is used to initialize the functions wait action. The wait actions can be - 2474 * an interrupt or an event. Refer to the CMSIS for WFE and WFI instruction explanations. 2475 */ 2476 typedef enum 2477 { 2478 CY_SYSPM_WAIT_FOR_INTERRUPT, /**< Wait for an interrupt. */ 2479 CY_SYSPM_WAIT_FOR_EVENT /**< Wait for an event. */ 2480 } cy_en_syspm_waitfor_t; 2481 2482 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 2483 /** 2484 * This enumeration is used to distinguish between the pre and post checks required during DS-RAM. 2485 */ 2486 /** 2487 * \note 2488 * This enum is available for CAT1B devices. 2489 **/ 2490 2491 typedef enum 2492 { 2493 CY_SYSPM_PRE_DSRAM, /**< Pre DSRAM Checks. */ 2494 CY_SYSPM_POST_DSRAM /**< Post DSRAM Checks. */ 2495 } cy_en_syspm_dsram_checks_t; 2496 #endif 2497 2498 /** This enumeration is used to configure wakeup sources for the System Hibernate 2499 * power mode. 2500 */ 2501 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2502 /** 2503 * \note 2504 * This macro is available for CAT1B & CAT1D devices. 2505 **/ 2506 2507 typedef enum 2508 { 2509 /** Wake on a low logic level for the LPComp0. */ 2510 CY_SYSPM_HIBERNATE_LPCOMP0_LOW = 0x1U, 2511 2512 /** Wake on a high logic level for the LPComp0. */ 2513 CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = (0x1U << 1), 2514 2515 /** Wake on a low logic level for the LPComp1. */ 2516 CY_SYSPM_HIBERNATE_LPCOMP1_LOW = (0x1U << 2), 2517 2518 /** Wake on a high logic level for the LPComp1. */ 2519 CY_SYSPM_HIBERNATE_LPCOMP1_HIGH = (0x1U << 3), 2520 2521 /** Configure the RTC alarm as wakeup source. */ 2522 CY_SYSPM_HIBERNATE_RTC_ALARM = (0x1U << 4), 2523 2524 /** Configure the WDT interrupt as wakeup source. */ 2525 CY_SYSPM_HIBERNATE_WDT = (0x1U << 5), 2526 2527 /** Configure a low logic level for the first wakeup-pin. See device datasheet for specific pin. */ 2528 CY_SYSPM_HIBERNATE_PIN0_LOW = (0x1U << 6), 2529 2530 /** Configure a high logic level for the first wakeup-pin. See device datasheet for specific pin.*/ 2531 CY_SYSPM_HIBERNATE_PIN0_HIGH = (0x1U << 7), 2532 2533 /** Configure a low logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2534 CY_SYSPM_HIBERNATE_PIN1_LOW = (0x1U << 8), 2535 2536 /** Configure a high logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2537 CY_SYSPM_HIBERNATE_PIN1_HIGH = (0x1U << 9) 2538 } cy_en_syspm_hibernate_wakeup_source_t; 2539 #else 2540 /** 2541 * \note 2542 * This macro is available for CAT1A and CAT1B devices. 2543 **/ 2544 typedef enum 2545 { 2546 /** Wake on a low logic level for the LPComp0. */ 2547 CY_SYSPM_HIBERNATE_LPCOMP0_LOW = CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK, 2548 2549 /** Wake on a high logic level for the LPComp0. */ 2550 CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK | CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK, 2551 2552 /** Wake on a low logic level for the LPComp1. */ 2553 CY_SYSPM_HIBERNATE_LPCOMP1_LOW = CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK, 2554 2555 /** Wake on a high logic level for the LPComp1. */ 2556 CY_SYSPM_HIBERNATE_LPCOMP1_HIGH = CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK | CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK, 2557 2558 /** Configure the RTC alarm as wakeup source. */ 2559 CY_SYSPM_HIBERNATE_RTC_ALARM = SRSS_PWR_HIBERNATE_MASK_HIBALARM_Msk, 2560 2561 /** Configure the WDT interrupt as wakeup source. */ 2562 CY_SYSPM_HIBERNATE_WDT = SRSS_PWR_HIBERNATE_MASK_HIBWDT_Msk, 2563 2564 /** Configure a low logic level for the first wakeup-pin. See device datasheet for specific pin. */ 2565 CY_SYSPM_HIBERNATE_PIN0_LOW = CY_SYSPM_HIB_WAKEUP_PIN0_MASK, 2566 2567 /** Configure a high logic level for the first wakeup-pin. See device datasheet for specific pin.*/ 2568 CY_SYSPM_HIBERNATE_PIN0_HIGH = CY_SYSPM_HIB_WAKEUP_PIN0_MASK | CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK, 2569 2570 /** Configure a low logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2571 CY_SYSPM_HIBERNATE_PIN1_LOW = CY_SYSPM_HIB_WAKEUP_PIN1_MASK, 2572 2573 /** Configure a high logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2574 CY_SYSPM_HIBERNATE_PIN1_HIGH = CY_SYSPM_HIB_WAKEUP_PIN1_MASK | CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK 2575 } cy_en_syspm_hibernate_wakeup_source_t; 2576 #endif 2577 /** This enumeration is used to select LDO regulator output voltage. */ 2578 typedef enum 2579 { 2580 CY_SYSPM_LDO_VOLTAGE_ULP = 0U, /**< System ULP nominal LDO voltage. 2581 See device datasheet for specific voltage. */ 2582 CY_SYSPM_LDO_VOLTAGE_LP = 1U, /**< System LP nominal LDO voltage. 2583 See device datasheet for specific voltage. */ 2584 CY_SYSPM_LDO_VOLTAGE_0_9V = 0U, /**< 0.9 V nominal LDO voltage */ 2585 CY_SYSPM_LDO_VOLTAGE_1_1V = 1U /**< 1.1 V nominal LDO voltage */ 2586 } cy_en_syspm_ldo_voltage_t; 2587 2588 /** This enumeration is used to select the LDO regulator operating mode. */ 2589 typedef enum 2590 { 2591 CY_SYSPM_LDO_MODE_DISABLED = 0U, /**< Disables the LDO. */ 2592 CY_SYSPM_LDO_MODE_NORMAL = 1U, /**< Sets normal current mode. See device datasheet for 2593 specific maximum current limit. */ 2594 CY_SYSPM_LDO_MODE_MIN = 2U /**< Sets minimum current mode. See device datasheet for 2595 specific current limit. */ 2596 } cy_en_syspm_ldo_mode_t; 2597 2598 /** 2599 * This enumeration is used to select the output voltage for the Buck regulator output 1. 2600 */ 2601 typedef enum 2602 { 2603 CY_SYSPM_BUCK_OUT1_VOLTAGE_ULP = 0x02U, /**< System ULP nominal Buck voltage. 2604 See device datasheet for specific voltage. */ 2605 CY_SYSPM_BUCK_OUT1_VOLTAGE_LP = 0x05U, /**< LP nominal Buck voltage. 2606 See device datasheet for specific voltage. */ 2607 CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V = 0x02U, /**< 0.9 V nominal Buck voltage */ 2608 CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V = 0x05U /**< 1.1 V nominal Buck voltage */ 2609 } cy_en_syspm_buck_voltage1_t; 2610 2611 /** This enumeration is used to select the Buck regulator outputs. */ 2612 typedef enum 2613 { 2614 CY_SYSPM_BUCK_VBUCK_1 = 0x0U, /**< Buck output 1 Voltage (Vbuck1). Typically used to 2615 supply the PSoC digital core logic. */ 2616 CY_SYSPM_BUCK_VRF /**< Buck out 2 Voltage (Vbuckrf). Typically used to 2617 supply the BLE radio logic. */ 2618 } cy_en_syspm_buck_out_t; 2619 2620 /** 2621 * This enumeration is used to select the output voltage for the Buck regulator 2622 * output 2, which can source the BLE radio. 2623 */ 2624 typedef enum 2625 { 2626 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V = 0U, /**< 1.15 V nominal voltage. */ 2627 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V = 1U, /**< 1.20 V nominal voltage. */ 2628 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V = 2U, /**< 1.25 V nominal voltage. */ 2629 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V = 3U, /**< 1.3 V nominal voltage. */ 2630 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V = 4U, /**< 1.35 V nominal voltage. */ 2631 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V = 5U, /**< 1.4 V nominal voltage. */ 2632 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V = 6U, /**< 1.45 V nominal voltage. */ 2633 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V = 7U /**< 1.5 V nominal voltage. */ 2634 } cy_en_syspm_buck_voltage2_t; 2635 2636 /** 2637 * This enumeration is used to set the polarity for the PMIC input. The PMIC output is 2638 * automatically enabled when the configured polarity of the PMIC input and the logic level 2639 * driven to the pmic_wakeup_in pin match. 2640 * 2641 * \warning 2642 * Do not use CY_SYSPM_PMIC_POLARITY_LOW as it is not supported by hardware. 2643 */ 2644 typedef enum 2645 { 2646 CY_SYSPM_PMIC_POLARITY_LOW = 0U, /**< Set active low logic level for the PMIC input. */ 2647 CY_SYSPM_PMIC_POLARITY_HIGH = 1U /**< Set active high logic level for the PMIC input. */ 2648 } cy_en_syspm_pmic_wakeup_polarity_t; 2649 2650 /** This enumeration selects Vbackup or Vddd to supply Vddbackup. */ 2651 typedef enum 2652 { 2653 CY_SYSPM_VDDBACKUP_DEFAULT = 0U, /**< Logic automatically selects Vddd if present or 2654 Vbackup if Vddd is not present to supply Vddbackup */ 2655 CY_SYSPM_VDDBACKUP_VBACKUP = 2U /**< Sets only Vbackup to supply Vddbackup */ 2656 } cy_en_syspm_vddbackup_control_t; 2657 2658 /** This enumeration enables supercapacitor charging. */ 2659 typedef enum 2660 { 2661 CY_SYSPM_SC_CHARGE_ENABLE = 0x3CU, /**< Enables supercapacitor charging */ 2662 CY_SYSPM_SC_CHARGE_DISABLE = 0x00U /**< Disables supercapacitor charging */ 2663 } cy_en_syspm_sc_charge_key_t; 2664 2665 /** This enumeration configures the flash voltage bit for different system power modes. */ 2666 typedef enum 2667 { 2668 CY_SYSPM_FLASH_VOLTAGE_BIT_LP = 0U, /**< Set the flash voltage bit for system LP mode */ 2669 CY_SYSPM_FLASH_VOLTAGE_BIT_ULP = 1U, /**< Set the flash voltage bit for system ULP mode */ 2670 } cy_en_syspm_flash_voltage_bit_t; 2671 2672 /** 2673 * This enumeration is used to select the low power mode for which the 2674 * appropriate registered callback handler will be executed. For example, 2675 * the registered callback of the type CY_SYSPM_SLEEP will be executed while 2676 * switching into the Sleep power mode. 2677 */ 2678 typedef enum 2679 { 2680 CY_SYSPM_SLEEP = 0U, /**< The Sleep enum callback type */ 2681 CY_SYSPM_DEEPSLEEP = 1U, /**< The Deep Sleep enum callback type */ 2682 CY_SYSPM_HIBERNATE = 2U, /**< The Hibernate enum callback type */ 2683 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2684 CY_SYSPM_LP = 3U, /**< The Low Power enum callback type, This Macro is available only for CAT1A devices */ 2685 CY_SYSPM_ULP = 4U, /**< The Ultra Low Power enum callback type, This Macro is available only for CAT1A devices */ 2686 #endif 2687 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2688 CY_SYSPM_LPACTIVE_ENTER = 3U, /**< The LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) ENTER enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2689 CY_SYSPM_LPACTIVE_EXIT = 4U, /**< The LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) EXIT enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2690 #endif 2691 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2692 CY_SYSPM_DEEPSLEEP_RAM = 5U, /**< The Deep Sleep RAM enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2693 CY_SYSPM_DEEPSLEEP_OFF = 6U, /**< The Deep Sleep OFF enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2694 #endif 2695 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2696 CY_SYSPM_MF = 7U, /**< The Medium Frequency enum callback type, This Macro is available only for CAT1D devices */ 2697 #endif 2698 } cy_en_syspm_callback_type_t; 2699 2700 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2701 /** 2702 * \note 2703 * This enum is available for CAT1B and CAT1D devices. 2704 **/ 2705 /** 2706 * This enumeration is used to list the available deep sleep modes. 2707 */ 2708 typedef enum 2709 { 2710 CY_SYSPM_MODE_DEEPSLEEP = CY_SYSPM_DEEPSLEEP, /**< Deep Sleep Mode. */ 2711 CY_SYSPM_MODE_DEEPSLEEP_RAM = CY_SYSPM_DEEPSLEEP_RAM, /**< Deep Sleep RAM Mode. */ 2712 CY_SYSPM_MODE_DEEPSLEEP_OFF = CY_SYSPM_DEEPSLEEP_OFF, /**< Deep Sleep OFF Mode. */ 2713 CY_SYSPM_MODE_DEEPSLEEP_NONE = CY_SYSPM_SLEEP, /**< Not Deep Sleep Mode. */ 2714 } cy_en_syspm_deep_sleep_mode_t; 2715 2716 /** 2717 * \note 2718 * This enum is available for CAT1B and CAT1D devices. 2719 **/ 2720 /** 2721 * This enumeration is used to list the available wakeup modes after deepsleep. 2722 */ 2723 typedef enum 2724 { 2725 CY_SYSPM_WARM_BOOT_MODE = 0, /**< Warm Boot - After DEEPSLEEP-RAM. */ 2726 CY_SYSPM_COLD_BOOT_MODE = 1, /**< Cold Boot - After DEEPSLEEP-OFF. */ 2727 CY_SYSPM_POR_BOOT_MODE = 2, /**< POR Boot - After POR Wakeup. */ 2728 } cy_en_syspm_boot_mode_t; 2729 2730 /** 2731 * \note 2732 * This enum is available for CAT1B and CAT1D devices. 2733 **/ 2734 /** 2735 * This enumeration is used to select the mode for the 2736 * Core Buck regulator. 2737 */ 2738 typedef enum 2739 { 2740 CY_SYSPM_CORE_BUCK_MODE_LP = 0x01U, /**< Low Power Mode. */ 2741 CY_SYSPM_CORE_BUCK_MODE_HP = 0x11U, /**< High Power Mode(Low Ripple Mode) */ 2742 } cy_en_syspm_core_buck_mode_t; 2743 2744 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 2745 /** 2746 * \note 2747 * This enum is available for CAT1B devices. 2748 **/ 2749 /** 2750 * This enumeration is used to select the Inrush limit for the 2751 * Core Buck regulator. 2752 */ 2753 typedef enum 2754 { 2755 CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_10 = 0U, /**< Inrush limit : 10mA. */ 2756 CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_100 = 1U, /**< Inrush limit : 100mA. */ 2757 } cy_en_syspm_core_inrush_limit_t; 2758 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 2759 2760 2761 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2762 2763 /** 2764 * \note 2765 * This enum is available for CAT1D devices. 2766 **/ 2767 /** 2768 * This enumeration is used to select the output voltage for the 2769 * Core Buck regulator output. 2770 */ 2771 2772 typedef enum 2773 { 2774 CY_SYSPM_CORE_BUCK_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 2775 CY_SYSPM_CORE_BUCK_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 2776 CY_SYSPM_CORE_BUCK_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 2777 CY_SYSPM_CORE_BUCK_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 2778 CY_SYSPM_CORE_BUCK_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 2779 CY_SYSPM_CORE_BUCK_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 2780 CY_SYSPM_CORE_BUCK_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 2781 CY_SYSPM_CORE_BUCK_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 2782 CY_SYSPM_CORE_BUCK_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 2783 CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 2784 CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 2785 CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 2786 CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 2787 CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 2788 CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 2789 CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 2790 CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 2791 CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 2792 CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 2793 CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 2794 CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 2795 CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 2796 CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 2797 CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 2798 CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 2799 CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 2800 CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 2801 CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 2802 CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 2803 CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 2804 CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 2805 CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 2806 } cy_en_syspm_core_buck_voltage_t; 2807 2808 2809 #else 2810 2811 typedef enum 2812 { 2813 CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V = 0U, /**< 0.76 V nominal voltage. */ 2814 CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V = 1U, /**< 0.78 V nominal voltage. */ 2815 CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V = 2U, /**< 0.80 V nominal voltage. */ 2816 CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V = 3U, /**< 0.82 V nominal voltage. */ 2817 CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V = 4U, /**< 0.84 V nominal voltage. */ 2818 CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V = 5U, /**< 0.86 V nominal voltage. */ 2819 CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V = 6U, /**< 0.88 V nominal voltage. */ 2820 CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V = 7U, /**< 0.90 V nominal voltage. */ 2821 CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V = 8U, /**< 0.92 V nominal voltage. */ 2822 CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V = 9U, /**< 0.94 V nominal voltage. */ 2823 CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V = 10U, /**< 0.96 V nominal voltage. */ 2824 CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V = 11U, /**< 0.98 V nominal voltage. */ 2825 CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V = 12U, /**< 1.00 V nominal voltage. */ 2826 CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V = 13U, /**< 1.02 V nominal voltage. */ 2827 CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V = 14U, /**< 1.04 V nominal voltage. */ 2828 CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V = 15U, /**< 1.06 V nominal voltage. */ 2829 CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V = 16U, /**< 1.08 V nominal voltage. */ 2830 CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V = 17U, /**< 1.10 V nominal voltage. */ 2831 CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V = 18U, /**< 1.12 V nominal voltage. */ 2832 CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V = 19U, /**< 1.14 V nominal voltage. */ 2833 CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V = 20U, /**< 1.16 V nominal voltage. */ 2834 CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V = 21U, /**< 1.18 V nominal voltage. */ 2835 CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V = 22U, /**< 1.20 V nominal voltage. */ 2836 CY_SYSPM_CORE_BUCK_VOLTAGE_1_22V = 23U, /**< 1.22 V nominal voltage. */ 2837 CY_SYSPM_CORE_BUCK_VOLTAGE_1_24V = 24U, /**< 1.24 V nominal voltage. */ 2838 CY_SYSPM_CORE_BUCK_VOLTAGE_1_26V = 25U, /**< 1.26 V nominal voltage. */ 2839 CY_SYSPM_CORE_BUCK_VOLTAGE_1_28V = 26U, /**< 1.28 V nominal voltage. */ 2840 CY_SYSPM_CORE_BUCK_VOLTAGE_1_30V = 27U, /**< 1.30 V nominal voltage. */ 2841 CY_SYSPM_CORE_BUCK_VOLTAGE_1_32V = 28U, /**< 1.32 V nominal voltage. */ 2842 CY_SYSPM_CORE_BUCK_VOLTAGE_1_34V = 29U, /**< 1.34 V nominal voltage. */ 2843 CY_SYSPM_CORE_BUCK_VOLTAGE_1_36V = 30U, /**< 1.36 V nominal voltage. */ 2844 CY_SYSPM_CORE_BUCK_VOLTAGE_1_38V = 31U, /**< 1.38 V nominal voltage. */ 2845 } cy_en_syspm_core_buck_voltage_t; 2846 #endif 2847 2848 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2849 2850 /** 2851 * \note 2852 * This enum is available for CAT1B and CAT1D devices. 2853 **/ 2854 /** 2855 * This enumeration is used to select the mode for the 2856 * Core Buck regulator. 2857 */ 2858 typedef enum 2859 { 2860 CY_SYSPM_CORE_BUCK_PROFILE_MF = 0x00U, /**< Mode-0, MF Profile */ 2861 CY_SYSPM_CORE_BUCK_PROFILE_LP = 0x01U, /**< Mode-1, LP Profile */ 2862 CY_SYSPM_CORE_BUCK_PROFILE_ULP = 0x02U, /**< Mode-2, ULP Profile */ 2863 CY_SYSPM_CORE_BUCK_PROFILE_SKIP = 0x11U, /**< Skip CBUCK Profile Usage */ 2864 } cy_en_syspm_core_buck_profile_t; 2865 2866 2867 /** 2868 * \note 2869 * This enum is available for CAT1D devices. 2870 **/ 2871 /** 2872 * This enumeration is used to select the output voltage for the 2873 * SRAMLDO. 2874 */ 2875 2876 typedef enum 2877 { 2878 CY_SYSPM_SRAMLDO_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 2879 CY_SYSPM_SRAMLDO_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 2880 CY_SYSPM_SRAMLDO_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 2881 CY_SYSPM_SRAMLDO_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 2882 CY_SYSPM_SRAMLDO_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 2883 CY_SYSPM_SRAMLDO_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 2884 CY_SYSPM_SRAMLDO_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 2885 CY_SYSPM_SRAMLDO_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 2886 CY_SYSPM_SRAMLDO_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 2887 CY_SYSPM_SRAMLDO_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 2888 CY_SYSPM_SRAMLDO_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 2889 CY_SYSPM_SRAMLDO_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 2890 CY_SYSPM_SRAMLDO_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 2891 CY_SYSPM_SRAMLDO_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 2892 CY_SYSPM_SRAMLDO_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 2893 CY_SYSPM_SRAMLDO_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 2894 CY_SYSPM_SRAMLDO_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 2895 CY_SYSPM_SRAMLDO_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 2896 CY_SYSPM_SRAMLDO_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 2897 CY_SYSPM_SRAMLDO_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 2898 CY_SYSPM_SRAMLDO_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 2899 CY_SYSPM_SRAMLDO_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 2900 CY_SYSPM_SRAMLDO_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 2901 CY_SYSPM_SRAMLDO_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 2902 CY_SYSPM_SRAMLDO_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 2903 CY_SYSPM_SRAMLDO_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 2904 CY_SYSPM_SRAMLDO_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 2905 CY_SYSPM_SRAMLDO_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 2906 CY_SYSPM_SRAMLDO_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 2907 CY_SYSPM_SRAMLDO_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 2908 CY_SYSPM_SRAMLDO_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 2909 CY_SYSPM_SRAMLDO_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 2910 } cy_en_syspm_sramldo_voltage_t; 2911 2912 2913 2914 /** 2915 * \note 2916 * This enum is available for CAT1D devices. 2917 **/ 2918 /** 2919 * This enumeration is used to select the output voltage for the 2920 * RETLDO. 2921 */ 2922 /* 2923 RETLDO Voltage Level table: 2924 2925 ------------------------------------------------- 2926 | RETLDO gain = 0 | RETLDO gain = 1 | 2927 LVL | Temp | Temp | Temp | Temp | 2928 | -40C | 25C-125C | -40C | 25C-125C | 2929 ------------------------------------------------- 2930 00000 0.6150 0.550 0.7595 0.679 2931 00001 0.6262 0.560 0.7733 0.691 2932 00010 0.6374 0.570 0.7871 0.704 2933 00011 0.6485 0.580 0.8010 0.716 2934 00100 0.6597 0.590 0.8148 0.728 2935 00101 0.6709 0.600 0.8286 0.741 2936 00110 0.6821 0.610 0.8424 0.753 2937 00111 0.6933 0.620 0.8562 0.765 2938 01000 0.7045 0.630 0.8700 0.778 2939 01001 0.7045 0.630 0.8700 0.778 2940 01010 0.7045 0.630 0.8700 0.778 2941 01011 0.7045 0.630 0.8700 0.778 2942 01100 0.7045 0.630 0.8700 0.778 2943 01101 0.7045 0.630 0.8700 0.778 2944 01110 0.7045 0.630 0.8700 0.778 2945 01111 0.7045 0.630 0.8700 0.778 2946 10000 0.4361 0.390 0.5386 0.481 2947 10001 0.4473 0.400 0.5524 0.494 2948 10010 0.4585 0.410 0.5662 0.506 2949 10011 0.4696 0.420 0.5800 0.519 2950 10100 0.4808 0.430 0.5938 0.531 2951 10101 0.4920 0.440 0.6076 0.543 2952 10110 0.5032 0.450 0.6214 0.556 2953 10111 0.5144 0.460 0.6352 0.568 2954 11000 0.5255 0.470 0.6490 0.580 2955 11001 0.5367 0.480 0.6629 0.593 2956 11010 0.5479 0.490 0.6767 0.605 2957 11011 0.5591 0.500 0.6905 0.617 2958 11100 0.5703 0.510 0.7043 0.630 2959 11101 0.5815 0.520 0.7181 0.642 2960 11110 0.5926 0.530 0.7319 0.654 2961 11111 0.6038 0.540 0.7457 0.667 2962 */ 2963 typedef enum 2964 { 2965 CY_SYSPM_RETLDO_VOLTAGE_LVL_0 = 0U, /**< Refer RETLDO Voltage Level table. */ 2966 CY_SYSPM_RETLDO_VOLTAGE_LVL_1 = 1U, /**< Refer RETLDO Voltage Level table. */ 2967 CY_SYSPM_RETLDO_VOLTAGE_LVL_2 = 2U, /**< Refer RETLDO Voltage Level table. */ 2968 CY_SYSPM_RETLDO_VOLTAGE_LVL_3 = 3U, /**< Refer RETLDO Voltage Level table. */ 2969 CY_SYSPM_RETLDO_VOLTAGE_LVL_4 = 4U, /**< Refer RETLDO Voltage Level table. */ 2970 CY_SYSPM_RETLDO_VOLTAGE_LVL_5 = 5U, /**< Refer RETLDO Voltage Level table. */ 2971 CY_SYSPM_RETLDO_VOLTAGE_LVL_6 = 6U, /**< Refer RETLDO Voltage Level table. */ 2972 CY_SYSPM_RETLDO_VOLTAGE_LVL_7 = 7U, /**< Refer RETLDO Voltage Level table. */ 2973 CY_SYSPM_RETLDO_VOLTAGE_LVL_8 = 8U, /**< Refer RETLDO Voltage Level table. */ 2974 CY_SYSPM_RETLDO_VOLTAGE_LVL_9 = 9U, /**< Refer RETLDO Voltage Level table. */ 2975 CY_SYSPM_RETLDO_VOLTAGE_LVL_10 = 10U, /**< Refer RETLDO Voltage Level table. */ 2976 CY_SYSPM_RETLDO_VOLTAGE_LVL_11 = 11U, /**< Refer RETLDO Voltage Level table. */ 2977 CY_SYSPM_RETLDO_VOLTAGE_LVL_12 = 12U, /**< Refer RETLDO Voltage Level table. */ 2978 CY_SYSPM_RETLDO_VOLTAGE_LVL_13 = 13U, /**< Refer RETLDO Voltage Level table. */ 2979 CY_SYSPM_RETLDO_VOLTAGE_LVL_14 = 14U, /**< Refer RETLDO Voltage Level table. */ 2980 CY_SYSPM_RETLDO_VOLTAGE_LVL_15 = 15U, /**< Refer RETLDO Voltage Level table. */ 2981 CY_SYSPM_RETLDO_VOLTAGE_LVL_16 = 16U, /**< Refer RETLDO Voltage Level table. */ 2982 CY_SYSPM_RETLDO_VOLTAGE_LVL_17 = 17U, /**< Refer RETLDO Voltage Level table. */ 2983 CY_SYSPM_RETLDO_VOLTAGE_LVL_18 = 18, /**< Refer RETLDO Voltage Level table. */ 2984 CY_SYSPM_RETLDO_VOLTAGE_LVL_19 = 19U, /**< Refer RETLDO Voltage Level table. */ 2985 CY_SYSPM_RETLDO_VOLTAGE_LVL_20 = 20U, /**< Refer RETLDO Voltage Level table. */ 2986 CY_SYSPM_RETLDO_VOLTAGE_LVL_21 = 21U, /**< Refer RETLDO Voltage Level table. */ 2987 CY_SYSPM_RETLDO_VOLTAGE_LVL_22 = 22U, /**< Refer RETLDO Voltage Level table. */ 2988 CY_SYSPM_RETLDO_VOLTAGE_LVL_23 = 23U, /**< Refer RETLDO Voltage Level table. */ 2989 CY_SYSPM_RETLDO_VOLTAGE_LVL_24 = 24U, /**< Refer RETLDO Voltage Level table. */ 2990 CY_SYSPM_RETLDO_VOLTAGE_LVL_25 = 25U, /**< Refer RETLDO Voltage Level table. */ 2991 CY_SYSPM_RETLDO_VOLTAGE_LVL_26 = 26U, /**< Refer RETLDO Voltage Level table. */ 2992 CY_SYSPM_RETLDO_VOLTAGE_LVL_27 = 27U, /**< Refer RETLDO Voltage Level table. */ 2993 CY_SYSPM_RETLDO_VOLTAGE_LVL_28 = 28U, /**< Refer RETLDO Voltage Level table. */ 2994 CY_SYSPM_RETLDO_VOLTAGE_LVL_29 = 29U, /**< Refer RETLDO Voltage Level table. */ 2995 CY_SYSPM_RETLDO_VOLTAGE_LVL_30 = 30U, /**< Refer RETLDO Voltage Level table. */ 2996 CY_SYSPM_RETLDO_VOLTAGE_LVL_31 = 31U, /**< Refer RETLDO Voltage Level table. */ 2997 } cy_en_syspm_retldo_voltage_t; 2998 2999 /** 3000 * \note 3001 * This enum is available for CAT1D devices. 3002 **/ 3003 /** 3004 * For RETLDO, this enumeration is used to select the Gain value 3005 */ 3006 typedef enum 3007 { 3008 CY_SYSPM_RETLDO_GAIN_2 = 0U, /**< Gain = 2 */ 3009 CY_SYSPM_RETLDO_GAIN_2_47 = 1U, /**< Gain = 2.47 */ 3010 } cy_en_syspm_retldo_gain_t; 3011 3012 3013 /** 3014 * \note 3015 * This enum is available for CAT1D devices. 3016 **/ 3017 /** 3018 * This enumeration is used to select the output voltage(VOUT) for the 3019 * MISCLDO. 3020 */ 3021 3022 typedef enum 3023 { 3024 CY_SYSPM_MISCLDO_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 3025 CY_SYSPM_MISCLDO_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 3026 CY_SYSPM_MISCLDO_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 3027 CY_SYSPM_MISCLDO_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 3028 CY_SYSPM_MISCLDO_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 3029 CY_SYSPM_MISCLDO_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 3030 CY_SYSPM_MISCLDO_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 3031 CY_SYSPM_MISCLDO_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 3032 CY_SYSPM_MISCLDO_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 3033 CY_SYSPM_MISCLDO_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 3034 CY_SYSPM_MISCLDO_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 3035 CY_SYSPM_MISCLDO_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 3036 CY_SYSPM_MISCLDO_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 3037 CY_SYSPM_MISCLDO_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 3038 CY_SYSPM_MISCLDO_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 3039 CY_SYSPM_MISCLDO_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 3040 CY_SYSPM_MISCLDO_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 3041 CY_SYSPM_MISCLDO_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 3042 CY_SYSPM_MISCLDO_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 3043 CY_SYSPM_MISCLDO_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 3044 CY_SYSPM_MISCLDO_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 3045 CY_SYSPM_MISCLDO_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 3046 CY_SYSPM_MISCLDO_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 3047 CY_SYSPM_MISCLDO_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 3048 CY_SYSPM_MISCLDO_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 3049 CY_SYSPM_MISCLDO_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 3050 CY_SYSPM_MISCLDO_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 3051 CY_SYSPM_MISCLDO_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 3052 CY_SYSPM_MISCLDO_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 3053 CY_SYSPM_MISCLDO_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 3054 CY_SYSPM_MISCLDO_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 3055 CY_SYSPM_MISCLDO_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 3056 } cy_en_syspm_miscldo_voltage_t; 3057 3058 /** 3059 * \note 3060 * This enum is available for CAT1D devices. 3061 **/ 3062 /** 3063 * This enumeration is used to select the trim settings for the 3064 * VCCACT voltage of MISCLDO. 3065 */ 3066 3067 typedef enum 3068 { 3069 CY_SYSPM_MISCLDO_VCCACT_TRIM_0 = 0U, /**< 0mV Trim Setting. */ 3070 CY_SYSPM_MISCLDO_VCCACT_TRIM_5 = 1U, /**< 5mV Trim Setting. */ 3071 CY_SYSPM_MISCLDO_VCCACT_TRIM_10 = 2U, /**< 10mV nominal voltage. */ 3072 CY_SYSPM_MISCLDO_VCCACT_TRIM_15 = 3U, /**< 15mV Trim Setting. */ 3073 CY_SYSPM_MISCLDO_VCCACT_TRIM_20 = 4U, /**< 20mV Trim Setting. */ 3074 CY_SYSPM_MISCLDO_VCCACT_TRIM_25 = 5U, /**< 25mV Trim Setting. */ 3075 CY_SYSPM_MISCLDO_VCCACT_TRIM_30 = 6U, /**< 30mV Trim Setting. */ 3076 CY_SYSPM_MISCLDO_VCCACT_TRIM_35 = 7U, /**< 35mV Trim Setting. */ 3077 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_40 = 8U, /**< -40mV Trim Setting. */ 3078 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_35 = 9U, /**< -35mV Trim Setting. */ 3079 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_30 = 10U, /**< -30mV Trim Setting. */ 3080 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_25 = 11U, /**< -25mV Trim Setting. */ 3081 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_20 = 12U, /**< -20mV Trim Setting. */ 3082 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_15 = 13U, /**< -15mV Trim Setting. */ 3083 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_10 = 14U, /**< -10mV Trim Setting. */ 3084 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_5 = 15U, /**< -5mV Trim Setting. */ 3085 } cy_en_syspm_miscldo_vccact_trim_t; 3086 3087 /** 3088 * \note 3089 * This enum is available for CAT1D devices. 3090 **/ 3091 /** 3092 * For MISCLDO, this enumeration is used to select the output mode for MISCLDO 3093 */ 3094 typedef enum 3095 { 3096 CY_SYSPM_MISCLDO_VCCACT = 0U, /**< MISCLDO output follows VCCACT_MISC */ 3097 CY_SYSPM_MISCLDO_VOUT = 1U, /**< MISCLDO output follows VOUT */ 3098 } cy_en_syspm_miscldo_mode_t; 3099 3100 #endif /* defined (CY_IP_MXS22SRSS) */ 3101 3102 3103 /** 3104 * \note 3105 * This enum is available for CAT1B devices. 3106 **/ 3107 /** 3108 * For SDR's(Step Down Regulators), this enumeration is used to select the SDR0 or SDR1 3109 */ 3110 typedef enum 3111 { 3112 CY_SYSPM_SDR_0 = 0U, /**< SDR0 */ 3113 CY_SYSPM_SDR_1 = 1U, /**< SDR1 */ 3114 } cy_en_syspm_sdr_t; 3115 3116 /** 3117 * \note 3118 * This enum is available for CAT1B devices. 3119 **/ 3120 /** 3121 * This enumeration is used to select the output voltage for the 3122 * SDR(Step Down Regulator) output. 3123 */ 3124 typedef enum 3125 { 3126 CY_SYSPM_SDR_VOLTAGE_0_850V = 0U, /**< 0.850 V nominal voltage. */ 3127 CY_SYSPM_SDR_VOLTAGE_0_875V = 1U, /**< 0.875 V nominal voltage. */ 3128 CY_SYSPM_SDR_VOLTAGE_0_900V = 2U, /**< 0.900 V nominal voltage. */ 3129 CY_SYSPM_SDR_VOLTAGE_0_925V = 3U, /**< 0.925 V nominal voltage. */ 3130 CY_SYSPM_SDR_VOLTAGE_0_950V = 4U, /**< 0.950 V nominal voltage. */ 3131 CY_SYSPM_SDR_VOLTAGE_0_975V = 5U, /**< 0.975 V nominal voltage. */ 3132 CY_SYSPM_SDR_VOLTAGE_1_000V = 6U, /**< 1.000 V nominal voltage. */ 3133 CY_SYSPM_SDR_VOLTAGE_1_025V = 7U, /**< 1.025 V nominal voltage. */ 3134 CY_SYSPM_SDR_VOLTAGE_1_050V = 8U, /**< 1.050 V nominal voltage. */ 3135 CY_SYSPM_SDR_VOLTAGE_1_075V = 9U, /**< 1.075 V nominal voltage. */ 3136 CY_SYSPM_SDR_VOLTAGE_1_100V = 10U, /**< 1.100 V nominal voltage. */ 3137 CY_SYSPM_SDR_VOLTAGE_1_125V = 11U, /**< 1.125 V nominal voltage. */ 3138 CY_SYSPM_SDR_VOLTAGE_1_150V = 12U, /**< 1.150 V nominal voltage. */ 3139 CY_SYSPM_SDR_VOLTAGE_1_175V = 13U, /**< 1.175 V nominal voltage. */ 3140 CY_SYSPM_SDR_VOLTAGE_1_200V = 14U, /**< 1.200 V nominal voltage. */ 3141 CY_SYSPM_SDR_VOLTAGE_1_225V = 15U, /**< 1.225 V nominal voltage. */ 3142 } cy_en_syspm_sdr_voltage_t; 3143 3144 /** 3145 * \note 3146 * This enum is available for CAT1B devices. 3147 **/ 3148 /** 3149 * This enumeration is used to select the output voltage for the 3150 * HVLDO Regulator. 3151 */ 3152 typedef enum 3153 { 3154 CY_SYSPM_HVLDO_VOLTAGE_1_500V = 0U, /**< 1.500 V nominal voltage. */ 3155 CY_SYSPM_HVLDO_VOLTAGE_1_600V = 1U, /**< 1.600 V nominal voltage. */ 3156 CY_SYSPM_HVLDO_VOLTAGE_1_700V = 2U, /**< 1.700 V nominal voltage. */ 3157 CY_SYSPM_HVLDO_VOLTAGE_1_800V = 3U, /**< 1.800 V nominal voltage. */ 3158 CY_SYSPM_HVLDO_VOLTAGE_1_900V = 4U, /**< 1.900 V nominal voltage. */ 3159 CY_SYSPM_HVLDO_VOLTAGE_2_000V = 5U, /**< 2.000 V nominal voltage. */ 3160 CY_SYSPM_HVLDO_VOLTAGE_2_100V = 6U, /**< 2.100 V nominal voltage. */ 3161 CY_SYSPM_HVLDO_VOLTAGE_2_200V = 7U, /**< 2.200 V nominal voltage. */ 3162 CY_SYSPM_HVLDO_VOLTAGE_2_300V = 8U, /**< 2.300 V nominal voltage. */ 3163 CY_SYSPM_HVLDO_VOLTAGE_2_400V = 9U, /**< 2.400 V nominal voltage. */ 3164 CY_SYSPM_HVLDO_VOLTAGE_2_500V = 10U, /**< 2.500 V nominal voltage. */ 3165 CY_SYSPM_HVLDO_VOLTAGE_2_600V = 11U, /**< 2.600 V nominal voltage. */ 3166 CY_SYSPM_HVLDO_VOLTAGE_2_700V = 12U, /**< 2.700 V nominal voltage. */ 3167 CY_SYSPM_HVLDO_VOLTAGE_2_800V = 13U, /**< 2.800 V nominal voltage. */ 3168 CY_SYSPM_HVLDO_VOLTAGE_2_900V = 14U, /**< 2.900 V nominal voltage. */ 3169 CY_SYSPM_HVLDO_VOLTAGE_3_000V = 15U, /**< 3.000 V nominal voltage. */ 3170 } cy_en_syspm_hvldo_voltage_t; 3171 3172 3173 #endif 3174 3175 3176 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_DOXYGEN) 3177 /** 3178 * \note 3179 * This enum is available for CAT1C devices. 3180 **/ 3181 /** 3182 * Selects the voltage threshold for OVD on VDDD 3183 */ 3184 typedef enum 3185 { 3186 CY_SYSPM_OVD_VDDD_5_5V = 0x0u, /**< OVD -> VDDD > 5.5 V */ 3187 CY_SYSPM_OVD_VDDD_5_0V = 0x01u /**< OVD -> VDDD > 5.0 V */ 3188 } cy_en_syspm_ovd_vddd_sel_t; 3189 3190 /** 3191 * \note 3192 * This enum is available for CAT1C devices. 3193 **/ 3194 /** 3195 * Selects the voltage threshold for OVD on VDDA 3196 */ 3197 typedef enum 3198 { 3199 CY_SYSPM_OVD_VDDA_5_5V = 0x0u, /**< OVD -> VDDA > 5.5 V */ 3200 CY_SYSPM_OVD_VDDA_5_0V = 0x01u /**< OVD -> VDDA > 5.0 V */ 3201 } cy_en_syspm_ovd_vdda_sel_t; 3202 3203 /** 3204 * \note 3205 * This enum is available for CAT1C devices. 3206 **/ 3207 /** 3208 * Selects OVD over VDDD or VDDA or VCCD 3209 */ 3210 typedef enum 3211 { 3212 CY_SYSPM_OVD_ON_VDDD = 0x0u, /**< OVD -> VDDD */ 3213 CY_SYSPM_OVD_ON_VDDA = 0x01u, /**< OVD -> VDDA */ 3214 CY_SYSPM_OVD_ON_VCCD = 0x02u /**< OVD -> VCCD */ 3215 } cy_en_syspm_ovd_sel_t; 3216 3217 /** 3218 * \note 3219 * This enum is available for CAT1C devices. 3220 **/ 3221 /** 3222 * OVD action select configuration. 3223 */ 3224 typedef enum 3225 { 3226 CY_SYSPM_OVD_ACTION_NOTHING = 0x0u, /**<Select OVD action select: nothing */ 3227 CY_SYSPM_OVD_ACTION_FAULT = 0x1u, /**<Select OVD action select: fault */ 3228 CY_SYSPM_OVD_ACTION_RESET = 0x2u, /**<Select OVD action select: reset */ 3229 } cy_en_syspm_ovd_action_select_t; 3230 3231 /** 3232 * \note 3233 * This enum is available for CAT1C devices. 3234 **/ 3235 /** 3236 * Selects the voltage threshold for BOD on VDDD 3237 */ 3238 typedef enum 3239 { 3240 CY_SYSPM_BOD_VDDD_2_7V = 0x0u, /**< BOD -> VDDD < 2.7 V */ 3241 CY_SYSPM_BOD_VDDD_3_0V = 0x01u /**< BOD -> VDDD < 3.0 V */ 3242 } cy_en_syspm_bod_vddd_sel_t; 3243 3244 /** 3245 * \note 3246 * This enum is available for CAT1C devices. 3247 **/ 3248 /** 3249 * Selects the voltage threshold for BOD on VDDA 3250 */ 3251 typedef enum 3252 { 3253 CY_SYSPM_BOD_VDDA_2_7V = 0x0u, /**< BOD -> VDDA < 2.7 V */ 3254 CY_SYSPM_BOD_VDDA_3_0V = 0x01u /**< BOD -> VDDA < 3.0 V */ 3255 } cy_en_syspm_bod_vdda_sel_t; 3256 3257 /** 3258 * \note 3259 * This enum is available for CAT1C devices. 3260 **/ 3261 /** 3262 * Selects BOD over VDDD or VDDA or VCCD 3263 */ 3264 typedef enum 3265 { 3266 CY_SYSPM_BOD_ON_VDDD = 0x0u, /**< BOD -> VDDD */ 3267 CY_SYSPM_BOD_ON_VDDA = 0x01u, /**< BOD -> VDDA */ 3268 CY_SYSPM_BOD_ON_VCCD = 0x02u /**< BOD -> VCCD */ 3269 } cy_en_syspm_bod_sel_t; 3270 3271 /** 3272 * \note 3273 * This enum is available for CAT1C devices. 3274 **/ 3275 /** 3276 * BOD action select configuration. 3277 */ 3278 typedef enum 3279 { 3280 CY_SYSPM_BOD_ACTION_NOTHING = 0x0u, /**<Select BOD action select: nothing */ 3281 CY_SYSPM_BOD_ACTION_FAULT = 0x1u, /**<Select BOD action select: fault */ 3282 CY_SYSPM_BOD_ACTION_RESET = 0x2u, /**<Select BOD action select: reset */ 3283 } cy_en_syspm_bod_action_select_t; 3284 3285 /** 3286 * \note 3287 * This enum is available for CAT1C devices. 3288 **/ 3289 /** 3290 * Supply Supervision Status 3291 */ 3292 typedef enum 3293 { 3294 CY_SYSPM_ENTITY_BOD_VDDD = 0x0u, /**<BOD indicates VDDD is OK */ 3295 CY_SYSPM_ENTITY_BOD_VDDA = 0x1u, /**<BOD indicates VDDA is OK */ 3296 CY_SYSPM_ENTITY_BOD_VCCD = 0x2u, /**<BOD indicates VCCD is OK */ 3297 CY_SYSPM_ENTITY_OVD_VDDD = 0x3u, /**<OVD indicates VDDD is OK */ 3298 CY_SYSPM_ENTITY_OVD_VDDA = 0x4u, /**<OVD indicates VDDA is OK */ 3299 CY_SYSPM_ENTITY_OVD_VCCD = 0x5u, /**<OVD indicates VCCD is OK */ 3300 } cy_en_syspm_supply_entity_select_t; 3301 3302 3303 /** 3304 * \note 3305 * This enum is available for CAT1C devices. 3306 **/ 3307 /** This enumeration is used to select the REGHC mode */ 3308 typedef enum 3309 { 3310 CY_SYSPM_REGHC_MODE_TRANSISTOR = 0u, /**< External Transistor Mode */ 3311 CY_SYSPM_REGHC_MODE_PMIC = 1u, /**< External PMIC Mode */ 3312 } cy_en_syspm_reghc_mode_t; 3313 3314 /** 3315 * \note 3316 * This enum is available for CAT1C devices. 3317 **/ 3318 /** This enumeration is used to set the voltage trims */ 3319 typedef enum 3320 { 3321 CY_SYSPM_REGHC_VADJ_1_020V = 0u, /**< 1.020 V nominal voltage. */ 3322 CY_SYSPM_REGHC_VADJ_1_025V = 1u, /**< 1.025 V nominal voltage. */ 3323 CY_SYSPM_REGHC_VADJ_1_030V = 2u, /**< 1.030 V nominal voltage. */ 3324 CY_SYSPM_REGHC_VADJ_1_035V = 3u, /**< 1.035 V nominal voltage. */ 3325 CY_SYSPM_REGHC_VADJ_1_040V = 4u, /**< 1.040 V nominal voltage. */ 3326 CY_SYSPM_REGHC_VADJ_1_045V = 5u, /**< 1.045 V nominal voltage. */ 3327 CY_SYSPM_REGHC_VADJ_1_050V = 6u, /**< 1.050 V nominal voltage. */ 3328 CY_SYSPM_REGHC_VADJ_1_055V = 7u, /**< 1.055 V nominal voltage. */ 3329 CY_SYSPM_REGHC_VADJ_1_060V = 8u, /**< 1.060 V nominal voltage. */ 3330 CY_SYSPM_REGHC_VADJ_1_065V = 9u, /**< 1.065 V nominal voltage. */ 3331 CY_SYSPM_REGHC_VADJ_1_070V = 10u, /**< 1.070 V nominal voltage. */ 3332 CY_SYSPM_REGHC_VADJ_1_075V = 11u, /**< 1.075 V nominal voltage. */ 3333 CY_SYSPM_REGHC_VADJ_1_080V = 12u, /**< 1.080 V nominal voltage. */ 3334 CY_SYSPM_REGHC_VADJ_1_085V = 13u, /**< 1.085 V nominal voltage. */ 3335 CY_SYSPM_REGHC_VADJ_1_090V = 14u, /**< 1.090 V nominal voltage. */ 3336 CY_SYSPM_REGHC_VADJ_1_095V = 15u, /**< 1.095V nominal voltage. */ 3337 CY_SYSPM_REGHC_VADJ_1_100V = 16u, /**< Default Value, 1.100 V nominal voltage. */ 3338 CY_SYSPM_REGHC_VADJ_1_105V = 17u, /**< 1.105 V nominal voltage. */ 3339 CY_SYSPM_REGHC_VADJ_1_110V = 18u, /**< 1.110 V nominal voltage. */ 3340 CY_SYSPM_REGHC_VADJ_1_115V = 19u, /**< 1.115 V nominal voltage. */ 3341 CY_SYSPM_REGHC_VADJ_1_120V = 20u, /**< 1.120 V nominal voltage. */ 3342 CY_SYSPM_REGHC_VADJ_1_125V = 21u, /**< 1.125 V nominal voltage. */ 3343 CY_SYSPM_REGHC_VADJ_1_130V = 22u, /**< 1.130 V nominal voltage. */ 3344 CY_SYSPM_REGHC_VADJ_1_135V = 23u, /**< 1.135 V nominal voltage. */ 3345 CY_SYSPM_REGHC_VADJ_1_140V = 24u, /**< 1.140 V nominal voltage. */ 3346 CY_SYSPM_REGHC_VADJ_1_145V = 25u, /**< 1.145 V nominal voltage. */ 3347 CY_SYSPM_REGHC_VADJ_1_150V = 26u, /**< 1.150 V nominal voltage. */ 3348 CY_SYSPM_REGHC_VADJ_1_155V = 27u, /**< 1.155 V nominal voltage. */ 3349 CY_SYSPM_REGHC_VADJ_1_160V = 28u, /**< 1.160 V nominal voltage. */ 3350 CY_SYSPM_REGHC_VADJ_1_165V = 29u, /**< 1.165 V nominal voltage. */ 3351 CY_SYSPM_REGHC_VADJ_1_170V = 30u, /**< 1.170 V nominal voltage. */ 3352 CY_SYSPM_REGHC_VADJ_1_175V = 31u, /**< 1.175 V nominal voltage. */ 3353 } cy_en_syspm_reghc_vadj_t; 3354 3355 /** 3356 * \note 3357 * This enum is available for CAT1C devices. 3358 **/ 3359 /** Drive out configuration */ 3360 typedef enum 3361 { 3362 CY_SYSPM_REGHC_DRIVE_OUT_0P9_VCCD_BY_VADJ = 0u, /**< DRV_VOUT=(0.9 * vccd)/vdj Volts */ 3363 CY_SYSPM_REGHC_DRIVE_OUT_0P8_VCCD_BY_VADJ = 1u, /**< DRV_VOUT=(0.8 * vccd)/vdj Volts */ 3364 CY_SYSPM_REGHC_DRIVE_OUT_0P6_VCCD_BY_VADJ = 2u, /**< DRV_VOUT=(0.6 * vccd)/vdj Volts */ 3365 CY_SYSPM_REGHC_DRIVE_OUT_VCCD = 3u, /**< DRV_VOUT=vccd Volts */ 3366 } cy_en_syspm_reghc_drive_out_t; 3367 3368 #endif 3369 3370 /** 3371 * For SRAM0, this enumeration represents the Macro Numbers 3372 */ 3373 typedef enum 3374 { 3375 CY_SYSPM_SRAM0_MACRO_0 = 0U, /**< SRAM0:Macro-0 */ 3376 CY_SYSPM_SRAM0_MACRO_1 = 1U, /**< SRAM0:Macro-1 */ 3377 CY_SYSPM_SRAM0_MACRO_2 = 2U, /**< SRAM0:Macro-2 */ 3378 CY_SYSPM_SRAM0_MACRO_3 = 3U, /**< SRAM0:Macro-3 */ 3379 } cy_en_syspm_sram0_macro_t; 3380 3381 3382 3383 /** This enumeration specifies the associated callback mode. This enum defines the callback mode. */ 3384 typedef enum 3385 { 3386 CY_SYSPM_CHECK_READY = 0x01U, /**< Callbacks with this mode are executed before entering into the 3387 low power mode. The purpose of his callback function is to check 3388 if the device is ready to enter the low power mode. */ 3389 CY_SYSPM_CHECK_FAIL = 0x02U, /**< Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY 3390 callbacks execution returns CY_SYSPM_FAIL. 3391 The callback with the CY_SYSPM_CHECK_FAIL mode should roll back the 3392 actions performed in the previously executed callback with 3393 CY_SYSPM_CHECK_READY */ 3394 CY_SYSPM_BEFORE_TRANSITION = 0x04U, /**< Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY 3395 callbacks execution returns CY_SYSPM_SUCCESS. 3396 Performs the actions to be done before entering into the 3397 low power mode. */ 3398 CY_SYSPM_AFTER_TRANSITION = 0x08U, /**< Performs the actions to be done after exiting the low power mode 3399 if entered. */ 3400 #if defined (CY_IP_MXS40SSRSS) 3401 /** 3402 * \note 3403 * Below enum should be used only during exit of Deepsleep and applicable for only CAT1B devices 3404 **/ 3405 CY_SYSPM_AFTER_DS_WFI_TRANSITION = 0x10U, /**< Performs the actions to be done after exiting the Deepsleep low 3406 power mode if entered and before the interrupts are enabled. */ 3407 #endif 3408 } cy_en_syspm_callback_mode_t; 3409 3410 /** 3411 * This enumeration is used to select a particular SRAM. 3412 */ 3413 typedef enum 3414 { 3415 CY_SYSPM_SRAM0_MEMORY = 0U, /**< SRAM0 Memory Area */ 3416 CY_SYSPM_SRAM1_MEMORY = 1U, /**< SRAM1 Memory Area */ 3417 CY_SYSPM_SRAM2_MEMORY = 2U, /**< SRAM2 Memory Area */ 3418 } cy_en_syspm_sram_index_t; 3419 3420 /** 3421 * This enumeration is used to select a particular SRAM Power Mode. 3422 */ 3423 typedef enum 3424 { 3425 CY_SYSPM_SRAM_PWR_MODE_OFF = 0U, /**< SRAM Power Mode OFF */ 3426 CY_SYSPM_SRAM_PWR_MODE_INVALID = 1U, /**< Invalid SRAM Power Mode */ 3427 CY_SYSPM_SRAM_PWR_MODE_RET = 2U, /**< SRAM Power Mode RET */ 3428 CY_SYSPM_SRAM_PWR_MODE_ON = 3U /**< SRAM Power Mode ON */ 3429 } cy_en_syspm_sram_pwr_mode_t; 3430 3431 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3432 /** 3433 * This enumeration is used to select a particular SOCMEM SRAM Partition Number. 3434 */ 3435 typedef enum 3436 { 3437 CY_SYSPM_SOCMEM_SRAM_PARTITION0 = 0U, /**< SOCMEM SRAM Partition-0 Number*/ 3438 CY_SYSPM_SOCMEM_SRAM_PARTITION1 = 1U, /**< SOCMEM SRAM Partition-1 Number*/ 3439 CY_SYSPM_SOCMEM_SRAM_PARTITION2 = 2U, /**< SOCMEM SRAM Partition-2 Number*/ 3440 CY_SYSPM_SOCMEM_SRAM_PARTITION3 = 3U, /**< SOCMEM SRAM Partition-3 Number*/ 3441 CY_SYSPM_SOCMEM_SRAM_PARTITION4 = 4U, /**< SOCMEM SRAM Partition-4 Number*/ 3442 CY_SYSPM_SOCMEM_SRAM_PARTITION5 = 5U, /**< SOCMEM SRAM Partition-5 Number*/ 3443 CY_SYSPM_SOCMEM_SRAM_PARTITION6 = 6U, /**< SOCMEM SRAM Partition-6 Number*/ 3444 CY_SYSPM_SOCMEM_SRAM_PARTITION7 = 7U, /**< SOCMEM SRAM Partition-7 Number*/ 3445 CY_SYSPM_SOCMEM_SRAM_PARTITION8 = 8U, /**< SOCMEM SRAM Partition-8 Number*/ 3446 CY_SYSPM_SOCMEM_SRAM_PARTITION9 = 9U, /**< SOCMEM SRAM Partition-9 Number*/ 3447 } cy_en_syspm_socmem_sram_partition_index_t; 3448 3449 /** 3450 * This enumeration is used to select a particular SOCMEM SRAM Partition Power Mode. 3451 */ 3452 typedef enum 3453 { 3454 CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_ON = 0U, /**< SOCMEM SRAM Partition ON during ACTIVE mode */ 3455 CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_OFF = 1U, /**< SOCMEM SRAM Partition OFF during ACTIVE mode */ 3456 CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_ON = 2U, /**< SOCMEM SRAM Partition Retention ON during DS mode */ 3457 CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_OFF = 3U, /**< SOCMEM SRAM Partition Retention OFF during DS mode */ 3458 } cy_en_syspm_socmem_sram_pwr_mode_t; 3459 3460 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 3461 3462 /** \} group_syspm_data_enumerates */ 3463 3464 /** 3465 * \addtogroup group_syspm_macros 3466 * \{ 3467 */ 3468 /** 3469 * \defgroup group_syspm_skip_callback_modes Defines to skip the callbacks modes 3470 * \{ 3471 * Defines for the SysPm callbacks modes that can be skipped during execution. 3472 * For more information about callbacks modes, refer 3473 * to \ref cy_en_syspm_callback_mode_t. 3474 */ 3475 #define CY_SYSPM_SKIP_CHECK_READY (0x01U) /**< Define to skip check ready mode in the syspm callback */ 3476 #define CY_SYSPM_SKIP_CHECK_FAIL (0x02U) /**< Define to skip check fail mode in the syspm callback */ 3477 #define CY_SYSPM_SKIP_BEFORE_TRANSITION (0x04U) /**< Define to skip before transition mode in the syspm callback */ 3478 #define CY_SYSPM_SKIP_AFTER_TRANSITION (0x08U) /**< Define to skip after transition mode in the syspm callback */ 3479 /** \} group_syspm_skip_callback_modes */ 3480 /** \} group_syspm_macros */ 3481 3482 /** 3483 * \addtogroup group_syspm_data_structures 3484 * \{ 3485 */ 3486 3487 /** The structure contains syspm callback parameters */ 3488 typedef struct 3489 { 3490 void *base; /**< Base address of a HW instance, matches name of the driver in 3491 the API for the base address. Can be undefined if not required. Base address is not 3492 required for the SysPm driver as the device has only one set of power modes */ 3493 void *context; /**< Context for the handler function. This item can be 3494 skipped if not required. Can be undefined if not required. */ 3495 3496 } cy_stc_syspm_callback_params_t; 3497 3498 /** The type for syspm callbacks */ 3499 typedef cy_en_syspm_status_t (*Cy_SysPmCallback) (cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode); 3500 3501 /** Structure with syspm callback configuration elements */ 3502 typedef struct cy_stc_syspm_callback 3503 { 3504 Cy_SysPmCallback callback; /**< The callback handler function. */ 3505 cy_en_syspm_callback_type_t type; /**< The callback type, see \ref cy_en_syspm_callback_type_t. */ 3506 uint32_t skipMode; /**< The mask of modes to be skipped during callback 3507 execution, see \ref group_syspm_skip_callback_modes. The 3508 corresponding callback mode won't execute if the 3509 appropriate define is set. These values can be ORed. 3510 If all modes are required to be executed this element 3511 should be equal to zero. Skipping unneeded callback modes speeds up 3512 power mode transitions by skipping unneeded operations. */ 3513 3514 cy_stc_syspm_callback_params_t *callbackParams; /**< The address of a cy_stc_syspm_callback_params_t, 3515 the callback is executed with these parameters. */ 3516 3517 struct cy_stc_syspm_callback *prevItm; /**< The previous list item. This element should not be 3518 defined, or defined as NULL. It is for internal 3519 usage to link this structure to the next registered 3520 structure. It will be updated during callback 3521 registration. Do not modify this element at run-time. */ 3522 3523 struct cy_stc_syspm_callback *nextItm; /**< The next list item. This element should not be 3524 defined, or defined as NULL. It is for internal usage to 3525 link this structure to the previous registered structure. 3526 It will be updated during callback registration. Do not 3527 modify this element at run-time. */ 3528 uint8_t order; /**< Holds the callback execution order value. Range: 0-255. 3529 While entering low power mode, callbacks with lower order values 3530 are executed first. While exiting low power mode, 3531 the callbacks are executed in the opposite order. 3532 Callbacks with the same order value are executed in the 3533 order they are registered in the application. */ 3534 } cy_stc_syspm_callback_t; 3535 3536 #if defined (CY_IP_MXS40SRSS) 3537 /** 3538 * \note 3539 * This enum is available for CAT1A devices. 3540 **/ 3541 /** This internal structure stores non-retained registers in the system Deep Sleep 3542 * power mode. On wakeup from system Deep Sleep, these registers are restored. 3543 */ 3544 typedef struct 3545 { 3546 3547 uint32_t CY_SYSPM_UDB_UDBIF_BANK_CTL_REG; /**< UDB interface control register */ 3548 3549 uint32_t CY_SYSPM_UDB_BCTL_MDCLK_EN_REG; /**< UDB bank MDCLK_EN register */ 3550 uint32_t CY_SYSPM_UDB_BCTL_MBCLK_EN_REG; /**< UDB bank MBCLK_EN register */ 3551 uint32_t CY_SYSPM_UDB_BCTL_BOTSEL_L_REG; /**< UDB bank BOTSEL_L register */ 3552 uint32_t CY_SYSPM_UDB_BCTL_BOTSEL_U_REG; /**< UDB bank BOTSEL_U register */ 3553 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN0_REG; /**< UDB bank QCLK_EN0 register */ 3554 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN1_REG; /**< UDB bank QCLK_EN1 register */ 3555 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN2_REG; /**< UDB bank QCLK_EN2 register */ 3556 uint32_t CY_SYSPM_CM0_CLOCK_CTL_REG; /**< CPUSS CM0+ clock control register */ 3557 uint32_t CY_SYSPM_CM4_CLOCK_CTL_REG; /**< CPUSS CM4 clock control register */ 3558 } cy_stc_syspm_backup_regs_t; 3559 #endif /* CY_IP_MXS40SRSS */ 3560 3561 #if (defined(CY_DEVICE_SECURE)) 3562 /** PRA structure for Cy_SysPm_BuckSetVoltage2 function parameters */ 3563 typedef struct 3564 { 3565 cy_en_syspm_buck_voltage2_t praVoltage; /**< The voltage of the Buck regulator output 2 */ 3566 bool praWaitToSettle; /**< Enable/disable the delay after setting a higher voltage */ 3567 } cy_stc_pra_voltage2_t; 3568 3569 typedef struct 3570 { 3571 cy_en_syspm_sram_index_t sramNum; /**< SRAM index */ 3572 uint32_t sramMacroNum; /**< SRAM macro number */ 3573 cy_en_syspm_sram_pwr_mode_t sramPwrMode; /**< Power mode */ 3574 } cy_stc_pra_sram_power_mode_config_t; 3575 3576 #endif /* (defined(CY_DEVICE_SECURE)) */ 3577 3578 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3579 /** 3580 * \note 3581 * This structure is available for CAT1D devices. 3582 **/ 3583 /** The structure contains syspm RETLDO configuration parameters */ 3584 typedef struct 3585 { 3586 cy_en_syspm_retldo_voltage_t activeVoltSel; /**< RETLDO Voltage Select \ref cy_en_syspm_retldo_voltage_t */ 3587 cy_en_syspm_retldo_gain_t activeGain; /**< RETLDO Gain Select Select \ref cy_en_syspm_retldo_voltage_t */ 3588 cy_en_syspm_retldo_voltage_t deepsleepVoltSel; /**< RETLDO Deepsleep Voltage Select \ref cy_en_syspm_retldo_voltage_t */ 3589 cy_en_syspm_retldo_gain_t deepsleepGain; /**< RETLDO Deepsleep Gain Select \ref cy_en_syspm_retldo_voltage_t */ 3590 } cy_stc_syspm_retldo_params_t; 3591 3592 /** 3593 * \note 3594 * This structure is available for CAT1D devices. 3595 **/ 3596 /** The structure contains syspm SRAMLDO configuration parameters */ 3597 typedef struct 3598 { 3599 bool sramLdoEnable; /**< SRAMLDO Enable/Disable */ 3600 bool deepsleepSramLdoEnable; /**< SRAMLDO Enable/Disable during deepsleep */ 3601 cy_en_syspm_sramldo_voltage_t sramLdoVoltSel; /**< SRAMLDO Voltage Select \ref cy_en_syspm_sramldo_voltage_t */ 3602 } cy_stc_syspm_sramldo_params_t; 3603 3604 /** 3605 * \note 3606 * This structure is available for CAT1D devices. 3607 **/ 3608 /** The structure contains syspm MISCLDO configuration parameters */ 3609 typedef struct 3610 { 3611 bool miscLdoEnable; /**< MISCLDO Enable/Disable */ 3612 cy_en_syspm_miscldo_mode_t miscLdoMode; /**< MISCLDO mode select , VCCACT or VOUT */ 3613 cy_en_syspm_miscldo_voltage_t miscLdoVoltSel; /**< MISCLDO Voltage Select \ref cy_en_syspm_miscldo_voltage_t */ 3614 cy_en_syspm_miscldo_vccact_trim_t miscLdoVaccActTrimSel; /**< MISCLDO VCCACT Voltage Trim Select \ref cy_en_syspm_miscldo_vccact_trim_t */ 3615 } cy_stc_syspm_miscldo_params_t; 3616 3617 3618 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 3619 3620 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3621 /** 3622 * \note 3623 * This structure is available for CAT1B devices. 3624 **/ 3625 /** The structure contains warmboot entry point struct used during DEEPSLEEP-RAM entry*/ 3626 typedef struct 3627 { 3628 uint32_t *stack_pointer; /**< Stack Pointer */ 3629 uint32_t *entry_pointer; /**< Entry Function Address */ 3630 } cy_stc_syspm_warmboot_entrypoint_t; 3631 3632 /** 3633 * \note 3634 * This structure is available for CAT1B devices. 3635 **/ 3636 /** The structure contains syspm core buck configuration parameters */ 3637 typedef struct 3638 { 3639 uint8_t voltageSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3640 uint8_t mode; /**< Core Buck Mode : 3641 0x01 - Low Power Mode, 3642 0x11 - High Power Mode(Low Ripple Mode) */ 3643 bool override; /**< Core Buck Override : Forces Corebuck to 3644 use the setting in the PWR_CBUCK_CTL register */ 3645 bool copySettings; /**< Core Buck Copy Settings : 3646 Copies the current CBUCK composite state to 3647 PWR_CBUCK_CTL register */ 3648 bool useSettings; /**< Core Buck use Settings : 3649 Causes the settings in PWR_CBUCK_CTL to be 3650 used in CBUCK settings decision */ 3651 uint8_t inRushLimitSel; /**< Core Buck In Rush Limit Selection 3652 0: 10mA limit 3653 1: 100mA limit */ 3654 } cy_stc_syspm_core_buck_params_t; 3655 3656 /** 3657 * \note 3658 * This structure is available for CAT1B devices. 3659 **/ 3660 /** The structure contains syspm SDR0/SDR1(Step Down Regulator) LDO configuration parameters */ 3661 typedef struct 3662 { 3663 uint8_t coreBuckVoltSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3664 uint8_t coreBuckMode; /**< Core Buck Mode : 3665 0x01 - Low Power Mode, 3666 0x11 - High Power Mode(Low Ripple Mode) */ 3667 3668 /* This field applicable only for SDR0 */ 3669 uint8_t coreBuckDpSlpVoltSel; /**< Deep Sleep Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3670 3671 /* This field applicable only for SDR0 */ 3672 uint8_t coreBuckDpSlpMode; /**< Deep sleep Core Buck Mode : 3673 0x01 - Low Power Mode, 3674 0x11 - High Power Mode(Low Ripple Mode) */ 3675 3676 uint8_t sdrVoltSel; /**< SDR Regulator Voltage Select \ref cy_en_syspm_sdr_voltage_t */ 3677 3678 /* This field applicable only for SDR0 */ 3679 uint8_t sdr0DpSlpVoltSel; /**< SDR Regulator Voltage Select \ref cy_en_syspm_sdr_voltage_t */ 3680 3681 /* This field applicable only for SDR0 */ 3682 bool sdr0Allowbypass; /**< Allow SDR bypass : 3683 true - Allow SDR to bypass 3684 false - SDR is not bypassed and will regulate */ 3685 /* This field applicable only for SDR1 */ 3686 bool sdr1HwControl; /**< Allow SDR1 HW Control : 3687 true - sdr1Enable(bit: SDR1_ENABLE) is ignored, HW will control 3688 false - sdr1Enable(bit: SDR1_ENABLE) will control, HW control is ignored */ 3689 /* This field applicable only for SDR1 */ 3690 bool sdr1Enable; /**< SDR1 Enable/Disable: 3691 true - SDR1 is enabled 3692 false - SDR1 is disabled */ 3693 } cy_stc_syspm_sdr_params_t; 3694 3695 /** 3696 * \note 3697 * This structure is available for CAT1B devices. 3698 **/ 3699 /** The structure contains syspm HVLDO configuration parameters */ 3700 typedef struct 3701 { 3702 uint8_t voltageSel; /**< HVLDO Voltage Select \ref cy_en_syspm_hvldo_voltage_t */ 3703 bool hwSel; /**< HVLDO HW Select : 3704 0 - HVLDO0_ENABLE controls SDR1,HW controls are ignored 3705 1 - HLDO0_ENABLE is ignored and HW signal is used instead */ 3706 bool hvldoEnable; /**< HVLDO Enable/Disable: 3707 true - HVLDO is enabled 3708 false - HVLDO is disabled */ 3709 } cy_stc_syspm_hvldo_params_t; 3710 3711 3712 /** 3713 * \note 3714 * This structure is available for CAT1B devices. 3715 **/ 3716 /** The structure contains syspm Extra Requestor configuration parameters */ 3717 typedef struct 3718 { 3719 uint8_t coreBuckVoltSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3720 uint8_t coreBuckMode; /**< Core Buck Mode : 3721 0x00 - Low Power Mode, 3722 0x10 - Low Ripple(high power) */ 3723 cy_stc_syspm_sdr_params_t *sdr0Config; /**< SDR-0 Parameters \ref cy_stc_syspm_sdr_params_t */ 3724 cy_stc_syspm_sdr_params_t *sdr1Config; /**< SDR-1 Parameters \ref cy_stc_syspm_sdr_params_t */ 3725 } cy_stc_syspm_extraReq_params_t; 3726 3727 #endif 3728 3729 /** \} group_syspm_data_structures */ 3730 3731 /** 3732 * \addtogroup group_syspm_functions 3733 * \{ 3734 */ 3735 3736 /** 3737 * \addtogroup group_syspm_functions_general 3738 * \{ 3739 */ 3740 3741 /******************************************************************************* 3742 * Function Name: Cy_SysPm_SetSRAMMacroPwrMode 3743 ****************************************************************************//** 3744 * 3745 * Function to set Power Mode for each of the Macro in a particular SRAM. 3746 * 3747 * \param sramNum 3748 * SRAM's index number has to be passed 3749 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3750 * See \ref cy_en_syspm_sram_index_t. 3751 * 3752 * \param sramMacroNum 3753 * Macro number of a particular SRAM. 3754 * 3755 * \note 3756 * If SRAM1 and SRAM2 consists of single power partition, power mode will be 3757 * applied to whole SRAM region, so 0 must be passed for sramMacroNum parameter. 3758 * 3759 * \param sramPwrMode 3760 * Power Mode that needs to be set. 3761 * 3762 * \return 3763 * - CY_SYSPM_SUCCESS - SRAM MACRO power mode is set. 3764 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 3765 * See \ref cy_en_syspm_status_t. 3766 * 3767 * \note 3768 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 3769 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 3770 * supported. 3771 * 3772 * For the PSoC 64 devices there are possible situations when function returns 3773 * the PRA error status code. This is because for PSoC 64 devices the function 3774 * uses the PRA driver to change the protected registers. Refer to 3775 * \ref cy_en_pra_status_t for more details. 3776 * 3777 *******************************************************************************/ 3778 cy_en_syspm_status_t Cy_SysPm_SetSRAMMacroPwrMode(cy_en_syspm_sram_index_t sramNum, uint32_t sramMacroNum, cy_en_syspm_sram_pwr_mode_t sramPwrMode); 3779 3780 /******************************************************************************* 3781 * Function Name: Cy_SysPm_GetSRAMMacroPwrMode 3782 ****************************************************************************//** 3783 * 3784 * Function to get Power Mode for each of the Macro in a particular SRAM. 3785 * 3786 * \param sramNum 3787 * SRAM's index number has to be passed 3788 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3789 * See \ref cy_en_syspm_sram_index_t. 3790 * 3791 * \param sramMacroNum 3792 * Macro number of a particular SRAM. 3793 * 3794 * \note 3795 * If SRAM1 and SRAM2 consists of single power partition, power mode will be 3796 * applied to whole SRAM region, so 0 must be passed for sramMacroNum parameter, 3797 * and the power mode obtained will be for whole SRAM. 3798 * 3799 * \note 3800 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 3801 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 3802 * supported. 3803 * 3804 * \return 3805 * Returns SRAM power mode. See \ref cy_en_syspm_sram_pwr_mode_t. 3806 * 3807 *******************************************************************************/ 3808 cy_en_syspm_sram_pwr_mode_t Cy_SysPm_GetSRAMMacroPwrMode(cy_en_syspm_sram_index_t sramNum, uint32_t sramMacroNum); 3809 3810 /******************************************************************************* 3811 * Function Name: Cy_SysPm_SetSRAMPwrMode 3812 ****************************************************************************//** 3813 * 3814 * Function to set Power Mode for all the Macros for a particular SRAM. 3815 * 3816 * \param sramNum 3817 * SRAM's index number has to be passed 3818 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3819 * See \ref cy_en_syspm_sram_index_t. 3820 * 3821 * \param sramPwrMode 3822 * Power Mode that needs to be set. 3823 * 3824 * \return 3825 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 3826 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 3827 * See \ref cy_en_syspm_status_t. 3828 * 3829 * \note 3830 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 3831 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 3832 * supported. 3833 * 3834 * For the PSoC 64 devices there are possible situations when function returns 3835 * the PRA error status code. This is because for PSoC 64 devices the function 3836 * uses the PRA driver to change the protected registers. Refer to 3837 * \ref cy_en_pra_status_t for more details. 3838 * 3839 *******************************************************************************/ 3840 cy_en_syspm_status_t Cy_SysPm_SetSRAMPwrMode(cy_en_syspm_sram_index_t sramNum, cy_en_syspm_sram_pwr_mode_t sramPwrMode); 3841 3842 3843 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3844 3845 /******************************************************************************* 3846 * Function Name: Cy_SysPm_SetSOCMemPartActivePwrMode 3847 ****************************************************************************//** 3848 * 3849 * Set Active mode Power Mode for a particular partition of SRAM in SOCMEM 3850 * 3851 * \param socmemSramPartNum 3852 * SOCMEM- SRAM's Partition Number 3853 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 3854 * 3855 * \param socmemSramPwrMode 3856 * Power Mode that needs to be set. 3857 * See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 3858 * 3859 * \return 3860 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 3861 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 3862 * See \ref cy_en_syspm_status_t. 3863 * 3864 *******************************************************************************/ 3865 cy_en_syspm_status_t Cy_SysPm_SetSOCMemPartActivePwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum, cy_en_syspm_socmem_sram_pwr_mode_t socmemSramPwrMode); 3866 3867 /******************************************************************************* 3868 * Function Name: Cy_SysPm_SetSOCMemPartDsPwrMode 3869 ****************************************************************************//** 3870 * 3871 * Set DS mode Power Mode for a particular partition of SRAM in SOCMEM 3872 * 3873 * \param socmemSramPartNum 3874 * SOCMEM- SRAM's Partition Number 3875 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 3876 * 3877 * \param socmemSramPwrMode 3878 * Power Mode that needs to be set. 3879 * See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 3880 * 3881 * \return 3882 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 3883 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 3884 * See \ref cy_en_syspm_status_t. 3885 * 3886 *******************************************************************************/ 3887 cy_en_syspm_status_t Cy_SysPm_SetSOCMemPartDsPwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum, cy_en_syspm_socmem_sram_pwr_mode_t socmemSramPwrMode); 3888 3889 /******************************************************************************* 3890 * Function Name: Cy_SysPm_GetSOCMemSramPartActivePwrMode 3891 ****************************************************************************//** 3892 * 3893 * Function to get Active mode Power Mode for a particular SOCMEM SRAM Partition 3894 * 3895 * \param socmemSramPartNum 3896 * SOCMEM- SRAM's Partition Number 3897 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 3898 * 3899 * \return 3900 * Returns SRAM power mode. See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 3901 * 3902 *******************************************************************************/ 3903 cy_en_syspm_socmem_sram_pwr_mode_t Cy_SysPm_GetSOCMemSramPartActivePwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum); 3904 3905 /******************************************************************************* 3906 * Function Name: Cy_SysPm_GetSOCMemSramPartDsPwrMode 3907 ****************************************************************************//** 3908 * 3909 * Function to get DS mode Power Mode for a particular SOCMEM SRAM Partition 3910 * 3911 * \param socmemSramPartNum 3912 * SOCMEM- SRAM's Partition Number 3913 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 3914 * 3915 * \return 3916 * Returns SRAM power mode. See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 3917 * 3918 *******************************************************************************/ 3919 cy_en_syspm_socmem_sram_pwr_mode_t Cy_SysPm_GetSOCMemSramPartDsPwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum); 3920 3921 3922 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 3923 3924 3925 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_DOXYGEN) 3926 3927 /******************************************************************************* 3928 * Function Name: Cy_SysPm_WriteVoltageBitForFlash 3929 ****************************************************************************//** 3930 * 3931 * Function that changes the voltage setting for flash. 3932 * 3933 * \note 3934 * Call this function before system enters ULP mode. Call this function after 3935 * the system enters LP mode. 3936 * 3937 * \param value 3938 * Value to be set in the flash voltage control register. 3939 * See \ref cy_en_syspm_flash_voltage_bit_t. 3940 * 3941 * \return 3942 * - CY_SYSPM_SUCCESS - The voltage is set. 3943 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 3944 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 3945 * \note 3946 * This API is available for CAT1A devices. 3947 * 3948 * \funcusage 3949 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_WriteVoltageBitForFlash 3950 * 3951 *******************************************************************************/ 3952 cy_en_syspm_status_t Cy_SysPm_WriteVoltageBitForFlash(cy_en_syspm_flash_voltage_bit_t value); 3953 3954 #if !((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) 3955 3956 /******************************************************************************* 3957 * Function Name: Cy_SysPm_SaveRegisters 3958 ****************************************************************************//** 3959 * 3960 * \note Behavior of this API is IP dependent. \n 3961 * On CAT1A devices: \n 3962 * Saves non-retained UDB registers and the slow and fast clock dividers before 3963 * system entering system Deep Sleep. 3964 * Must be called if programmable logic or function are implemented in the UDB 3965 * array. 3966 * Cypress ID #280370, #1451. 3967 * On CAT1B devices: \n 3968 * Saves non-retained UDB registers before system entering system Deep Sleep. 3969 * Must be called if programmable logic or function are implemented in the UDB 3970 * array. 3971 * Cypress ID #280370. 3972 * \warning 3973 * Only one CPU on dual CPU devices should call this function. If both CPUs call 3974 * this function the UDB state restored may be inconsistent with the expected 3975 * state when restored. 3976 * 3977 * \param regs 3978 * The structure where the registers are saved. 3979 * 3980 * \note 3981 * This API is available for CAT1A devices. 3982 * 3983 * \funcusage 3984 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SaveRestoreRegisters 3985 * 3986 *******************************************************************************/ 3987 void Cy_SysPm_SaveRegisters(cy_stc_syspm_backup_regs_t *regs); 3988 3989 3990 /******************************************************************************* 3991 * Function Name: Cy_SysPm_RestoreRegisters 3992 ****************************************************************************//** 3993 * 3994 * \note Behavior of this API is IP dependent. \n 3995 * On CAT1A devices: \ 3996 * Restores non-retained UDB registers and the slow and fast clock dividers 3997 * before system entering system Deep Sleep. 3998 * Must be called if programmable logic or function are implemented in the UDB 3999 * array. 4000 * Cypress ID #280370, #1451. 4001 * On CAT1B devices: \ 4002 * Restores non-retained UDB registers before system entering system Deep Sleep. 4003 * Must be called if programmable logic or function are implemented in the UDB 4004 * array. 4005 * Cypress ID #280370. 4006 * \warning 4007 * Only one CPU on dual CPU devices should call this function. If both CPUs call 4008 * this function the UDB state restored may be inconsistent with the expected 4009 * state when restored. 4010 * 4011 * \param regs 4012 * The structure with data stored (using Cy_SysPm_SaveRegisters()) into the 4013 * required registers after Deep Sleep. 4014 * 4015 * \note 4016 * This API is available for CAT1A devices. 4017 * 4018 * \funcusage 4019 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SaveRestoreRegisters 4020 * 4021 *******************************************************************************/ 4022 void Cy_SysPm_RestoreRegisters(cy_stc_syspm_backup_regs_t const *regs); 4023 4024 #endif /* !((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) */ 4025 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) */ 4026 4027 /** \} group_syspm_functions_general */ 4028 4029 4030 /** 4031 * \addtogroup group_syspm_functions_power_status 4032 * \{ 4033 */ 4034 4035 4036 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4037 /******************************************************************************* 4038 * Function Name: Cy_SysPm_ReadStatus 4039 ****************************************************************************//** 4040 * 4041 * Reads the power modes status of the system and CPU(s). 4042 * 4043 * \return 4044 * The current power mode. See \ref group_syspm_return_status. 4045 * 4046 * \funcusage 4047 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ReadStatus 4048 * 4049 * \note 4050 * This API is available for CAT1A and CAT1D devices. 4051 * 4052 *******************************************************************************/ 4053 uint32_t Cy_SysPm_ReadStatus(void); 4054 /** \} group_syspm_functions_power_status */ 4055 #endif 4056 4057 4058 /** 4059 * \addtogroup group_syspm_functions_power 4060 * \{ 4061 */ 4062 4063 4064 /******************************************************************************* 4065 * Function Name: Cy_SysPm_CpuEnterSleep 4066 ****************************************************************************//** 4067 * 4068 * Sets executing CPU to Sleep mode. 4069 * 4070 * Puts the CPU executing this function into CPU Sleep power mode. If callback 4071 * functions were registered they are also executed. 4072 * 4073 * For more detail about switching into CPU Sleep power mode and debug, 4074 * refer to the device technical reference manual (TRM). 4075 * 4076 * If at least one callback function with the CY_SYSPM_SLEEP type was registered, 4077 * the following algorithm is executed: 4078 * Prior to entering CPU Sleep mode, all callback functions of the CY_SYSPM_SLEEP 4079 * type with the CY_SYSPM_CHECK_READY parameter are called. This allows the 4080 * driver to signal whether it is ready to enter the low power mode. If any of 4081 * the callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY 4082 * parameter returns CY_SYSPM_FAIL, the remaining callbacks of the 4083 * CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY parameter are skipped. 4084 * After the first CY_SYSPM_FAIL, all the CY_SYSPM_SLEEP callbacks that were 4085 * previously executed before getting the CY_SYSPM_CHECK_FAIL are executed with 4086 * the CY_SYSPM_CHECK_FAIL parameter. The CPU Sleep mode is not entered and the 4087 * Cy_SysPm_CpuEnterSleep() function returns CY_SYSPM_FAIL. 4088 * 4089 * If all of the callbacks of the CY_SYSPM_SLEEP type with the 4090 * CY_SYSPM_CHECK_READY parameter return CY_SYSPM_SUCCESS, then all 4091 * callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_FAIL parameters 4092 * calls are skipped. All callbacks of the CY_SYSPM_SLEEP type and then 4093 * CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the 4094 * peripherals to prepare for CPU Sleep. The CPU then enters Sleep mode. 4095 * This is a CPU-centric power mode. This means that the CPU has entered Sleep 4096 * mode and its main clock is removed. Any enabled interrupt can cause a CPU 4097 * wakeup from Sleep mode. 4098 * 4099 * For multi-core devices, CPU wakeup can also be performed using the Send Event 4100 * (SEV) assembly instruction executed from the other active CPU. Such wakeup is 4101 * expected only if the CPU Sleep power mode is done with WFE assembly 4102 * instruction. 4103 * 4104 * After a wakeup from CPU Sleep, all of the registered callbacks of the 4105 * CY_SYSPM_SLEEP type and with the CY_SYSPM_AFTER_TRANSITION parameter are 4106 * executed to return the peripherals to CPU active operation. 4107 * The Cy_SysPm_CpuEnterSleep() function returns CY_SYSPM_SUCCESS. 4108 * No callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_BEFORE_TRANSITION 4109 * parameter or callbacks of the CY_SYSPM_SLEEP type and 4110 * CY_SYSPM_AFTER_TRANSITION parameter callbacks are executed if CPU Sleep mode 4111 * is not entered. 4112 * 4113 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4114 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4115 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4116 * 4117 * To support control of callback execution order the following method is 4118 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4119 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4120 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4121 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4122 * are registered. 4123 4124 * The return value from executed callback functions with the 4125 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4126 * modes are ignored. 4127 * 4128 * \ref cy_en_syspm_callback_mode_t, except the CY_SYSPM_CHECK_READY, are ignored 4129 * 4130 * \note The Arm BSD assembly instruction is not required in this function 4131 * because the function implementation ensures the SLEEPDEEP bit of SCS register 4132 * is settled prior executing WFI/WFE instruction. 4133 * 4134 * \param waitFor 4135 * Selects wait for action. See \ref cy_en_syspm_waitfor_t. 4136 * 4137 * \return 4138 * Entered status, see \ref cy_en_syspm_status_t. 4139 * 4140 * \sideeffect 4141 * For CY8C6xx6, CY8C6xx7 devices this function clears the Event Register of the 4142 * CM4 CPU after wakeup from WFE. 4143 * 4144 * \funcusage 4145 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuEnterSleep 4146 * 4147 *******************************************************************************/ 4148 cy_en_syspm_status_t Cy_SysPm_CpuEnterSleep(cy_en_syspm_waitfor_t waitFor); 4149 4150 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4151 4152 /******************************************************************************* 4153 * Function Name: Cy_SysPm_Init 4154 ****************************************************************************//** 4155 * 4156 * Initializes SysPm Driver 4157 * 4158 * \note 4159 * This API is available for CAT1B devices. 4160 * 4161 *******************************************************************************/ 4162 void Cy_SysPm_Init(void); 4163 #endif 4164 4165 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4166 4167 /******************************************************************************* 4168 * Function Name: Cy_SysPm_IsLpmReady 4169 ****************************************************************************//** 4170 * 4171 * Checks if the system is LPM ready. 4172 * 4173 * \return 4174 * - True if the system is LPM Ready. 4175 * - False if the system is not LPM Ready. 4176 * 4177 * \note 4178 * This API is available for CAT1D devices. 4179 * 4180 *******************************************************************************/ 4181 bool Cy_SysPm_IsLpmReady(void); 4182 #endif 4183 4184 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_DOXYGEN) 4185 4186 /******************************************************************************* 4187 * Function Name: Cy_SysPm_SystemLpActiveEnter 4188 ****************************************************************************//** 4189 * 4190 * Change the system from ACTIVE Profile to LPACTIVE (Low Power Active)/LPSLEEP 4191 * (Low Power Sleep) Profile 4192 * 4193 * \return 4194 * - CY_SYSPM_SUCCESS - Entered the system Low Power mode or 4195 * the device is already in Low Power mode. 4196 * - CY_SYSPM_INVALID_STATE - The system Low Power mode was not set. The 4197 * system Low Power mode was not set because the protection context value is 4198 * higher than zero 4199 * (PC > 0) or the device revision does not support modifying registers 4200 * (to enter LP mode) via syscall. 4201 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4202 * the function returns CY_SYSPM_SUCCESS. 4203 * - CY_SYSPM_FAIL - The system Low Power mode is not entered. 4204 * 4205 * \note 4206 * This API is available for CAT1B and CAT1C devices. 4207 * 4208 * 4209 *******************************************************************************/ 4210 cy_en_syspm_status_t Cy_SysPm_SystemLpActiveEnter(void); 4211 4212 /******************************************************************************* 4213 * Function Name: Cy_SysPm_SystemLpActiveExit 4214 ****************************************************************************//** 4215 * 4216 * Changes the system from LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) 4217 * Profile to ACTIVE Profile 4218 * 4219 * \return 4220 * - CY_SYSPM_SUCCESS - Entered the system Low Power mode or 4221 * the device is already in Low Power mode. 4222 * - CY_SYSPM_INVALID_STATE - The system Low Power mode was not set. The 4223 * system Low Power mode was not set because the protection context value is 4224 * higher than zero 4225 * (PC > 0) or the device revision does not support modifying registers 4226 * (to enter LP mode) via syscall. 4227 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4228 * the function returns CY_SYSPM_SUCCESS. 4229 * - CY_SYSPM_FAIL - The system Low Power mode is not entered. 4230 * 4231 * \note 4232 * This API is available for CAT1B and CAT1C devices. 4233 * 4234 * 4235 *******************************************************************************/ 4236 cy_en_syspm_status_t Cy_SysPm_SystemLpActiveExit(void); 4237 4238 /******************************************************************************* 4239 * Function Name: Cy_SysPm_IsSystemLpActiveEnabled 4240 ****************************************************************************//** 4241 * 4242 * Checks if the system is in LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) 4243 * Profile 4244 * 4245 * \return 4246 * True if enabled, False if disabled. 4247 * 4248 * \note 4249 * This API is available for CAT1B and CAT1C devices. 4250 * 4251 *******************************************************************************/ 4252 bool Cy_SysPm_IsSystemLpActiveEnabled(void); 4253 #endif 4254 4255 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4256 4257 /******************************************************************************* 4258 * Function Name: Cy_SysPm_SetDeepSleepMode 4259 ****************************************************************************//** 4260 * 4261 * Set the deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4262 * 4263 * \note 4264 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4265 * needs to take care of below 4266 * 4267 * Two types of images need to be generated 4268 * 1. Flash image 4269 * - Contains the actual application. 4270 * 4271 * 2. RAM Image(Resides in RAM) 4272 * - Contains Warmboot Entry Point function. 4273 * - SMIF initialization is performed only during coldboot, and not in 4274 * warmboot, so RAM Image will have the code performing SMIF 4275 * initialization before jumping to Flash Image. 4276 * 4277 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4278 * 1. Entry point 4279 * - Set entry point to a function located in RAM Image using 4280 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4281 * 4282 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4283 * entry point function located in RAM image code. Entry point function should 4284 * take care of below 4285 * 4286 * 1. Vector table and Peripheral IP's enabling 4287 * - Set VTOR register with vector table address. 4288 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4289 * 2. SMIF Initialization 4290 * - Perform SMIF Initialization. 4291 * 3. Jump to API in the Flash. 4292 * 4293 * \param deepSleepMode 4294 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4295 * 4296 * \return 4297 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4298 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4299 * the function returns CY_SYSPM_SUCCESS. 4300 * 4301 * \note 4302 * This API is available for CAT1B and CAT1D devices. 4303 * 4304 *******************************************************************************/ 4305 cy_en_syspm_status_t Cy_SysPm_SetDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4306 4307 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4308 4309 /******************************************************************************* 4310 * Function Name: Cy_SysPm_SetSysDeepSleepMode 4311 ****************************************************************************//** 4312 * 4313 * Set the deepsleep mode for SYS PPU Group- deepsleep or deepsleep-ram or deepsleep-off 4314 * 4315 * \note 4316 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4317 * needs to take care of below 4318 * 4319 * Two types of images need to be generated 4320 * 1. Flash image 4321 * - Contains the actual application. 4322 * 4323 * 2. RAM Image(Resides in RAM) 4324 * - Contains Warmboot Entry Point function. 4325 * - SMIF initialization is performed only during coldboot, and not in 4326 * warmboot, so RAM Image will have the code performing SMIF 4327 * initialization before jumping to Flash Image. 4328 * 4329 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4330 * 1. Entry point 4331 * - Set entry point to a function located in RAM Image using 4332 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4333 * 4334 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4335 * entry point function located in RAM image code. Entry point function should 4336 * take care of below 4337 * 4338 * 1. Vector table and Peripheral IP's enabling 4339 * - Set VTOR register with vector table address. 4340 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4341 * 2. SMIF Initialization 4342 * - Perform SMIF Initialization. 4343 * 3. Jump to API in the Flash. 4344 * 4345 * \param deepSleepMode 4346 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4347 * 4348 * \return 4349 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4350 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4351 * the function returns CY_SYSPM_SUCCESS. 4352 * 4353 * \note 4354 * This API is available for CAT1D devices. 4355 * 4356 *******************************************************************************/ 4357 cy_en_syspm_status_t Cy_SysPm_SetSysDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4358 4359 /******************************************************************************* 4360 * Function Name: Cy_SysPm_SetAppDeepSleepMode 4361 ****************************************************************************//** 4362 * 4363 * Set the deepsleep mode for APP PPU Group- deepsleep or deepsleep-ram or deepsleep-off 4364 * 4365 * \note 4366 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4367 * needs to take care of below 4368 * 4369 * Two types of images need to be generated 4370 * 1. Flash image 4371 * - Contains the actual application. 4372 * 4373 * 2. RAM Image(Resides in RAM) 4374 * - Contains Warmboot Entry Point function. 4375 * - SMIF initialization is performed only during coldboot, and not in 4376 * warmboot, so RAM Image will have the code performing SMIF 4377 * initialization before jumping to Flash Image. 4378 * 4379 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4380 * 1. Entry point 4381 * - Set entry point to a function located in RAM Image using 4382 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4383 * 4384 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4385 * entry point function located in RAM image code. Entry point function should 4386 * take care of below 4387 * 4388 * 1. Vector table and Peripheral IP's enabling 4389 * - Set VTOR register with vector table address. 4390 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4391 * 2. SMIF Initialization 4392 * - Perform SMIF Initialization. 4393 * 3. Jump to API in the Flash. 4394 * 4395 * \param deepSleepMode 4396 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4397 * 4398 * \return 4399 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4400 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4401 * the function returns CY_SYSPM_SUCCESS. 4402 * 4403 * \note 4404 * This API is available for CAT1D devices. 4405 * 4406 *******************************************************************************/ 4407 4408 cy_en_syspm_status_t Cy_SysPm_SetAppDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4409 4410 /******************************************************************************* 4411 * Function Name: Cy_SysPm_SetSOCMEMDeepSleepMode 4412 ****************************************************************************//** 4413 * 4414 * Set the deepsleep mode for SOCMEM PPU - deepsleep or deepsleep-ram or deepsleep-off 4415 * 4416 * \note 4417 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4418 * needs to take care of below 4419 * 4420 * Two types of images need to be generated 4421 * 1. Flash image 4422 * - Contains the actual application. 4423 * 4424 * 2. RAM Image(Resides in RAM) 4425 * - Contains Warmboot Entry Point function. 4426 * - SMIF initialization is performed only during coldboot, and not in 4427 * warmboot, so RAM Image will have the code performing SMIF 4428 * initialization before jumping to Flash Image. 4429 * 4430 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4431 * 1. Entry point 4432 * - Set entry point to a function located in RAM Image using 4433 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4434 * 4435 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4436 * entry point function located in RAM image code. Entry point function should 4437 * take care of below 4438 * 4439 * 1. Vector table and Peripheral IP's enabling 4440 * - Set VTOR register with vector table address. 4441 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4442 * 2. SMIF Initialization 4443 * - Perform SMIF Initialization. 4444 * 3. Jump to API in the Flash. 4445 * 4446 * \param deepSleepMode 4447 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4448 * 4449 * \return 4450 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4451 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4452 * the function returns CY_SYSPM_SUCCESS. 4453 * 4454 * \note 4455 * This API is available for CAT1D devices. 4456 * 4457 *******************************************************************************/ 4458 cy_en_syspm_status_t Cy_SysPm_SetSOCMEMDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4459 4460 #endif /* defined (CY_IP_MXS22SRSS) */ 4461 4462 /******************************************************************************* 4463 * Function Name: Cy_SysPm_GetDeepSleepMode 4464 ****************************************************************************//** 4465 * 4466 * Get the deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4467 * 4468 * \return 4469 * Returns CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4470 * if system performs warm or cold boot else returns CY_SYSPM_MODE_NOT_DEEPSLEEP 4471 * 4472 * \note 4473 * This API is available for CAT1B and CAT1D devices. 4474 * 4475 *******************************************************************************/ 4476 cy_en_syspm_deep_sleep_mode_t Cy_SysPm_GetDeepSleepMode(void); 4477 4478 4479 /******************************************************************************* 4480 * Function Name: Cy_SysPm_GetBootMode 4481 ****************************************************************************//** 4482 * 4483 * Checks from which Deep Sleep mode the system has woke up. 4484 * 4485 * \return 4486 * Returns CY_SYSPM_WARM_BOOT_MODE or CY_SYSPM_WARM_COLD_MODE, if system performs 4487 * warm or cold, else return CY_SYSPM_POR_BOOT_MODE if its a normal(POR) boot. 4488 * 4489 * \note 4490 * This API is available for CAT1B devices. 4491 * 4492 * \note 4493 * Use this API immediately after the boot, before writing any of the PPU 4494 * registers,because this API depends on the programmed state of the PPU 4495 * registers, so call it before the PPU registers get overwritten. 4496 * 4497 * \note 4498 * This API is available for CAT1B and CAT1D devices. 4499 * 4500 *******************************************************************************/ 4501 cy_en_syspm_boot_mode_t Cy_SysPm_GetBootMode(void); 4502 4503 /******************************************************************************* 4504 * Function Name: Cy_SysPm_TriggerSoftReset 4505 ****************************************************************************//** 4506 * 4507 * Triggers the System Soft reset. 4508 * 4509 * \note 4510 * This API is available for CAT1B and CAT1D devices. 4511 * 4512 *******************************************************************************/ 4513 void Cy_SysPm_TriggerSoftReset(void); 4514 4515 #endif 4516 4517 /******************************************************************************* 4518 * Function Name: Cy_SysPm_CpuEnterDeepSleep 4519 ****************************************************************************//** 4520 * 4521 * Sets executing CPU to the Deep Sleep mode. 4522 * 4523 * Puts the CPU executing the function into CPU Deep Sleep. For a single CPU 4524 * devices the device will immediately transition to system Deep Sleep. For a 4525 * dual CPU devices the device will transition to system Deep Sleep only after 4526 * both CPUs are in CPU Deep Sleep power mode. 4527 * 4528 * Prior to entering the CPU Deep Sleep mode, all callbacks of the 4529 * CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter registered 4530 * callbacks are called, allowing the driver to signal whether it is ready to 4531 * enter the power mode. If any CY_SYSPM_DEEPSLEEP type with the 4532 * CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, the remaining 4533 * callback CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter are 4534 * skipped. After the first CY_SYSPM_FAIL, all the CY_SYSPM_DEEPSLEEP callbacks 4535 * that were previously executed before getting the CY_SYSPM_CHECK_FAIL are 4536 * executed with the CY_SYSPM_CHECK_FAIL parameter. The CPU Deep Sleep mode is 4537 * not entered and the Cy_SysPm_CpuEnterDeepSleep() function returns 4538 * CY_SYSPM_FAIL. 4539 * 4540 * If all callbacks of the CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY 4541 * parameter return CY_SYSPM_SUCCESS, then all callbacks of the 4542 * CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL parameter calls are 4543 * skipped. All callbacks of the CY_SYSPM_DEEPSLEEP type with the 4544 * CY_SYSPM_BEFORE_TRANSITION parameter calls are then executed, allowing the 4545 * peripherals to prepare for CPU Deep Sleep. The Deep Sleep mode is then 4546 * entered. Any enabled interrupt can cause a wakeup from the Deep Sleep mode. 4547 * 4548 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4549 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4550 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4551 * 4552 * For multi-CPU devices (except CY8C6xx6 and CY8C6xx7) there is a possible 4553 * situation when a syscall operation (for example during flash read or write) 4554 * is executing. If the CM0+ CPU tries to enter Deep Sleep, it will fail. All 4555 * the CY_SYSPM_DEEPSLEEP callbacks that were previously executed, are executed 4556 * with the CY_SYSPM_CHECK_FAIL parameter. Deep Sleep mode is not entered and 4557 * the Cy_SysPm_CpuEnterDeepSleep() function returns CY_SYSPM_SYSCALL_PENDING. 4558 * 4559 * The return value from executed callback functions with the 4560 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4561 * modes are ignored. 4562 * 4563 * If the firmware attempts to enter this mode before the system is ready (that 4564 * is, when PWR_CONTROL.LPM_READY = 0), then the CPU(s) will go into the CPU 4565 * Sleep mode instead and automatically enter system Deep Sleep mode when the 4566 * system is ready. On dual CPU devices, if one CPU enters CPU Deep Sleep and the 4567 * other CPU remains active or is in CPU Sleep the first CPU will remain in CPU 4568 * Deep Sleep. A CPU Deep Sleep is functionally identical to CPU Sleep. 4569 * 4570 * The device enters system Deep Sleep mode when all the CPU(s) are in CPU 4571 * Deep Sleep, there are no busy peripherals, the debugger is not active, and the 4572 * Deep Sleep power and reference are ready (PWR_CONTROL.LPM_READY=1). 4573 * 4574 * The peripherals that do not need a clock or that receive a clock from their 4575 * external interface (e.g. I2C/SPI) may continue operating in system Deep Sleep. 4576 * All circuits using current from Vccdpslp supply are limited by its maximum 4577 * current specification of the Deep Sleep regulator. 4578 * 4579 * Wakeup occurs when an interrupt asserts from a Deep Sleep active peripheral. 4580 * For more detail, see the corresponding peripheral's datasheet. 4581 * 4582 * For multi-core devices, CPU wakeup can also be performed using the Send Event 4583 * (SEV) assembly instruction executed from the other active CPU. Such wakeup is 4584 * expected only if the CPU Sleep power mode is done with WFE assembly 4585 * instruction. 4586 * 4587 * \note 4588 * For multi-CPU devices, the second CPU, if it did not participate in 4589 * system wakeup, remains in CPU Deep Sleep mode. Any Deep Sleep capable 4590 * interrupt routed to this CPU can also wake it. 4591 * 4592 * For more detail about switching into the system Deep Sleep power mode and 4593 * debug, refer to the device TRM. 4594 * 4595 * A normal wakeup from the Deep Sleep power mode returns to either ULP or LP 4596 * mode, depending on the previous state and programmed behavior for the 4597 * particular wakeup interrupt. As soon as the system resumes LP or ULP mode the 4598 * CPU(s) return to CPU Active or CPU Deep Sleep mode, depending on their 4599 * configured wakeup settings. 4600 * 4601 * After wakeup from CPU Deep Sleep, all of the registered callbacks with 4602 * CY_SYSPM_DEEPSLEEP type with CY_SYSPM_AFTER_TRANSITION are executed to return 4603 * peripherals to active operation. The Cy_SysPm_CpuEnterDeepSleep() function 4604 * returns CY_SYSPM_SUCCESS. No callbacks are executed with CY_SYSPM_DEEPSLEEP 4605 * type with CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter, 4606 * if Deep Sleep mode was not entered. 4607 * 4608 * To support control of callback execution order th following method is 4609 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4610 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4611 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4612 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4613 * are registered. 4614 * 4615 * \param waitFor 4616 * Selects wait for action. See \ref cy_en_syspm_waitfor_t. 4617 * 4618 * \sideeffect 4619 * For CY8C6xx6, CY8C6xx7 devices this function clears the Event Register of the 4620 * CM4 CPU after wakeup from WFE. 4621 * 4622 * \sideeffect 4623 * This function changes the slow and fast clock dividers right before 4624 * entering into system Deep Sleep and restores these dividers after wakeup. 4625 * 4626 * \return 4627 * Entered status, see \ref cy_en_syspm_status_t. 4628 * For the PSoC 64 devices there are possible situations when function returns 4629 * the PRA error status code. This is because for PSoC 64 devices the function 4630 * uses the PRA driver to change the protected registers. Refer to 4631 * \ref cy_en_pra_status_t for more details. 4632 * 4633 * \note 4634 * The FLL/PLL are not restored right before the CPU(s) start executing the 4635 * instructions after system Deep Sleep. This can affect the peripheral that is 4636 * driven by PLL/FLL. Ensure that the PLL/FLL are properly restored (locked) 4637 * after wakeup from System Deep Sleep. Refer to the 4638 * \ref group_sysclk driver documentation for information about how to 4639 * read the PLL/FLL lock statuses. 4640 * 4641 * \note The Arm BSD assembly instruction is not required in this function 4642 * because the function implementation ensures the SLEEPDEEP bit of SCS register 4643 * is settled prior executing the WFI/WFE instruction. 4644 * 4645 * \note 4646 * This parameter is available for CAT1B devices. 4647 * 4648 * \funcusage 4649 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuEnterDeepSleep 4650 * 4651 *******************************************************************************/ 4652 cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor); 4653 4654 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4655 4656 /******************************************************************************* 4657 * Function Name: Cy_SysPm_SystemEnterLp 4658 ****************************************************************************//** 4659 * 4660 * Sets device into system Low Power mode. 4661 * 4662 * Returns the system to the default LP mode by raising the core voltage. 4663 * In the LP mode, the clock frequencies can be increased to t 4664 he LP mode 4665 * limitations. Refer to the device datasheet for frequency limitations in the 4666 * LP mode. Approximate LP limit values - \ref group_syspm_lp_limitations. 4667 * 4668 * Prior to entering the system LP mode, all the registered CY_SYSPM_LP callbacks 4669 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 4670 * signal that it is not ready to enter the system LP mode. If any CY_SYSPM_LP 4671 * callbacks with the CY_SYSPM_CHECK_READY parameter call return CY_SYSPM_FAIL, 4672 * the remaining CY_SYSPM_LP callbacks with the 4673 * CY_SYSPM_CHECK_READY parameter calls are skipped. 4674 * 4675 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_LP callbacks with 4676 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 4677 * CY_SYSPM_LP callbacks with CY_SYSPM_CHECK_READY parameter that occurred up to 4678 * the point of failure. System LP mode is not entered and the 4679 * Cy_SysPm_SystemEnterLp() function returns CY_SYSPM_FAIL. 4680 * 4681 * If all CY_SYSPM_LP callbacks with the CY_SYSPM_CHECK_READY 4682 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_LP callbacks with 4683 * CY_SYSPM_CHECK_FAIL are skipped and all CY_SYSPM_LP callbacks with the 4684 * CY_SYSPM_BEFORE_TRANSITION parameter are executed. This allows the 4685 * peripherals to prepare for LP mode. The system LP mode is then entered. 4686 * 4687 * After entering the system LP mode, all of the registered 4688 * CY_SYSPM_LP callbacks with the CY_SYSPM_AFTER_TRANSITION parameter 4689 * are executed to complete preparing the peripherals for low power operation. 4690 * The Cy_SysPm_SystemEnterLp() function returns CY_SYSPM_SUCCESS. 4691 * No CY_SYSPM_LP callbacks with the CY_SYSPM_BEFORE_TRANSITION or 4692 * CY_SYSPM_AFTER_TRANSITION parameter are executed if the system LP mode is not 4693 * entered. 4694 * 4695 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4696 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4697 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4698 * 4699 * The return value from executed callback functions with the 4700 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4701 * modes are ignored. 4702 * 4703 * To support control of callback execution order th following method is 4704 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4705 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4706 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4707 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4708 * are registered. 4709 * 4710 * \return 4711 * - CY_SYSPM_SUCCESS - Entered the system LP mode or the device is already in LP mode. 4712 * - CY_SYSPM_INVALID_STATE - The system LP mode was not set. The system LP mode 4713 * was not set because the protection context value is higher than zero 4714 * (PC > 0) or the device revision does not support modifying registers 4715 * (to enter LP mode) via syscall. 4716 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4717 * the function returns CY_SYSPM_SUCCESS. 4718 * - CY_SYSPM_FAIL - The system LP mode is not entered. 4719 * For the PSoC 64 devices there are possible situations when function returns 4720 * the PRA error status code. This is because for PSoC 64 devices the function 4721 * uses the PRA driver to change the protected registers. Refer to 4722 * \ref cy_en_pra_status_t for more details. 4723 * 4724 * \note 4725 * This API is available for CAT1A & CAT1D devices. 4726 * 4727 * \funcusage 4728 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterLp 4729 * 4730 *******************************************************************************/ 4731 cy_en_syspm_status_t Cy_SysPm_SystemEnterLp(void); 4732 4733 4734 /******************************************************************************* 4735 * Function Name: Cy_SysPm_SystemEnterUlp 4736 ****************************************************************************//** 4737 * 4738 * Sets device into system Ultra Low Power mode. 4739 * 4740 * System ULP mode is similar to system LP mode. The difference is that the 4741 * system is put under \ref group_syspm_ulp_limitations. 4742 * 4743 * Before entering system ULP mode, the user must configure the system so 4744 * the maximum clock frequencies are less than the ULP mode specifications 4745 * presented in the device datasheet. Refer to the device datasheet for 4746 * the maximum clock limitations in the ULP mode with reduced core supply 4747 * regulator voltages. 4748 * 4749 * Prior to entering system ULP mode, all the registered CY_SYSPM_ULP callbacks 4750 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 4751 * signal if it is not ready to enter system ULP mode. If any CY_SYSPM_ULP 4752 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 4753 * the remaining CY_SYSPM_ULP callbacks with the CY_SYSPM_CHECK_READY parameter 4754 * are skipped. 4755 * 4756 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_ULP callbacks with the 4757 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 4758 * CY_SYSPM_ULP callback with CY_SYSPM_CHECK_READY parameter that occurred up to 4759 * the point of failure. System ULP mode is not entered 4760 * and the Cy_SysPm_SystemEnterUlp() function returns CY_SYSPM_FAIL. 4761 * 4762 * If all CY_SYSPM_ULP callbacks with the CY_SYSPM_CHECK_READY 4763 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_ULP 4764 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_ULP 4765 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 4766 * allows preparation for ULP. The system ULP mode is then entered. 4767 * 4768 * After entering system ULP, all of the registered CY_SYSPM_ULP callbacks with 4769 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 4770 * peripherals for ULP operation. The Cy_SysPm_SystemEnterUlp() function 4771 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_ULP callbacks with the 4772 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 4773 * executed, if ULP mode is not entered. 4774 * 4775 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4776 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4777 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4778 * 4779 * The return value from executed callback functions with the 4780 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4781 * modes are ignored. 4782 * 4783 * To support control of callback execution order th following method is 4784 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4785 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4786 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4787 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4788 * are registered. 4789 * 4790 * \return 4791 * - CY_SYSPM_SUCCESS - Entered the system ULP mode or the device is already in ULP mode. 4792 * - CY_SYSPM_INVALID_STATE - System ULP mode was not set. The ULP mode was not 4793 * set because the protection context value is higher than zero (PC > 0) or the 4794 * device revision does not support modifying registers (to enter system 4795 * ULP mode) via syscall. 4796 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4797 * the function returns CY_SYSPM_SUCCESS. 4798 * - CY_SYSPM_FAIL - The system ULP mode is not entered. 4799 * For the PSoC 64 devices there are possible situations when function returns 4800 * the PRA error status code. This is because for PSoC 64 devices the function 4801 * uses the PRA driver to change the protected registers. Refer to 4802 * \ref cy_en_pra_status_t for more details. 4803 * 4804 * \note 4805 * This API is available for CAT1A & CAT1D devices. 4806 * 4807 * \funcusage 4808 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterUlp 4809 * 4810 *******************************************************************************/ 4811 cy_en_syspm_status_t Cy_SysPm_SystemEnterUlp(void); 4812 4813 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4814 4815 /******************************************************************************* 4816 * Function Name: Cy_SysPm_SystemEnterMf 4817 ****************************************************************************//** 4818 * 4819 * Sets device into system Medium Frequency(MF) Low Power mode. 4820 * 4821 * System MF mode is similar to system LP and ULP mode. The difference is that the 4822 * system is put under voltage which are in between LP and ULP. 4823 * 4824 * Before entering system MF mode, the user must configure the system so 4825 * the maximum clock frequencies are less than the MF mode specifications 4826 * presented in the device datasheet. Refer to the device datasheet for 4827 * the maximum clock limitations in the MF mode with reduced core supply 4828 * regulator voltages. 4829 * 4830 * Prior to entering system MF mode, all the registered CY_SYSPM_MF callbacks 4831 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 4832 * signal if it is not ready to enter system MF mode. If any CY_SYSPM_MF 4833 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 4834 * the remaining CY_SYSPM_MF callbacks with the CY_SYSPM_CHECK_READY parameter 4835 * are skipped. 4836 * 4837 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_MF callbacks with the 4838 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 4839 * CY_SYSPM_MF callback with CY_SYSPM_CHECK_READY parameter that occurred up to 4840 * the point of failure. System MF mode is not entered 4841 * and the Cy_SysPm_SystemEnterMf() function returns CY_SYSPM_FAIL. 4842 * 4843 * If all CY_SYSPM_MF callbacks with the CY_SYSPM_CHECK_READY 4844 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_MF 4845 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_MF 4846 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 4847 * allows preparation for MF. The system MF mode is then entered. 4848 * 4849 * After entering system MF, all of the registered CY_SYSPM_MF callbacks with 4850 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 4851 * peripherals for MF operation. The Cy_SysPm_SystemEnterUlp() function 4852 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_MF callbacks with the 4853 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 4854 * executed, if MF mode is not entered. 4855 * 4856 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4857 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4858 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4859 * 4860 * The return value from executed callback functions with the 4861 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4862 * modes are ignored. 4863 * 4864 * To support control of callback execution order th following method is 4865 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4866 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4867 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4868 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4869 * are registered. 4870 * 4871 * \return 4872 * - CY_SYSPM_SUCCESS - Entered the system MF mode or the device is already in MF mode. 4873 * - CY_SYSPM_INVALID_STATE - System MF mode was not set. The MF mode was not 4874 * set because the protection context value is higher than zero (PC > 0) or the 4875 * device revision does not support modifying registers (to enter system 4876 * MF mode) via syscall. 4877 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4878 * the function returns CY_SYSPM_SUCCESS. 4879 * - CY_SYSPM_FAIL - The system MF mode is not entered. 4880 * For the PSoC 64 devices there are possible situations when function returns 4881 * the PRA error status code. This is because for PSoC 64 devices the function 4882 * uses the PRA driver to change the protected registers. Refer to 4883 * \ref cy_en_pra_status_t for more details. 4884 * 4885 * \note 4886 * This API is available for CAT1D devices. 4887 * 4888 *******************************************************************************/ 4889 cy_en_syspm_status_t Cy_SysPm_SystemEnterMf(void); 4890 4891 4892 /******************************************************************************* 4893 * Function Name: Cy_Syspm_SetRAMTrimsPreDS 4894 ****************************************************************************//** 4895 * 4896 * Sets RAM trims before entering Deepsleep. 4897 * 4898 * \note 4899 * This API is available for CAT1D devices. 4900 * 4901 *******************************************************************************/ 4902 void Cy_Syspm_SetRAMTrimsPreDS(void); 4903 4904 /******************************************************************************* 4905 * Function Name: Cy_Syspm_SetRAMTrimsPostDS 4906 ****************************************************************************//** 4907 * 4908 * Sets RAM trims After exiting Deepsleep. 4909 * 4910 * \note 4911 * This API is available for CAT1D devices. 4912 * 4913 *******************************************************************************/ 4914 void Cy_Syspm_SetRAMTrimsPostDS(void); 4915 4916 #endif /* CY_IP_MXS22SRSS || defined (CY_DOXYGEN)*/ 4917 4918 4919 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 4920 4921 /******************************************************************************* 4922 * Function Name: Cy_SysPm_SystemEnterHibernate 4923 ****************************************************************************//** 4924 * 4925 * Sets the device into system Hibernate mode. 4926 * 4927 * Puts the device into the system Hibernate power mode. Prior to entering 4928 * Hibernate mode, all callbacks of the CY_SYSPM_HIBERNATE type are executed. 4929 * 4930 * First, callbacks of the CY_SYSPM_HIBERNATE type are called with the 4931 * CY_SYSPM_CHECK_READY parameter. This allows the callback to signal that the 4932 * driver is not ready to enter the system Hibernate power mode. If any of the 4933 * callback return CY_SYSPM_FAIL, the remaining CY_SYSPM_HIBERNATE callbacks are 4934 * skipped. In this case, all of the callbacks that have already been called are 4935 * called again with the CY_SYSPM_CHECK_FAIL parameter. System Hibernate mode is 4936 * not entered and the Cy_SysPm_SystemEnterHibernate() function returns 4937 * CY_SYSPM_FAIL. 4938 * 4939 * If all CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_CHECK_READY parameter 4940 * return CY_SYSPM_SUCCESS, then all CY_SYSPM_HIBERNATE callbacks with 4941 * CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_HIBERNATE callbacks 4942 * with CY_SYSPM_BEFORE_TRANSITION parameter are executed allowing the 4943 * peripherals to prepare for system Hibernate. 4944 * 4945 * The I/O output state is automatically frozen by hardware system and Hibernate 4946 * mode is then entered. In Hibernate mode, all internal supplies are off and no 4947 * internal state is retained. The only exception is resources powered by the 4948 * Vbackup domain continue to operate, if enabled. For multi-CPU devices, there 4949 * is no handshake with the CPUs and the chip will enter Hibernate power 4950 * mode immediately. 4951 * 4952 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4953 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4954 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4955 * 4956 * The return value from executed callback functions with the 4957 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4958 * modes are ignored. 4959 * 4960 * Wakeup from system Hibernate is triggered by toggling the wakeup pin(s), WDT 4961 * match, or back-up domain RTC alarm expiration, depending on how the they are 4962 * configured. A wakeup causes a normal boot procedure. 4963 * To configure the wakeup pin(s), a digital input pin must be configured, and 4964 * resistively pulled up or down to the inverse state of the wakeup polarity. To 4965 * distinguish a Hibernate mode from a general reset wakeup event, the 4966 * Cy_SysLib_GetResetReason() function can be used. The wakeup pin and low-power 4967 * comparators are active-low by default. The wakeup pin or the LPComparators 4968 * polarity can be changed with the \ref Cy_SysPm_SetHibernateWakeupSource() 4969 * function. 4970 * This function call will not return if system Hibernate mode is entered. 4971 * The CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_AFTER_TRANSITION parameter 4972 * are never executed. 4973 * 4974 * This function freezes the I/O pins implicitly. Entering system Hibernate mode 4975 * before freezing the I/O pins is not possible. The I/O pins remain frozen after 4976 * waking from Hibernate mode until the firmware unfreezes them with 4977 * a \ref Cy_SysPm_IoUnfreeze() function call. 4978 * 4979 * Boot firmware should reconfigure the I/O pins as required by the application 4980 * prior unfreezing them. 4981 * 4982 * To support control of callback execution order the following method is 4983 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4984 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4985 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4986 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4987 * are registered. 4988 * 4989 * \return 4990 * Entered status, see \ref cy_en_syspm_status_t. 4991 * For the PSoC 64 devices there are possible situations when function returns 4992 * the PRA error status code. This is because for PSoC 64 devices the function 4993 * uses the PRA driver to change the protected registers. Refer to 4994 * \ref cy_en_pra_status_t for more details. 4995 * 4996 * \funcusage 4997 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterHibernate 4998 * 4999 *******************************************************************************/ 5000 cy_en_syspm_status_t Cy_SysPm_SystemEnterHibernate(void); 5001 5002 5003 /******************************************************************************* 5004 * Function Name: Cy_SysPm_SetHibernateWakeupSource 5005 ****************************************************************************//** 5006 * 5007 * This function configures sources to wake up the device from the system 5008 * Hibernate power mode. Sources can be wakeup pins, LPComparators, Watchdog (WDT) 5009 * interrupt, or a Real-Time clock (RTC) alarm (interrupt). Wakeup from system 5010 * Hibernate always results in a device reset and normal boot process. 5011 * 5012 * Wakeup pins: 5013 * 5014 * A wakeup is supported by up to two pins with programmable polarity. These pins 5015 * are typically connected to the GPIO pins or on-chip peripherals under some 5016 * conditions. See device datasheet for specific pin connections. 5017 * Setting the wakeup pin to this level will cause a wakeup from system Hibernate 5018 * mode. The wakeup pins are active-low by default. 5019 * 5020 * LPComparators: 5021 * 5022 * A wakeup is supported by up to two LPComps with programmable polarity. 5023 * Setting the LPComp to this level will cause a wakeup from system Hibernate 5024 * mode. The wakeup LPComps are active-low by default. 5025 * 5026 * \note The low-power comparators should be configured and enabled before 5027 * switching to system Hibernate mode. Refer to the LPComp 5028 * driver description for more detail. 5029 * 5030 * Watchdog Timer: 5031 * 5032 * \note The WDT should be configured and enabled before entering to system 5033 * Hibernate mode. 5034 * 5035 * A wakeup is performed by a WDT interrupt. 5036 * 5037 * Real-time Clock: 5038 * 5039 * A wakeup is performed by the RTC alarm. 5040 * Refer to the Real-Time Clock (RTC) driver description for more detail. 5041 * 5042 * For information about wakeup sources and their assignment in specific 5043 * devices, refer to the appropriate device TRM. 5044 * 5045 * \param wakeupSource 5046 * The source to be configured as a wakeup source from 5047 * the system Hibernate power mode, see \ref cy_en_syspm_hibernate_wakeup_source_t. 5048 * The input parameter values can be ORed. For example, if you want to enable 5049 * LPComp0 (active high) and WDT, call this function: 5050 * Cy_SysPm_SetHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). 5051 * 5052 * \warning Do not call this function with different polarity levels for the same 5053 * wakeup source. For example, do not call a function like this: 5054 * Cy_SysPm_SetHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_LOW, CY_SYSPM_HIBERNATE_LPCOMP0_HIGH); 5055 * 5056 * \funcusage 5057 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SetHibernateWakeupSource 5058 * 5059 *******************************************************************************/ 5060 void Cy_SysPm_SetHibernateWakeupSource(uint32_t wakeupSource); 5061 5062 5063 /******************************************************************************* 5064 * Function Name: Cy_SysPm_ClearHibernateWakeupSource 5065 ****************************************************************************//** 5066 * 5067 * This function disables a wakeup source that was previously configured to 5068 * wake up the device from the system Hibernate mode. 5069 * 5070 * \param wakeupSource 5071 * For the source to be disabled, see \ref cy_en_syspm_hibernate_wakeup_source_t. 5072 * The input parameters values can be ORed. For example, if you want to disable 5073 * LPComp0 (active high) and WDT call this function: 5074 * Cy_SysPm_ClearHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). 5075 * 5076 * \funcusage 5077 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ClearHibernateWakeupSource 5078 * 5079 *******************************************************************************/ 5080 void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource); 5081 5082 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 5083 /******************************************************************************* 5084 * Function Name: Cy_SysPm_GetHibernateWakeupCause 5085 ****************************************************************************//** 5086 * 5087 * This function gets the wakeup cause for Hibernate mode. 5088 * 5089 * \return 5090 * Wakeup Reason \ref cy_en_syspm_hibernate_wakeup_source_t 5091 * 5092 * \note 5093 * This API is available for CAT1B and CAT1D devices. 5094 * 5095 *******************************************************************************/ 5096 cy_en_syspm_hibernate_wakeup_source_t Cy_SysPm_GetHibernateWakeupCause(void); 5097 5098 /******************************************************************************* 5099 * Function Name: Cy_SysPm_ClearHibernateWakeupCause 5100 ****************************************************************************//** 5101 * 5102 * This function Clears the wakeup cause register. 5103 * 5104 * \note 5105 * This API is available for CAT1B and CAT1D devices. 5106 * 5107 *******************************************************************************/ 5108 void Cy_SysPm_ClearHibernateWakeupCause(void); 5109 5110 #endif 5111 5112 5113 5114 /******************************************************************************* 5115 * Function Name: Cy_SysPm_SystemSetMinRegulatorCurrent 5116 ****************************************************************************//** 5117 * 5118 * Sets the system into minimum core regulator current mode. This mode limits 5119 * maximum current available for the system core logic. 5120 * 5121 * Minimum regulator current mode modifies operation of the system in LP or ULP 5122 * modes to further reduce current consumption. If the system current is below 5123 * datasheet current limits for the active core voltage regulator (LDO or Buck), 5124 * this mode may be entered. The user is responsible for ensuring the 5125 * regulator current limit is met in their application. 5126 * 5127 * When in minimum regulator current mode, the following system resources are 5128 * also set to their LP mode: 5129 * - Linear regulator (If LDO is active regulator) 5130 * - POR/BOD circuit 5131 * - Bandgap reference circuit 5132 * - Reference buffer circuit 5133 * - Current reference circuit 5134 * 5135 * The LDO and Buck current limits must be met prior to entering this 5136 * mode. If these are not met, the device may brown out, resulting in an 5137 * exception or reset. These changes also reduce power supply rejection of 5138 * the affected system resources, which can result in increased noise or response 5139 * time. These effects must be evaluated in each application. 5140 * 5141 * \return 5142 * See \ref cy_en_syspm_status_t. 5143 * - CY_SYSPM_SUCCESS - Minimum regulator current mode was set 5144 * - CY_SYSPM_CANCELED - The power circuits were not ready to enter into 5145 * minimum current mode. You should call the function again. 5146 * For the PSoC 64 devices there are possible situations when function returns 5147 * the PRA error status code. This is because for PSoC 64 devices the function 5148 * uses the PRA driver to change the protected registers. Refer to 5149 * \ref cy_en_pra_status_t for more details. 5150 * 5151 * Refer to device datasheet for maximum current value in regulator minimum 5152 * current mode. 5153 * 5154 * \funcusage 5155 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetMinRegulatorCurrent 5156 * 5157 *******************************************************************************/ 5158 cy_en_syspm_status_t Cy_SysPm_SystemSetMinRegulatorCurrent(void); 5159 5160 5161 /******************************************************************************* 5162 * Function Name: Cy_SysPm_SystemSetNormalRegulatorCurrent 5163 ****************************************************************************//** 5164 * 5165 * Sets the system to normal regulator current mode. 5166 * 5167 * Normal regulator current mode modifies operation of the system in LP or ULP 5168 * modes to provide maximum core current consumption. If the LDO core regulator 5169 * is in use, the normal mode output current limits may be used. If the buck 5170 * regulator is in use, its reduced current output limits still apply. 5171 * 5172 * When in normal regulator current mode, the following system resources are set 5173 * to their normal mode: 5174 * - Linear regulator (If LDO is active regulator) 5175 * - POR/BOD circuit 5176 * - Bandgap reference circuit 5177 * - Reference buffer circuit 5178 * - Current reference circuit 5179 * 5180 * \return 5181 * - CY_SYSPM_SUCCESS - Normal regulator current mode was set 5182 * - CY_SYSPM_TIMEOUT - The timeout occurred because device was not 5183 * ready to enter into the normal regulator current mode 5184 * For the PSoC 64 devices there are possible situations when function returns 5185 * the PRA error status code. This is because for PSoC 64 devices the function 5186 * uses the PRA driver to change the protected registers. Refer to 5187 * \ref cy_en_pra_status_t for more details. 5188 * 5189 * \funcusage 5190 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetNormalRegulatorCurrent 5191 * 5192 *******************************************************************************/ 5193 cy_en_syspm_status_t Cy_SysPm_SystemSetNormalRegulatorCurrent(void); 5194 5195 5196 /******************************************************************************* 5197 * Function Name: Cy_SysPm_CpuSleepOnExit 5198 ****************************************************************************//** 5199 * 5200 * This function configures the sleep-on-exit feature of the CPU. 5201 * 5202 * This API sets the SLEEPONEXIT bit of the SCR register. 5203 * 5204 * When the sleep-on-exit feature is enabled (the SLEEPONEXIT bit is set), 5205 * the CPU wakes up to service the interrupt and then immediately goes 5206 * back to sleep. Because of this, the unstacking process is not carried out, so 5207 * this feature is useful for interrupt driven application and helps to 5208 * reduce unnecessary stack push and pop operations. 5209 * The CPU does not go to sleep if the interrupt handler returns to 5210 * another interrupt handler (nested interrupt). 5211 * You can use this feature in applications that require the CPU to only run 5212 * when an interrupt occurs. 5213 * 5214 * When the sleep-on-exit feature is disabled (the SLEEPONEXIT bit is cleared), 5215 * the CPU returns back to the main thread after servicing the interrupt 5216 * without going back to sleep. 5217 * 5218 * Refer to the Arm documentation about the sleep-on-exit feature and 5219 * SLEEPONEXIT in the SCR register. 5220 * 5221 * \param enable 5222 * - True if enable sleep-on-exit feature. 5223 * - False if disable sleep-on-exit feature. 5224 * 5225 * \funcusage 5226 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuSleepOnExit 5227 * 5228 *******************************************************************************/ 5229 void Cy_SysPm_CpuSleepOnExit(bool enable); 5230 5231 /** \} group_syspm_functions_power */ 5232 5233 5234 /** 5235 * \addtogroup group_syspm_functions_ldo 5236 * \{ 5237 */ 5238 5239 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_DOXYGEN) 5240 5241 /******************************************************************************* 5242 * Function Name: Cy_SysPm_LdoSetVoltage 5243 ****************************************************************************//** 5244 * 5245 * Set output voltage on the core LDO regulator. 5246 * 5247 * When changing from a higher voltage to a lower voltage as when the device 5248 * enters system ULP mode, ensure that: 5249 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 5250 * and slow clock are under the \ref group_syspm_ulp_limitations. 5251 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 5252 * * The appropriate wait states values are set for the flash using 5253 * The Cy_SysLib_SetWaitStates() function as explained below. 5254 * 5255 * <b>Setting wait states values for flash</b> 5256 * 5257 * The flash access time when the core voltage is 0.9 V (nominal) is 5258 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 5259 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 5260 * wait state values for flash. 5261 * 5262 * To change from a higher voltage to a lower voltage 0.9 V (nominal), 5263 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 5264 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 5265 * 5266 * To change from a lower voltage to a higher voltage 1.1 V (nominal), calling 5267 * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function to set the 5268 * wait states is optional, but can be done to improve performance. 5269 * The clock frequency may now be increased up to 5270 * \ref group_syspm_lp_limitations. 5271 * 5272 * \note 1. The output is set to 0.9 V (nominal) - the system is in ULP mode and 5273 * flash works for read-only operation. 5274 * \note 2. The output is set to 1.1 V (nominal) - the system is in LP mode 5275 * and flash works for read and write operations. 5276 * \note 3. The actual device Vccd voltage can be different from the nominal 5277 * voltage because the actual voltage value depends on conditions 5278 * including the load current. 5279 * 5280 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 5281 * \ref group_syspm_switching_into_lp sections. 5282 * Refer to the \ref group_syslib driver for more detail about setting the wait 5283 * states. 5284 * 5285 * \param voltage 5286 * The desired output regulator voltage. 5287 * See \ref cy_en_syspm_ldo_voltage_t voltage 5288 * 5289 * \return 5290 * - CY_SYSPM_SUCCESS - The voltage is set. 5291 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 5292 * because the protection context value is higher than zero (PC > 0) or the 5293 * device revision does not support modifying registers via syscall. 5294 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5295 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 5296 * For the PSoC 64 devices there are possible situations when function returns 5297 * the PRA error status code. This is because for PSoC 64 devices the function 5298 * uses the PRA driver to change the protected registers. Refer to 5299 * \ref cy_en_pra_status_t for more details. 5300 * 5301 * \note 5302 * This API is available for CAT1A devices. 5303 * 5304 * \funcusage 5305 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 5306 * 5307 *******************************************************************************/ 5308 cy_en_syspm_status_t Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage); 5309 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) */ 5310 5311 /******************************************************************************* 5312 * Function Name: Cy_SysPm_LdoSetMode 5313 ****************************************************************************//** 5314 * 5315 * Configures the core LDO regulator operating mode to one of three modes. 5316 * Disabled - turns off the LDO regulator and should be selected only after the 5317 * Buck regulator is operating. Normal mode configures the LDO for operation at 5318 * the maximum output current limit. Minimal current mode optimizes the LDO at a 5319 * reduced output current limit. Specific device current limits can be found in 5320 * the device datasheet. 5321 * 5322 * \param mode 5323 * The desired LDO regulator operating mode. 5324 * See \ref cy_en_syspm_ldo_mode_t mode 5325 * 5326 * \return 5327 * - CY_SYSPM_SUCCESS - Requested regulator current mode was set 5328 * - CY_SYSPM_CANCELED - The power circuits were not ready to enter into 5329 * minimum current mode. You should try to call the function again 5330 * - CY_SYSPM_TIMEOUT - Timeout occurred because of active reference was not 5331 * ready to enter into the normal regulator current mode 5332 * - CY_SYSPM_FAIL - incorrect mode value was passed 5333 * For the PSoC 64 devices there are possible situations when function returns 5334 * the PRA error status code. This is because for PSoC 64 devices the function 5335 * uses the PRA driver to change the protected registers. Refer to 5336 * \ref cy_en_pra_status_t for more details. 5337 * 5338 * \sideeffect 5339 * For PSoC 64 series devices CY_SYSPM_LDO_MODE_DISABLED mode is not supported. 5340 * Use \ref Cy_SysPm_BuckEnable() instead. 5341 * 5342 *******************************************************************************/ 5343 cy_en_syspm_status_t Cy_SysPm_LdoSetMode(cy_en_syspm_ldo_mode_t mode); 5344 5345 5346 /******************************************************************************* 5347 * Function Name: Cy_SysPm_LdoGetMode 5348 ****************************************************************************//** 5349 * 5350 * Returns the current core LDO regulator operating mode. 5351 * 5352 * \return 5353 * The LDO regulator operating mode. 5354 * See \ref cy_en_syspm_ldo_mode_t mode 5355 * 5356 *******************************************************************************/ 5357 cy_en_syspm_ldo_mode_t Cy_SysPm_LdoGetMode(void); 5358 5359 /** \} group_syspm_functions_ldo */ 5360 5361 5362 /** 5363 * \addtogroup group_syspm_functions_linearreg 5364 * \{ 5365 */ 5366 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) 5367 5368 /******************************************************************************* 5369 * Function Name: Cy_SysPm_LinearRegDisable 5370 ****************************************************************************//** 5371 * 5372 * Disables internal linear regulator. 5373 * 5374 * \note 5375 * This API is available for CAT1C devices. 5376 * 5377 *******************************************************************************/ 5378 void Cy_SysPm_LinearRegDisable(void); 5379 5380 /******************************************************************************* 5381 * Function Name: Cy_SysPm_LinearRegEnable 5382 ****************************************************************************//** 5383 * 5384 * Enables internal linear regulator. 5385 * 5386 * \note 5387 * This API is available for CAT1C devices. 5388 * 5389 *******************************************************************************/ 5390 void Cy_SysPm_LinearRegEnable(void); 5391 5392 5393 /******************************************************************************* 5394 * Function Name: Cy_SysPm_LinearRegGetStatus 5395 ****************************************************************************//** 5396 * 5397 * Check the status of the internal linear regulator. 5398 * 5399 * \return 5400 * true - status ok 5401 * false - status fail 5402 * 5403 * \note 5404 * This API is available for CAT1C devices. 5405 * 5406 *******************************************************************************/ 5407 bool Cy_SysPm_LinearRegGetStatus(void); 5408 5409 5410 /******************************************************************************* 5411 * Function Name: Cy_SysPm_DeepSleepRegDisable 5412 ****************************************************************************//** 5413 * 5414 * Disables internal DeepSleep regulator. 5415 * 5416 * \note 5417 * This API is available for CAT1C devices. 5418 * 5419 *******************************************************************************/ 5420 void Cy_SysPm_DeepSleepRegDisable(void); 5421 5422 5423 /******************************************************************************* 5424 * Function Name: Cy_SysPm_DeepSleepRegEnable 5425 ****************************************************************************//** 5426 * 5427 * Enables internal DeepSleep regulator. 5428 * 5429 * \note 5430 * This API is available for CAT1C devices. 5431 * 5432 *******************************************************************************/ 5433 void Cy_SysPm_DeepSleepRegEnable(void); 5434 5435 /******************************************************************************* 5436 * Function Name: Cy_SySPm_IsDeepSleepRegEnabled 5437 ****************************************************************************//** 5438 * 5439 * Checks if internal DeepSleep regulator is enabled or not. 5440 * 5441 * \return 5442 * true - Enabled 5443 * false - Disabled 5444 * 5445 * \note 5446 * This API is available for CAT1C devices. 5447 * 5448 *******************************************************************************/ 5449 bool Cy_SySPm_IsDeepSleepRegEnabled(void); 5450 5451 #endif 5452 /** \} group_syspm_functions_linearreg */ 5453 5454 /** 5455 * \addtogroup group_syspm_functions_reghc 5456 * \{ 5457 */ 5458 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_DOXYGEN) 5459 5460 /******************************************************************************* 5461 * Function Name: Cy_SysPm_ReghcSelectMode 5462 ****************************************************************************//** 5463 * 5464 * Selects one of the supported REGHC modes. 5465 * 5466 * \param 5467 * mode - PMIC or Pass Transistor 5468 * 5469 * \note 5470 * This API is available for CAT1C devices. 5471 * 5472 *******************************************************************************/ 5473 void Cy_SysPm_ReghcSelectMode(cy_en_syspm_reghc_mode_t mode); 5474 5475 /******************************************************************************* 5476 * Function Name: Cy_SysPm_ReghcGetMode 5477 ****************************************************************************//** 5478 * 5479 * Gets the supported REGHC modes. 5480 * 5481 * \return \ref cy_en_syspm_reghc_mode_t 5482 * 5483 * \note 5484 * This API is available for CAT1C devices. 5485 * 5486 *******************************************************************************/ 5487 cy_en_syspm_reghc_mode_t Cy_SysPm_ReghcGetMode(void); 5488 5489 /******************************************************************************* 5490 * Function Name: Cy_SysPm_ReghcSelectDriveOut 5491 ****************************************************************************//** 5492 * 5493 * Selects DRV_OUT setting. 5494 * 5495 * \param 5496 * drvOut - \ref cy_en_syspm_reghc_drive_out_t 5497 * 5498 * \note 5499 * This API is available for CAT1C devices. 5500 * 5501 *******************************************************************************/ 5502 void Cy_SysPm_ReghcSelectDriveOut(cy_en_syspm_reghc_drive_out_t drvOut); 5503 5504 /******************************************************************************* 5505 * Function Name: Cy_SysPm_ReghcGetDriveOut 5506 ****************************************************************************//** 5507 * 5508 * Gets the DRV_OUT setting. 5509 * 5510 * \return \ref cy_en_syspm_reghc_drive_out_t 5511 * 5512 * \note 5513 * This API is available for CAT1C devices. 5514 * 5515 *******************************************************************************/ 5516 cy_en_syspm_reghc_drive_out_t Cy_SysPm_ReghcGetDriveOut(void); 5517 5518 5519 /******************************************************************************* 5520 * Function Name: Cy_SysPm_ReghcAdjustOutputVoltage 5521 ****************************************************************************//** 5522 * 5523 * Selects regulator output voltage adjustment. 5524 * 5525 * \param 5526 * trim - \ref cy_en_syspm_reghc_vadj_t 5527 * 5528 * \note 5529 * This API is available for CAT1C devices. 5530 * 5531 *******************************************************************************/ 5532 void Cy_SysPm_ReghcAdjustOutputVoltage(cy_en_syspm_reghc_vadj_t trim); 5533 5534 5535 /******************************************************************************* 5536 * Function Name: Cy_SysPm_ReghcDisableIntSupplyWhileExtActive 5537 ****************************************************************************//** 5538 * 5539 * Internal Active Linear Regulator disabled after PMIC enabled. OCD is disabled. 5540 * 5541 * \note 5542 * This API is available for CAT1C devices. 5543 * 5544 *******************************************************************************/ 5545 void Cy_SysPm_ReghcDisableIntSupplyWhileExtActive(void); 5546 5547 5548 /******************************************************************************* 5549 * Function Name: Cy_SysPm_ReghcEnableIntSupplyWhileExtActive 5550 ****************************************************************************//** 5551 * 5552 * Internal Active Linear Regulator kept enabled. See datasheet for minimum 5553 * PMIC vccd input to prevent OCD. 5554 * 5555 * \note 5556 * This API is available for CAT1C devices. 5557 * 5558 *******************************************************************************/ 5559 void Cy_SysPm_ReghcEnableIntSupplyWhileExtActive(void); 5560 5561 5562 /******************************************************************************* 5563 * Function Name: Cy_SysPm_ReghcDisablePmicEnableOutput 5564 ****************************************************************************//** 5565 * 5566 * Disables "PMIC enable" output. 5567 * 5568 * \note 5569 * This API is available for CAT1C devices. 5570 * 5571 *******************************************************************************/ 5572 void Cy_SysPm_ReghcDisablePmicEnableOutput(void); 5573 5574 5575 /******************************************************************************* 5576 * Function Name: Cy_SysPm_ReghcEnablePmicEnableOutput 5577 ****************************************************************************//** 5578 * 5579 * Enables "PMIC enable" output. 5580 * 5581 * \param 5582 * polarity => true - output high, false - output low. 5583 * 5584 * \note 5585 * This API is available for CAT1C devices. 5586 * 5587 *******************************************************************************/ 5588 void Cy_SysPm_ReghcEnablePmicEnableOutput(bool polarity); 5589 5590 5591 /******************************************************************************* 5592 * Function Name: Cy_SysPm_ReghcEnablePmicStatusInput 5593 ****************************************************************************//** 5594 * 5595 * Enables receiving status from PMIC. 5596 * 5597 * \param 5598 * polarity => true/false -> receiving high/low means abnormal status. 5599 * 5600 * \note 5601 * This API is available for CAT1C devices. 5602 * 5603 *******************************************************************************/ 5604 void Cy_SysPm_ReghcEnablePmicStatusInput(bool polarity); 5605 5606 /******************************************************************************* 5607 * Function Name: Cy_SysPm_ReghcDisablePmicStatusInput 5608 ****************************************************************************//** 5609 * 5610 * Disables PMIC status input 5611 * 5612 * \note 5613 * This API is available for CAT1C devices. 5614 * 5615 *******************************************************************************/ 5616 void Cy_SysPm_ReghcDisablePmicStatusInput(void); 5617 5618 /******************************************************************************* 5619 * Function Name: Cy_SysPm_ReghcSetPmicStatusWaitTime 5620 ****************************************************************************//** 5621 * 5622 * Wait count in 4us steps after PMIC status ok. This is used by the hardware 5623 * sequencer to allow additional settling time before disabling the internal 5624 * regulator. 5625 * The LSB is 32 IMO periods which results in a nominal LSB step of 4us. 5626 * 5627 * \param 5628 * waitTime = 0 to 1023 -> (waitTime * 4us) Delay 5629 * 5630 * \note 5631 * This API is available for CAT1C devices. 5632 * 5633 *******************************************************************************/ 5634 void Cy_SysPm_ReghcSetPmicStatusWaitTime(uint16_t waitTime); 5635 5636 /******************************************************************************* 5637 * Function Name: Cy_SysPm_ReghcIsConfigured 5638 ****************************************************************************//** 5639 * 5640 * Indicates that the REGHC has been configured. 5641 * Do not change REGHC settings after this bit is high. 5642 * 5643 * \return 5644 * true - Configured, false - Not configured 5645 * 5646 * \note 5647 * This API is available for CAT1C devices. 5648 * 5649 *******************************************************************************/ 5650 bool Cy_SysPm_ReghcIsConfigured(void); 5651 5652 5653 /******************************************************************************* 5654 * Function Name: Cy_SysPm_ReghcSetConfigured 5655 ****************************************************************************//** 5656 * 5657 * Set REGHC is configured. This is required to apply setting before enabling REGHC. 5658 * 5659 * \note 5660 * This API is available for CAT1C devices. 5661 * 5662 *******************************************************************************/ 5663 void Cy_SysPm_ReghcSetConfigured(void); 5664 5665 /******************************************************************************* 5666 * Function Name: Cy_SysPm_ReghcDisable 5667 ****************************************************************************//** 5668 * 5669 * Disables REGHC. 5670 * 5671 * \note 5672 * This API is available for CAT1C devices. 5673 * 5674 *******************************************************************************/ 5675 void Cy_SysPm_ReghcDisable(void); 5676 5677 /******************************************************************************* 5678 * Function Name: Cy_SysPm_ReghcEnable 5679 ****************************************************************************//** 5680 * 5681 * Enables REGHC. 5682 * 5683 * \note 5684 * This API is available for CAT1C devices. 5685 * 5686 *******************************************************************************/ 5687 void Cy_SysPm_ReghcEnable(void); 5688 5689 5690 /******************************************************************************* 5691 * Function Name: Cy_SysPm_ReghcDisablePmicStatusTimeout 5692 ****************************************************************************//** 5693 * 5694 * Disables timeout when waiting for REGHC_PMIC_STATUS_OK. 5695 * 5696 * \note 5697 * This API is available for CAT1C devices. 5698 * 5699 *******************************************************************************/ 5700 void Cy_SysPm_ReghcDisablePmicStatusTimeout(void); 5701 5702 5703 /******************************************************************************* 5704 * Function Name: Cy_SysPm_ReghcEnablePmicStatusTimeout 5705 ****************************************************************************//** 5706 * 5707 * Enables timeout while waiting for REGHC_PMIC_STATUS_OK==1 when switching to PMIC. 5708 * Timeout expiration triggers reset. 5709 * 5710 * \param 5711 * timeout = 1 - 255 -> (timeout * 128us) delay until reset 5712 * 5713 * \note 5714 * This API is available for CAT1C devices. 5715 * 5716 *******************************************************************************/ 5717 void Cy_SysPm_ReghcEnablePmicStatusTimeout(uint8_t timeout); 5718 5719 5720 /******************************************************************************* 5721 * Function Name: Cy_SysPm_ReghcIsEnabled 5722 ****************************************************************************//** 5723 * 5724 * Indicates the state of the REGHC enable/disable sequencer. This bit is only 5725 * valid when REGHC_SEQ_BUSY==0. 5726 * 5727 * \return 5728 * true - Enabled, false - Disabled 5729 * 5730 * \note 5731 * This API is available for CAT1C devices. 5732 * 5733 *******************************************************************************/ 5734 bool Cy_SysPm_ReghcIsEnabled(void); 5735 5736 5737 /******************************************************************************* 5738 * Function Name: Cy_SysPm_ReghcIsStatusOk 5739 ****************************************************************************//** 5740 * 5741 * Indicates the PMIC status is ok. This includes polarity adjustment according 5742 * to REGHC_PMIC_STATUS_POLARITY. 5743 * 5744 * \return 5745 * false: PMIC status is not ok or PMIC input is disabled (PMIC_STATUS_INEN == 0) 5746 * true: PMIC status input is enabled and indicates ok 5747 * 5748 * \note 5749 * This API is available for CAT1C devices. 5750 * 5751 *******************************************************************************/ 5752 bool Cy_SysPm_ReghcIsStatusOk(void); 5753 5754 5755 /******************************************************************************* 5756 * Function Name: Cy_SysPm_ReghcIsSequencerBusy 5757 ****************************************************************************//** 5758 * 5759 * Indicates whether the REGHC circuit is busy. Indicates the REGHC enable/disable 5760 * sequencer is busy transitioning to/from REGHC. 5761 * 5762 * \return 5763 * true: REGHC busy 5764 * false: REGHC not busy 5765 * 5766 * \note 5767 * This API is available for CAT1C devices. 5768 * 5769 *******************************************************************************/ 5770 bool Cy_SysPm_ReghcIsSequencerBusy(void); 5771 5772 5773 /******************************************************************************* 5774 * Function Name: Cy_SysPm_ReghcDisableVAdj 5775 ****************************************************************************//** 5776 * 5777 * Device does not generate VADJ, and it must not be part of the PMIC feedback loop. 5778 * This reduces current by turning off the internal resistor divider that generates 5779 * VADJ. 5780 * 5781 * \note 5782 * This API is available for CAT1C devices. 5783 * 5784 *******************************************************************************/ 5785 void Cy_SysPm_ReghcDisableVAdj(void); 5786 5787 /******************************************************************************* 5788 * Function Name: Cy_SysPm_ReghcEnableVAdj 5789 ****************************************************************************//** 5790 * 5791 * Device generates VADJ when PMIC is enabled. This allows the feedback loop to 5792 * compensate for voltage drops in the PCB and package. 5793 * 5794 * \note 5795 * This API is available for CAT1C devices. 5796 * 5797 *******************************************************************************/ 5798 void Cy_SysPm_ReghcEnableVAdj(void); 5799 5800 /******************************************************************************* 5801 * Function Name: Cy_SysPm_ReghcDisablePmicInDeepSleep 5802 ****************************************************************************//** 5803 * 5804 * Device operates from internal regulators during DEEPSLEEP. If PMIC is enabled 5805 * at the beginning of the DEEPSLEEP transition, hardware changes to the internal 5806 * regulators and disables the PMIC. 5807 * 5808 * \note 5809 * This API is available for CAT1C devices. 5810 * 5811 *******************************************************************************/ 5812 void Cy_SysPm_ReghcDisablePmicInDeepSleep(void); 5813 5814 5815 /******************************************************************************* 5816 * Function Name: Cy_SysPm_ReghcEnablePmicInDeepSleep 5817 ****************************************************************************//** 5818 * 5819 * DEEPSLEEP transition does not change PMIC enable. 5820 * 5821 * \note 5822 * This API is available for CAT1C devices. 5823 * 5824 *******************************************************************************/ 5825 void Cy_SysPm_ReghcEnablePmicInDeepSleep(void); 5826 5827 /******************************************************************************* 5828 * Function Name: Cy_SysPm_ReghcIsOcdWithinLimits 5829 ****************************************************************************//** 5830 * 5831 * Indicates the over-current detector is operating and the current drawn from 5832 * REGHC is within limits. OCD is only a choice for transistor mode, and it is 5833 * disabled for PMIC mode. 5834 * 5835 * \return 5836 * false: Current measurement exceeds limit or detector is OFF, 5837 * true: Current measurement within limit 5838 * 5839 * \note 5840 * This API is available for CAT1C devices. 5841 * 5842 *******************************************************************************/ 5843 bool Cy_SysPm_ReghcIsOcdWithinLimits(void); 5844 5845 5846 /******************************************************************************* 5847 * Function Name: Cy_SysPm_ReghcIsCircuitEnabledAndOperating 5848 ****************************************************************************//** 5849 * 5850 * Indicates the REGHC circuit is enabled and operating. 5851 * 5852 * \return 5853 * false: REGHC Disabled 5854 * true: REGHC Enabled and Operating 5855 * 5856 * \note 5857 * This API is available for CAT1C devices. 5858 * 5859 *******************************************************************************/ 5860 bool Cy_SysPm_ReghcIsCircuitEnabledAndOperating(void); 5861 5862 /******************************************************************************* 5863 * Function Name: Cy_SysPm_ReghcConfigure 5864 ****************************************************************************//** 5865 * 5866 * Configures REGHC. 5867 * 5868 * \param mode \ref cy_en_syspm_reghc_mode_t. 5869 * 5870 * \param vadj \ref cy_en_syspm_reghc_vadj_t. 5871 * 5872 * \return 5873 * - CY_SYSPM_SUCCESS - REGHC Configured Successfully 5874 * - CY_SYSPM_TIMEOUT - REGHC Configuration Failed 5875 * 5876 * \note 5877 * This API is available for CAT1C devices. 5878 * 5879 * \note 5880 * This API takes care of the sequence needed for changing from Linear 5881 * Regulator to REGHC with External Transistor, this API do not support changing to 5882 * REGHC with External PMIC. 5883 * 5884 *******************************************************************************/ 5885 cy_en_syspm_status_t Cy_SysPm_ReghcConfigure(cy_en_syspm_reghc_mode_t mode, cy_en_syspm_reghc_vadj_t vadj); 5886 5887 /******************************************************************************* 5888 * Function Name: Cy_SysPm_ReghcDeConfigure 5889 ****************************************************************************//** 5890 * 5891 * De-Configures REGHC. 5892 * 5893 * \return 5894 * - CY_SYSPM_SUCCESS - REGHC De-Configured Successfully 5895 * - CY_SYSPM_TIMEOUT - REGHC De-Configuration Failed 5896 * 5897 * \note 5898 * This API is available for CAT1C devices. 5899 * 5900 *******************************************************************************/ 5901 cy_en_syspm_status_t Cy_SysPm_ReghcDeConfigure(void); 5902 5903 5904 #endif 5905 5906 /** \} group_syspm_functions_reghc */ 5907 5908 5909 /** 5910 * \addtogroup group_syspm_functions_ovd 5911 * \{ 5912 */ 5913 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || defined (CY_DOXYGEN) 5914 /******************************************************************************* 5915 * Function Name: Cy_SysPm_OvdEnable 5916 ****************************************************************************//** 5917 * 5918 * Enables OVD over either VDDD or VDDA or VCCD. 5919 * 5920 * \param ovdSel \ref cy_en_syspm_ovd_sel_t. 5921 * 5922 * \note 5923 * This API is available for CAT1C devices. 5924 * 5925 * \note 5926 * OVD over VDDD and VCCD are enabled by default and cannot be disabled. 5927 * 5928 *******************************************************************************/ 5929 void Cy_SysPm_OvdEnable(cy_en_syspm_ovd_sel_t ovdSel); 5930 5931 5932 5933 /******************************************************************************* 5934 * Function Name: Cy_SysPm_OvdDisable 5935 ****************************************************************************//** 5936 * 5937 * Disables OVD over either VDDD or VDDA or VCCD. 5938 * 5939 * \param ovdSel \ref cy_en_syspm_ovd_sel_t. 5940 * 5941 * \note 5942 * This API is available for CAT1C devices. 5943 * 5944 * \note 5945 * OVD over VDDD and VCCD are enabled by default and cannot be disabled. 5946 * 5947 * \note 5948 * Disabling OVD over VDDA will perform the /ref cy_en_syspm_ovd_action_select_t 5949 * action selected for VDDA. If no action is desired when disabling, firmware 5950 * must first write CY_SYSPM_OVD_ACTION_NOTHING in a separate write cycle. 5951 * 5952 *******************************************************************************/ 5953 void Cy_SysPm_OvdDisable(cy_en_syspm_ovd_sel_t ovdSel); 5954 5955 5956 5957 /******************************************************************************* 5958 * Function Name: Cy_SysPm_OvdVdddSelect 5959 ****************************************************************************//** 5960 * 5961 * Selects voltage threshold for OVD on VDDD 5962 * 5963 * \param ovdVdddSel \ref cy_en_syspm_ovd_vddd_sel_t. 5964 * 5965 * \note 5966 * This API is available for CAT1C devices. 5967 * 5968 *******************************************************************************/ 5969 void Cy_SysPm_OvdVdddSelect(cy_en_syspm_ovd_vddd_sel_t ovdVdddSel); 5970 5971 5972 /******************************************************************************* 5973 * Function Name: Cy_SysPm_OvdVddaSelect 5974 ****************************************************************************//** 5975 * 5976 * Selects voltage threshold for OVD on VDDA 5977 * 5978 * \param ovdVddaSel \ref cy_en_syspm_ovd_vdda_sel_t. 5979 * 5980 * \note 5981 * This API is available for CAT1C devices. 5982 * 5983 *******************************************************************************/ 5984 void Cy_SysPm_OvdVddaSelect(cy_en_syspm_ovd_vdda_sel_t ovdVddaSel); 5985 5986 5987 /******************************************************************************* 5988 * Function Name: Cy_SysPm_OvdActionSelect 5989 ****************************************************************************//** 5990 * 5991 * Sets the action taken when the threshold is crossed in the programmed directions(s) 5992 * for VDDA. 5993 * 5994 * \param ovdActionSelect \ref cy_en_syspm_ovd_action_select_t. 5995 * 5996 * \note 5997 * This API is available for CAT1C devices. 5998 * 5999 * \note 6000 * This API is not applicable for selectng actions for VDDD and VCCD as the default 6001 * action is RESET for them. 6002 * 6003 *******************************************************************************/ 6004 void Cy_SysPm_OvdActionSelect(cy_en_syspm_ovd_action_select_t ovdActionSelect); 6005 6006 #endif 6007 6008 /** \} group_syspm_functions_ovd */ 6009 6010 /** 6011 * \addtogroup group_syspm_functions_bod 6012 * \{ 6013 */ 6014 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) 6015 /******************************************************************************* 6016 * Function Name: Cy_SysPm_BodEnable 6017 ****************************************************************************//** 6018 * 6019 * Enables BOD over either VDDD or VDDA or VCCD. 6020 * 6021 * \param bodSel \ref cy_en_syspm_bod_sel_t. 6022 * 6023 * \note 6024 * This API is available for CAT1C devices. 6025 * 6026 * \note 6027 * BOD over VDDD and VCCD are enabled by default and cannot be disabled. 6028 * 6029 *******************************************************************************/ 6030 void Cy_SysPm_BodEnable(cy_en_syspm_bod_sel_t bodSel); 6031 6032 /******************************************************************************* 6033 * Function Name: Cy_SysPm_BodDisable 6034 ****************************************************************************//** 6035 * 6036 * Disables BOD over either VDDD or VDDA or VCCD. 6037 * 6038 * \param bodSel \ref cy_en_syspm_bod_sel_t. 6039 * 6040 * \note 6041 * This API is available for CAT1C devices. 6042 * 6043 * \note 6044 * BOD over VDDD and VCCD are enabled by default and cannot be disabled. 6045 * 6046 * \note 6047 * Disabling BOD over VDDA will perform the /ref cy_en_syspm_bod_action_select_t 6048 * action selected for VDDA. If no action is desired when disabling, firmware 6049 * must first write CY_SYSPM_BOD_ACTION_NOTHING in a separate write cycle. 6050 * 6051 *******************************************************************************/ 6052 void Cy_SysPm_BodDisable(cy_en_syspm_bod_sel_t bodSel); 6053 6054 6055 /******************************************************************************* 6056 * Function Name: Cy_SysPm_BodVdddSelect 6057 ****************************************************************************//** 6058 * 6059 * Selects voltage threshold for BOD on VDDD 6060 * 6061 * \param bodVdddSel \ref cy_en_syspm_bod_vddd_sel_t. 6062 * 6063 * \note 6064 * This API is available for CAT1C devices. 6065 * 6066 *******************************************************************************/ 6067 void Cy_SysPm_BodVdddSelect(cy_en_syspm_bod_vddd_sel_t bodVdddSel); 6068 6069 6070 /******************************************************************************* 6071 * Function Name: Cy_SysPm_BodVddaSelect 6072 ****************************************************************************//** 6073 * 6074 * Selects voltage threshold for BOD on VDDA 6075 * 6076 * \param bodVddaSel \ref cy_en_syspm_bod_vdda_sel_t. 6077 * 6078 * \note 6079 * This API is available for CAT1C devices. 6080 * 6081 *******************************************************************************/ 6082 void Cy_SysPm_BodVddaSelect(cy_en_syspm_bod_vdda_sel_t bodVddaSel); 6083 6084 6085 /******************************************************************************* 6086 * Function Name: Cy_SysPm_BodActionSelect 6087 ****************************************************************************//** 6088 * 6089 * Sets the action taken when the threshold is crossed in the programmed directions(s) 6090 * for VDDA. 6091 * 6092 * \param bodActionSelect \ref cy_en_syspm_bod_action_select_t. 6093 * 6094 * \note 6095 * This API is available for CAT1C devices. 6096 * 6097 * \note 6098 * This API is not applicable for selectng actions for VDDD and VCCD as the default 6099 * action is RESET for them. 6100 * 6101 *******************************************************************************/ 6102 void Cy_SysPm_BodActionSelect(cy_en_syspm_bod_action_select_t bodActionSelect); 6103 6104 6105 /******************************************************************************* 6106 * Function Name: Cy_SysPm_SupplySupervisionStatus 6107 ****************************************************************************//** 6108 * 6109 * Supply Status. 6110 * 6111 * \param supplyEntitySelect \ref cy_en_syspm_supply_entity_select_t. 6112 6113 * \return 6114 * State of BOD/OVD on VDDD/VDDA/VCCD, whether OK or Not OK 6115 * 6116 * \note 6117 * This API is available for CAT1C devices. 6118 * 6119 *******************************************************************************/ 6120 bool Cy_SysPm_SupplySupervisionStatus(cy_en_syspm_supply_entity_select_t supplyEntitySelect); 6121 6122 #endif 6123 6124 /** \} group_syspm_functions_bod */ 6125 6126 6127 /** 6128 * \addtogroup group_syspm_functions_buck 6129 * \{ 6130 */ 6131 6132 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_DOXYGEN) 6133 6134 /******************************************************************************* 6135 * Function Name: Cy_SysPm_BuckEnable 6136 ****************************************************************************//** 6137 * 6138 * Switch the core supply regulator to Buck core regulator instead of the LDO 6139 * regulator. 6140 * The Buck core regulator provides output voltage(s) using one external 6141 * inductor and can supply Vccd with higher efficiency than the LDO under some 6142 * conditions, such as high external supply voltage. 6143 * 6144 * Before changing from LDO to Buck, ensure that the circuit board has 6145 * connected Vccbuck1 to Vccd and also populated the 6146 * necessary external components for the Buck regulator, including an 6147 * inductor and a capacitor for each output. 6148 * Refer to the device TRM for more detail. 6149 * 6150 * When changing from a higher voltage to a lower voltage 6151 * (from system LP = LDO 1.1 V (nominal) to system ULP = Buck 0.9 V (nominal)), 6152 * ensure that: 6153 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 6154 * and slow clock are under the \ref group_syspm_ulp_limitations. 6155 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 6156 * 6157 * * The appropriate wait states values are set for the flash using 6158 * the Cy_SysLib_SetWaitStates() function as explained below. 6159 * 6160 * <b>Setting wait states values for flash</b> 6161 * 6162 * The flash access time when the core output voltage is 0.9 V (nominal) is 6163 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 6164 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 6165 * wait state values for flash. 6166 * 6167 * To change from a higher voltage (LDO 1.1 V) to a lower voltage (Buck 0.9 V), 6168 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 6169 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 6170 * 6171 * To change from a lower voltage (LDO 0.9 V (nominal) to a higher voltage 6172 * (Buck 1.1 V (nominal)), call the Cy_SysLib_SetWaitStates(false, 6173 * hfClkFreqMz) function to set the wait states after the voltage change. 6174 * It is optional, but can be done to improve performance. The clock frequency 6175 * may now be increased up to system LP mode limits for the new voltage. 6176 * 6177 * \note 1. If the final Buck output is set to 0.9 V (nominal) - the system is in 6178 * ULP mode and flash allows read-only operations. 6179 * \note 2. If the final Buck output is set to 1.1 V (nominal) - the system is in 6180 * LP mode flash allows the read and write operations. 6181 * \note 3. The actual device Vccd voltage can be different from the nominal 6182 * voltage because the actual voltage value depends on conditions 6183 * including the load current. 6184 * 6185 * \warning There is no safe way to go back to the LDO after the 6186 * Buck regulator supplies a core. The function enabling the Buck regulator 6187 * switches off the LDO. 6188 * 6189 * \warning Buck converter requires additional external components populated on 6190 * dedicated pins. Refer to device datasheet for details. 6191 * 6192 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 6193 * \ref group_syspm_switching_into_lp sections. 6194 * Refer to the \ref group_syslib driver for more detail about setting wait 6195 * states. 6196 * 6197 * \param voltage 6198 * The desired output 1 regulator voltage (Vccbuck1). 6199 * See \ref cy_en_syspm_buck_voltage1_t. 6200 * 6201 * \return 6202 * - CY_SYSPM_SUCCESS - The voltage is set as requested. 6203 * (There is no change if the new voltage is the same as the previous voltage.) 6204 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 6205 * because the protection context value is higher than zero (PC > 0) or the 6206 * device revision does not support modifying registers via syscall. 6207 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 6208 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 6209 * For the PSoC 64 devices there are possible situations when function returns 6210 * the PRA error status code. This is because for PSoC 64 devices the function 6211 * uses the PRA driver to change the protected registers. Refer to 6212 * \ref cy_en_pra_status_t for more details. 6213 * 6214 * \note 6215 * The function is applicable only for devices with a Buck regulator. 6216 * 6217 * Function uses a critical section to prevent interrupting the regulators 6218 * switch. 6219 * 6220 * \funcusage 6221 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckEnable 6222 * 6223 * \note 6224 * This API is available for CAT1A devices. 6225 * 6226 *******************************************************************************/ 6227 cy_en_syspm_status_t Cy_SysPm_BuckEnable(cy_en_syspm_buck_voltage1_t voltage); 6228 6229 6230 /******************************************************************************* 6231 * Function Name: Cy_SysPm_BuckSetVoltage1 6232 ****************************************************************************//** 6233 * 6234 * Sets the output 1 voltage for the Buck regulator that can supply the device 6235 * core. This output can supply the device core instead of the LDO regulator. 6236 * 6237 * When changing from a higher voltage 1.1 V (nominal) to a lower voltage 0.9 V 6238 * (nominal), ensure that: 6239 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 6240 * and slow clock are under the \ref group_syspm_ulp_limitations. 6241 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 6242 * * The appropriate wait states values are set for the flash using 6243 * the Cy_SysLib_SetWaitStates() function as explained below. 6244 * 6245 * <b>Setting wait states values for flash</b> 6246 * 6247 * The flash access time when the core output voltage is 0.9 V (nominal) is 6248 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 6249 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 6250 * wait state values for flash. 6251 * 6252 * To change from a higher voltage to a lower voltage 0.9 V (nominal), 6253 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 6254 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 6255 * 6256 * To change from a lower voltage to a higher voltage 1.1 V (nominal), call 6257 * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function to set the 6258 * wait states. It is optional, but can be done to improve the performance. 6259 * The clock frequency may now be increased up to 6260 * \ref group_syspm_lp_limitations for a new voltage. 6261 * 6262 * \note 1. The output is set to 0.9 V (nominal) - the system is in ULP mode 6263 * flash allows read-only operations. 6264 * \note 2. The output is set to 1.1 V (nominal) - the system is in LP mode and 6265 * flash allows the read and write operations. 6266 * \note 3. The actual device Vccd voltage can be different from the nominal 6267 * voltage because the actual voltage value depends on the conditions 6268 * including the load current. 6269 * 6270 * \warning Buck converter requires additional external components populated on 6271 * dedicated pins. Refer to device datasheet for details. 6272 * 6273 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 6274 * \ref group_syspm_switching_into_lp sections. 6275 * Refer to the \ref group_syslib driver for more detail about setting the 6276 * wait states. 6277 * 6278 * \param voltage 6279 * The desired output 1 regulator voltage (Vccbuck1). 6280 * See \ref cy_en_syspm_buck_voltage1_t 6281 * 6282 * \return 6283 * - CY_SYSPM_SUCCESS - The voltage is set. 6284 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 6285 * because the protection context value is higher than zero (PC > 0) or the 6286 * device revision does not support modifying registers via syscall. 6287 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 6288 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 6289 * For the PSoC 64 devices there are possible situations when function returns 6290 * the PRA error status code. This is because for PSoC 64 devices the function 6291 * uses the PRA driver to change the protected registers. Refer to 6292 * \ref cy_en_pra_status_t for more details. 6293 * 6294 * \funcusage 6295 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 6296 * 6297 * \sideeffect 6298 * For PSoC 64 series devices Cy_SysPm_BuckSetVoltage1() has the same functional 6299 * behavior as \ref Cy_SysPm_BuckEnable() function. 6300 * 6301 * \note 6302 * This API is available for CAT1A devices. 6303 * 6304 *******************************************************************************/ 6305 cy_en_syspm_status_t Cy_SysPm_BuckSetVoltage1(cy_en_syspm_buck_voltage1_t voltage); 6306 6307 6308 /******************************************************************************* 6309 * Function Name: Cy_SysPm_BuckSetVoltage2 6310 ****************************************************************************//** 6311 * 6312 * This function sets output voltage 2 (Vbuckrf) of the SIMO Buck regulator. 6313 * 6314 * \param voltage 6315 * The voltage of the Buck regulator output 2 (Vbuckrf). 6316 * See \ref cy_en_syspm_buck_voltage2_t. 6317 * 6318 * \param waitToSettle 6319 * - True to enable the 200 us delay after setting a higher voltage. 6320 * - False to disable the 200 us delay after setting a higher voltage. 6321 * 6322 * \warning You must enable the delay (waitToSettle = true) 6323 * while changing from a lower voltage to a higher voltage. 6324 * 6325 * \note The 200 us delay is required only when changing from a 6326 * lower voltage to a higher voltage. When changing from a higher voltage to a 6327 * lower one, the delay is not required. 6328 * 6329 * \warning The function works only on devices with the SIMO Buck regulator. 6330 * Refer to the device datasheet for information on whether the device contains 6331 * SIMO Buck. 6332 * 6333 * \warning Buck converter requires additional external components populated on 6334 * dedicated pins. Refer to device datasheet for details. 6335 * 6336 * \funcusage 6337 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckSetVoltage2 6338 * 6339 * \note 6340 * This API is available for CAT1A devices. 6341 * 6342 *******************************************************************************/ 6343 void Cy_SysPm_BuckSetVoltage2(cy_en_syspm_buck_voltage2_t voltage, bool waitToSettle); 6344 6345 6346 /******************************************************************************* 6347 * Function Name: Cy_SysPm_BuckEnableVoltage2 6348 ****************************************************************************//** 6349 * 6350 * Enable the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. 6351 * The output 2 voltage (Vbuckrf) of the Buck regulator is typically used to 6352 * supply the BLE radio. 6353 * This function does following actions, when the Buck regulator does not 6354 * supply the core: 6355 * * Enables the Buck regulator 6356 * * Enables the output 2, but do not enables the output 1. 6357 * 6358 * \note The function does not affect Buck output 1 that typically supplies core. 6359 * 6360 * \warning The function does not select the Buck output 2 voltage and 6361 * does not set/clear the HW-controlled bit for Buck output 2. Call 6362 * Cy_SysPm_BuckSetVoltage2() or Cy_SysPm_BuckSetVoltage2HwControl() to 6363 * configure the Buck output 2. 6364 * 6365 * \warning The function works only on devices with the SIMO Buck regulator. 6366 * Refer to the device datasheet for information on whether the device contains 6367 * the SIMO Buck. 6368 * 6369 * \warning Buck converter requires additional external components populated on 6370 * dedicated pins. Refer to device datasheet for details. 6371 * 6372 * \funcusage 6373 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckEnableVoltage2 6374 * 6375 * \note 6376 * This API is available for CAT1A devices. 6377 * 6378 *******************************************************************************/ 6379 void Cy_SysPm_BuckEnableVoltage2(void); 6380 6381 6382 /******************************************************************************* 6383 * Function Name: Cy_SysPm_BuckIsOutputEnabled 6384 ****************************************************************************//** 6385 * 6386 * This function gets the current output status of the Buck outputs. 6387 * 6388 * \param output 6389 * The Buck regulator output. See \ref cy_en_syspm_buck_out_t. 6390 * 6391 * \return 6392 * - True if the requested output is enabled. 6393 * - False if the requested output is disabled. 6394 * 6395 * \funcusage 6396 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckIsOutputEnabled 6397 * 6398 * \note 6399 * This API is available for CAT1A devices. 6400 * 6401 *******************************************************************************/ 6402 bool Cy_SysPm_BuckIsOutputEnabled(cy_en_syspm_buck_out_t output); 6403 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) */ 6404 /** \} group_syspm_functions_buck */ 6405 6406 /** 6407 * \addtogroup group_syspm_functions_callback 6408 * \{ 6409 */ 6410 6411 6412 /******************************************************************************* 6413 * Function Name: Cy_SysPm_RegisterCallback 6414 ****************************************************************************//** 6415 * 6416 * Registers a new syspm callback. 6417 * 6418 * A callback is a function called after an event in the driver or 6419 * middleware module has occurred. The handler callback API will be executed if 6420 * the specific event occurs. SysPm callbacks are called when changing power 6421 * modes. See \ref cy_stc_syspm_callback_t. 6422 * 6423 * \note The registered callbacks are executed in two orders, based on callback 6424 * mode \ref cy_en_syspm_callback_mode_t. For modes CY_SYSPM_CHECK_READY and 6425 * CY_SYSPM_BEFORE_TRANSITION, the order is same order as callbacks were 6426 * registered. 6427 * For modes CY_SYSPM_AFTER_TRANSITION and CY_SYSPM_CHECK_FAIL, the order is 6428 * reverse as the order callbacks were registered. 6429 * 6430 * \param handler 6431 * The address of the syspm callback structure. 6432 * See \ref cy_stc_syspm_callback_t. 6433 * 6434 * \return 6435 * - True if a callback was registered. 6436 * - False if a callback was not registered. 6437 * 6438 * \note Do not modify the registered structure in run-time. 6439 * \warning After being registered, the SysPm callback structures must be 6440 * allocated during power mode transition. 6441 * 6442 * \funcusage 6443 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Declaration 6444 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Params_Declaration 6445 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Structure_Declaration 6446 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Implementation 6447 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 6448 * 6449 *******************************************************************************/ 6450 bool Cy_SysPm_RegisterCallback(cy_stc_syspm_callback_t *handler); 6451 6452 6453 /******************************************************************************* 6454 * Function Name: Cy_SysPm_UnregisterCallback 6455 ****************************************************************************//** 6456 * 6457 * This function unregisters a callback. 6458 * 6459 * The registered callback can be unregistered and the function returns true. 6460 * Otherwise, false is returned. 6461 * 6462 * \param handler The item that should be unregistered. 6463 * See \ref cy_stc_syspm_callback_t. 6464 * 6465 * \return 6466 * - True if callback was unregistered. 6467 * - False if it was not unregistered or no callbacks are registered. 6468 * 6469 * \funcusage 6470 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_UnregisterCallback 6471 * 6472 *******************************************************************************/ 6473 bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler); 6474 6475 6476 /******************************************************************************* 6477 * Function Name: Cy_SysPm_ExecuteCallback 6478 ****************************************************************************//** 6479 * 6480 * The function executes all registered callbacks with provided type and mode. 6481 * \note This low-level function is being used by \ref Cy_SysPm_CpuEnterSleep, 6482 * \ref Cy_SysPm_CpuEnterDeepSleep, \ref Cy_SysPm_SystemEnterHibernate, 6483 * \ref Cy_SysPm_SystemEnterUlp and \ref Cy_SysPm_SystemEnterLp API functions. 6484 * However, it might be also useful as an independent API function in some custom 6485 * applications. 6486 * 6487 * \note The registered callbacks will be executed in order based on 6488 * \ref cy_en_syspm_callback_type_t value. There are two possible callback 6489 * execution orders: 6490 * * From first registered to last registered. This order applies to 6491 * callbacks with mode CY_SYSPM_CHECK_READY and CY_SYSPM_BEFORE_TRANSITION. 6492 * * Backward flow execution: 6493 * - From last registered to the first registered. This order applies 6494 * to callbacks with mode CY_SYSPM_AFTER_TRANSITION. 6495 * - From last called to the first registered callback. This order applies 6496 * to callbacks with mode CY_SYSPM_CHECK_FAIL. Note that, the last called 6497 * callback function that generated the CY_SYSPM_CHECK_FAIL is skipped when 6498 * mode CY_SYSPM_CHECK_FAIL. This is because the callback that returns 6499 * CY_SYSPM_FAIL already knows that it failed and will not take any action 6500 * that requires correction. 6501 * 6502 * If no callbacks are registered, returns CY_SYSPM_SUCCESS. 6503 * 6504 * \param type 6505 * The callback type. See \ref cy_en_syspm_callback_type_t. 6506 * 6507 * \param mode 6508 * The callback mode. See \ref cy_en_syspm_callback_mode_t. 6509 * 6510 * \return 6511 * - CY_SYSPM_SUCCESS if callback successfully completed or nor callbacks 6512 * registered. 6513 * - CY_SYSPM_FAIL one of the executed callback(s) returned fail. 6514 * 6515 * \funcusage 6516 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ExecuteCallback 6517 * 6518 *******************************************************************************/ 6519 cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, cy_en_syspm_callback_mode_t mode); 6520 6521 6522 /******************************************************************************* 6523 * Function Name: Cy_SysPm_GetFailedCallback 6524 ****************************************************************************//** 6525 * 6526 * Reads the result of the callback execution after the power mode functions 6527 * execution. 6528 * 6529 * This function reads the value of the pointer that stores the result of callback 6530 * execution. It takes power mode as the parameter and returns the address of the 6531 * callback configuration structure in the case of failure or NULL in the case of 6532 * success. This address of the failed callback allows finding the callback that 6533 * blocks entering power mode. 6534 * 6535 * \param type 6536 * Power mode for which a callback execution result is required. 6537 * 6538 * \return 6539 * - The address of the callback configuration structure if the callback handler 6540 * function failed. 6541 * - NULL if the callback skipped or executed successfully. 6542 * 6543 * \funcusage 6544 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_GetFailedCallback 6545 * 6546 *******************************************************************************/ 6547 cy_stc_syspm_callback_t* Cy_SysPm_GetFailedCallback(cy_en_syspm_callback_type_t type); 6548 /** \} group_syspm_functions_callback */ 6549 6550 /** 6551 * \addtogroup group_syspm_functions_power_status 6552 * \{ 6553 */ 6554 6555 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 6556 6557 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 6558 6559 /******************************************************************************* 6560 * Function Name: Cy_SysPm_IsSystemUlp 6561 ****************************************************************************//** 6562 * 6563 * Checks if the system is in ULP mode. 6564 * 6565 * \return 6566 * - True the system is in ULP mode. 6567 * - False the system is is not ULP mode. 6568 * 6569 * \note 6570 * This API is available for CAT1A and CAT1D devices. 6571 * 6572 * \funcusage 6573 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemUlp 6574 * 6575 *******************************************************************************/ 6576 bool Cy_SysPm_IsSystemUlp(void); 6577 #endif 6578 6579 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 6580 6581 /******************************************************************************* 6582 * Function Name: Cy_SysPm_IsSystemLp 6583 ****************************************************************************//** 6584 * 6585 * Checks if the system is in LP mode. 6586 * 6587 * \return 6588 * - True the system is in LP mode. 6589 * - False the system is not in LP mode. 6590 * 6591 * \note 6592 * This API is available for CAT1A, CAT1C & CAT1D devices. 6593 * 6594 * \funcusage 6595 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemLp 6596 * 6597 *******************************************************************************/ 6598 bool Cy_SysPm_IsSystemLp(void); 6599 #endif 6600 6601 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 6602 /******************************************************************************* 6603 * Function Name: Cy_SysPm_IsSystemMf 6604 ****************************************************************************//** 6605 * 6606 * Checks if the system is in MF mode. 6607 * 6608 * \return 6609 * - True the system is in MF mode. 6610 * - False the system is not in MF mode. 6611 * 6612 * \note 6613 * This API is available for CAT1D devices only. 6614 * 6615 * \funcusage 6616 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemMf 6617 * 6618 *******************************************************************************/ 6619 bool Cy_SysPm_IsSystemMf(void); 6620 #endif 6621 6622 #endif 6623 6624 6625 #if defined (CY_IP_MXS40SRSS) || defined (CY_DOXYGEN) 6626 6627 #if (CY_IP_MXS40SRSS_VERSION < 3) || defined (CY_DOXYGEN) 6628 /******************************************************************************* 6629 * Function Name: Cy_SysPm_Cm4IsActive 6630 ****************************************************************************//** 6631 * 6632 * Checks if CM4 is in CPU Active mode. 6633 * 6634 * \return 6635 * - True if CM4 is in CPU Active mode. 6636 * - False if the CM4 is not in CPU Active mode. 6637 * 6638 * \note 6639 * This API is available for CAT1A devices. 6640 * 6641 * \funcusage 6642 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsActive 6643 * 6644 *******************************************************************************/ 6645 bool Cy_SysPm_Cm4IsActive(void); 6646 6647 6648 /******************************************************************************* 6649 * Function Name: Cy_SysPm_Cm4IsSleep 6650 ****************************************************************************//** 6651 * 6652 * Checks if the CM4 is in CPU Sleep mode. 6653 * 6654 * \return 6655 * - True if the CM4 is in CPU Sleep mode. 6656 * - False if the CM4 is not in CPU Sleep mode. 6657 * 6658 * \note 6659 * This API is available for CAT1A devices. 6660 * 6661 * \funcusage 6662 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsSleep 6663 * 6664 *******************************************************************************/ 6665 bool Cy_SysPm_Cm4IsSleep(void); 6666 6667 6668 /******************************************************************************* 6669 * Function Name: Cy_SysPm_Cm4IsDeepSleep 6670 ****************************************************************************//** 6671 * 6672 * Checks if the CM4 is in the CPU Deep Sleep mode. 6673 * 6674 * \return 6675 * - True if CM4 is in CPU Deep Sleep mode. 6676 * - False if the CM4 is not CPU in Deep Sleep mode. 6677 * 6678 * \note 6679 * This API is available for CAT1A devices. 6680 * 6681 * \funcusage 6682 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsDeepSleep 6683 * 6684 *******************************************************************************/ 6685 bool Cy_SysPm_Cm4IsDeepSleep(void); 6686 6687 #endif 6688 6689 /******************************************************************************* 6690 * Function Name: Cy_SysPm_Cm0IsActive 6691 ****************************************************************************//** 6692 * 6693 * Checks if the CM0+ is in CPU Active mode. 6694 * 6695 * \return 6696 * - True if the CM0+ is in CPU Active mode. 6697 * - False if the CM0+ is not in CPU Active mode. 6698 * 6699 * \note 6700 * This API is available for CAT1A & CAT1C devices. 6701 * 6702 * \funcusage 6703 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsActive 6704 * 6705 *******************************************************************************/ 6706 bool Cy_SysPm_Cm0IsActive(void); 6707 6708 6709 /******************************************************************************* 6710 * Function Name: Cy_SysPm_Cm0IsSleep 6711 ****************************************************************************//** 6712 * 6713 * Checks if the CM0+ is in CPU Sleep mode. 6714 * 6715 * \return 6716 * - True if the CM0+ is in CPU Sleep mode. 6717 * - False if the CM0+ is not in CPU Sleep mode. 6718 * 6719 * \note 6720 * This API is available for CAT1A & CAT1C devices. 6721 * 6722 * \funcusage 6723 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsSleep 6724 * 6725 *******************************************************************************/ 6726 bool Cy_SysPm_Cm0IsSleep(void); 6727 6728 6729 /******************************************************************************* 6730 * Function Name: Cy_SysPm_Cm0IsDeepSleep 6731 ****************************************************************************//** 6732 * 6733 * Checks if the CM0+ is in CPU Deep Sleep mode. 6734 * 6735 * \return 6736 * - True if the CM0+ is in CPU Deep Sleep mode 6737 * - False if the CM0+ is not in CPU Deep Sleep mode 6738 * 6739 * \note 6740 * This API is available for CAT1A & CAT1C devices. 6741 * 6742 * \funcusage 6743 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsDeepSleep 6744 * 6745 *******************************************************************************/ 6746 bool Cy_SysPm_Cm0IsDeepSleep(void); 6747 6748 #if (CY_IP_MXS40SRSS_VERSION >= 3) 6749 6750 /******************************************************************************* 6751 * Function Name: Cy_SysPm_Cm0IsLowPower 6752 ****************************************************************************//** 6753 * 6754 * Checks if the CM0+ is in the low power mode. 6755 * 6756 * \return 6757 * true - if the CM0+ is in the low power mode, 6758 * false - if the CM0+ is not in the low power mode. 6759 * 6760 * \note 6761 * This API is available for CAT1C devices. 6762 * 6763 * \note 6764 * This API is deprecated and will be removed in Future releases. 6765 * 6766 *******************************************************************************/ 6767 bool Cy_SysPm_Cm0IsLowPower(void); 6768 6769 6770 /******************************************************************************* 6771 * Function Name: Cy_SysPm_IsBgRefCtrl 6772 ****************************************************************************//** 6773 * 6774 * Get the power mode status of Bandgap Ref Circuits 6775 * 6776 * \return 6777 * true - Bandgap Ref Circuits power mode is enabled, 6778 * false - Bandgap Ref Circuits power mode is disabled. 6779 * 6780 * \note 6781 * This API is available for CAT1C devices. 6782 * 6783 *******************************************************************************/ 6784 bool Cy_SysPm_IsBgRefCtrl(void); 6785 6786 /******************************************************************************* 6787 * Function Name: Cy_SysPm_BgRefCtrl 6788 ****************************************************************************//** 6789 * 6790 * Enables/Disables powers mode of Bandgap Ref Circuits 6791 * 6792 * \param enable 6793 * true - to enable, false - to disable 6794 * 6795 * \note 6796 * This API is available for CAT1C devices. 6797 * 6798 *******************************************************************************/ 6799 void Cy_SysPm_BgRefCtrl(bool enable); 6800 6801 #endif 6802 6803 #endif 6804 6805 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 6806 /******************************************************************************* 6807 * Function Name: Cy_SysPm_Cm33IsActive 6808 ****************************************************************************//** 6809 * 6810 * Checks if CM33 is in the active mode. 6811 * 6812 * \note 6813 * This API is available for CAT1D devices. 6814 * 6815 * \return 6816 * true - if CM33 is in the active mode, false - if the CM33 is not in active mode. 6817 * 6818 *******************************************************************************/ 6819 bool Cy_SysPm_Cm33IsActive(void); 6820 6821 6822 /******************************************************************************* 6823 * Function Name: Cy_SysPm_Cm33IsSleep 6824 ****************************************************************************//** 6825 * 6826 * Checks if the CM33 is in the sleep mode. 6827 * 6828 * \note 6829 * This API is available for CAT1D devices. 6830 * 6831 * \return 6832 * true - if the CM33 is in the sleep mode, 6833 * false - if the CM33 is not in the sleep mode. 6834 * 6835 *******************************************************************************/ 6836 bool Cy_SysPm_Cm33IsSleep(void); 6837 6838 6839 /******************************************************************************* 6840 * Function Name: Cy_SysPm_Cm33IsDeepSleep 6841 ****************************************************************************//** 6842 * 6843 * Checks if the CM33 is in the deep sleep mode. 6844 * 6845 * \return 6846 * true - if CM33 is in the deep sleep mode, false - if the CM33 is not in 6847 * the deep sleep mode. 6848 * 6849 *******************************************************************************/ 6850 bool Cy_SysPm_Cm33IsDeepSleep(void); 6851 6852 /******************************************************************************* 6853 * Function Name: Cy_SysPm_Cm55IsActive 6854 ****************************************************************************//** 6855 * 6856 * Checks if CM55 is in the active mode. 6857 * 6858 * \note 6859 * This API is available for CAT1D devices. 6860 * 6861 * \return 6862 * true - if CM55 is in the active mode, false - if the CM55 is not in active mode. 6863 * 6864 *******************************************************************************/ 6865 bool Cy_SysPm_Cm55IsActive(void); 6866 6867 6868 /******************************************************************************* 6869 * Function Name: Cy_SysPm_Cm55IsSleep 6870 ****************************************************************************//** 6871 * 6872 * Checks if the CM55 is in the sleep mode. 6873 * 6874 * \note 6875 * This API is available for CAT1D devices. 6876 * 6877 * \return 6878 * true - if the CM55 is in the sleep mode, 6879 * false - if the CM55 is not in the sleep mode. 6880 * 6881 *******************************************************************************/ 6882 bool Cy_SysPm_Cm55IsSleep(void); 6883 6884 6885 /******************************************************************************* 6886 * Function Name: Cy_SysPm_Cm55IsDeepSleep 6887 ****************************************************************************//** 6888 * 6889 * Checks if the CM55 is in the deep sleep mode. 6890 * 6891 * \return 6892 * true - if CM55 is in the deep sleep mode, false - if the CM55 is not in 6893 * the deep sleep mode. 6894 * 6895 *******************************************************************************/ 6896 bool Cy_SysPm_Cm55IsDeepSleep(void); 6897 6898 #endif 6899 6900 6901 #if defined(CY_IP_M7CPUSS) || defined (CY_DOXYGEN) 6902 6903 /******************************************************************************* 6904 * Function Name: Cy_SysPm_Cm7IsActive 6905 ****************************************************************************//** 6906 * 6907 * Checks if CM7 is in the active mode. 6908 * 6909 * \param core 6910 * Selects the core, 0 for CM7_0, 1 for CM7_1 6911 * 6912 * \note 6913 * This API is available for CAT1C devices. 6914 * 6915 * \return 6916 * true - if CM7 is in the active mode, false - if the CM7 is not in active mode. 6917 * 6918 *******************************************************************************/ 6919 bool Cy_SysPm_Cm7IsActive(uint8_t core); 6920 6921 6922 /******************************************************************************* 6923 * Function Name: Cy_SysPm_Cm7IsSleep 6924 ****************************************************************************//** 6925 * 6926 * Checks if the CM7 is in the sleep mode. 6927 * 6928 * \param core 6929 * Selects the core, 0 for CM7_0, 1 for CM7_1 6930 * 6931 * \note 6932 * This API is available for CAT1C devices. 6933 * 6934 * \return 6935 * true - if the CM7 is in the sleep mode, 6936 * false - if the CM7 is not in the sleep mode. 6937 * 6938 *******************************************************************************/ 6939 bool Cy_SysPm_Cm7IsSleep(uint8_t core); 6940 6941 6942 /******************************************************************************* 6943 * Function Name: Cy_SysPm_Cm7IsDeepSleep 6944 ****************************************************************************//** 6945 * 6946 * Checks if the CM7 is in the deep sleep mode. 6947 * 6948 * \param core 6949 * Selects the core, 0 for CM7_0, 1 for CM7_1 6950 * 6951 * \return 6952 * true - if CM7 is in the deep sleep mode, false - if the CM7 is not in 6953 * the deep sleep mode. 6954 * 6955 *******************************************************************************/ 6956 bool Cy_SysPm_Cm7IsDeepSleep(uint8_t core); 6957 6958 6959 /******************************************************************************* 6960 * Function Name: Cy_SysPm_Cm7IsLowPower 6961 ****************************************************************************//** 6962 * 6963 * Checks if the CM7 is in the low power mode. 6964 * 6965 * \param core 6966 * Selects the core, 0 for CM7_0, 1 for CM7_1 6967 * 6968 * \note 6969 * This API is available for CAT1C devices. 6970 * 6971 * \note 6972 * This API is deprecated and will be removed in Future releases. 6973 * 6974 * \return 6975 * true - if the CM7 is in the low power mode, 6976 * false - if the CM7 is not in the low power mode. 6977 * 6978 *******************************************************************************/ 6979 bool Cy_SysPm_Cm7IsLowPower(uint8_t core); 6980 6981 6982 #endif 6983 /** \} group_syspm_functions_power_status */ 6984 6985 6986 /** 6987 * \addtogroup group_syspm_functions_power 6988 * \{ 6989 */ 6990 /******************************************************************************* 6991 * Function Name: Cy_SysPm_CpuSendWakeupEvent 6992 ****************************************************************************//** 6993 * 6994 * Sends the SEV (Send Event) ARM instruction to the system. 6995 * 6996 * \funcusage 6997 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuSendWakeupEvent 6998 * 6999 *******************************************************************************/ 7000 void Cy_SysPm_CpuSendWakeupEvent(void); 7001 7002 7003 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7004 /******************************************************************************* 7005 * Function Name: Cy_SysPm_SystemIsMinRegulatorCurrentSet 7006 ****************************************************************************//** 7007 * 7008 * Check whether the system regulator is set to minimal current mode. 7009 * 7010 * \return 7011 * - True - system is in regulator minimum current mode. 7012 * - False - system is in normal regulator current mode. 7013 * 7014 * \funcusage 7015 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetNormalRegulatorCurrent 7016 * 7017 *******************************************************************************/ 7018 bool Cy_SysPm_SystemIsMinRegulatorCurrentSet(void); 7019 #endif /* defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 7020 /** \} group_syspm_functions_power */ 7021 7022 7023 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_DOXYGEN) 7024 /** 7025 * \addtogroup group_syspm_functions_buck 7026 * \{ 7027 */ 7028 /******************************************************************************* 7029 * Function Name: Cy_SysPm_BuckIsEnabled 7030 ****************************************************************************//** 7031 * 7032 * Get the current status of the Buck regulator. 7033 * 7034 * \return 7035 * - True if the Buck regulator is enabled. 7036 * - False if it is disabled. 7037 * 7038 * \note 7039 * This API is available for CAT1A devices. 7040 * 7041 * \funcusage 7042 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7043 * 7044 *******************************************************************************/ 7045 bool Cy_SysPm_BuckIsEnabled(void); 7046 7047 7048 /******************************************************************************* 7049 * Function Name: Cy_SysPm_BuckGetVoltage1 7050 ****************************************************************************//** 7051 * 7052 * Gets the current nominal output 1 voltage (Vccbuck1) of 7053 * the Buck regulator. 7054 * 7055 * \note The actual device output 1 voltage (Vccbuck1) can be different from 7056 * the nominal voltage because the actual voltage value depends on conditions 7057 * including load current. 7058 * 7059 * \return 7060 * The nominal output voltage 1 (Vccbuck1) of the Buck regulator. 7061 * See \ref cy_en_syspm_buck_voltage1_t. 7062 * 7063 * \funcusage 7064 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7065 * 7066 * \note 7067 * This API is available for CAT1A devices. 7068 * 7069 * 7070 *******************************************************************************/ 7071 cy_en_syspm_buck_voltage1_t Cy_SysPm_BuckGetVoltage1(void); 7072 7073 /******************************************************************************* 7074 * Function Name: Cy_SysPm_BuckGetVoltage2 7075 ****************************************************************************//** 7076 * 7077 * Gets the current output 2 nominal voltage (Vbuckrf) of the SIMO 7078 * Buck regulator. 7079 * 7080 * \note The actual device output 2 voltage (Vbuckrf) can be different from the 7081 * nominal voltage because the actual voltage value depends on conditions 7082 * including load current. 7083 * 7084 * \return 7085 * The nominal output voltage of the Buck SIMO regulator output 2 7086 * voltage (Vbuckrf). See \ref cy_en_syspm_buck_voltage2_t. 7087 * 7088 * \note 7089 * Function returns zero for devices without a SIMO Buck regulator. 7090 * Refer to the device datasheet about information on whether device contains 7091 * a SIMO Buck. 7092 * 7093 * \note 7094 * This API is available for CAT1A devices. 7095 * 7096 * \funcusage 7097 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckGetVoltage2 7098 * 7099 *******************************************************************************/ 7100 cy_en_syspm_buck_voltage2_t Cy_SysPm_BuckGetVoltage2(void); 7101 7102 /******************************************************************************* 7103 * Function Name: Cy_SysPm_BuckDisableVoltage2 7104 ****************************************************************************//** 7105 * 7106 * Disables the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. The 7107 * output 2 voltage (Vbuckrf) of the Buck regulator is typically used to supply 7108 * the BLE radio. 7109 * 7110 * \note The function does not have effect, if the Buck regulator is 7111 * switched off. 7112 * 7113 * \note If you are switching the voltage supply source for BLE radio, ensure 7114 * that the new voltage supply for the BLE HW block is settled 7115 * and is stable before calling the Cy_SysPm_BuckDisableVoltage2() function. 7116 * 7117 * This function is applicable for devices with the SIMO Buck regulator. 7118 * Refer to the device datasheet for information about whether the device 7119 * contains a SIMO Buck. 7120 * 7121 * \note 7122 * This API is available for CAT1A devices. 7123 * 7124 * \funcusage 7125 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckDisableVoltage2 7126 * 7127 *******************************************************************************/ 7128 void Cy_SysPm_BuckDisableVoltage2(void); 7129 7130 /******************************************************************************* 7131 * Function Name: Cy_SysPm_BuckSetVoltage2HwControl 7132 ****************************************************************************//** 7133 * 7134 * Sets the hardware control for SIMO Buck output 2 (Vbuckrf). 7135 * 7136 * When hardware control is enabled for the Vbuckrf output, the firmware 7137 * controlled enable register setting is ignored and the hardware signal is used 7138 * instead. If the product has supporting hardware like BLE radio, it can 7139 * directly control the enable signal for Vbuckrf. 7140 * 7141 * \param hwControl 7142 * Enables/disables hardware control for the SIMO Buck output 2. 7143 * 7144 * Function does not have an effect if SIMO Buck regulator is disabled. 7145 * 7146 * The function is applicable for devices with the SIMO Buck regulator. 7147 * Refer to the device datasheet for information about whether the device 7148 * contains a SIMO Buck. 7149 * 7150 * \note 7151 * This API is available for CAT1A devices. 7152 * 7153 * \funcusage 7154 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckSetVoltage2HwControl 7155 * 7156 *******************************************************************************/ 7157 void Cy_SysPm_BuckSetVoltage2HwControl(bool hwControl); 7158 7159 /******************************************************************************* 7160 * Function Name: Cy_SysPm_BuckIsVoltage2HwControlled 7161 ****************************************************************************//** 7162 * 7163 * Returns the hardware control state for Buck output 2 (Vbuckrf). 7164 * 7165 * When hardware control is enabled for the Vbuckrf output, the firmware 7166 * controlled enable register setting is ignored and the hardware signal is used 7167 * instead. If the product has supporting hardware like BLE radio, it can 7168 * directly control the enable signal for Vbuckrf. 7169 * 7170 * \return 7171 * - True if HW control is set. 7172 * - False if FW control is set for the Buck output 2. 7173 * 7174 * The function is applicable for devices with the SIMO Buck regulator. 7175 * Refer to device datasheet about information if device contains 7176 * SIMO Buck. 7177 * 7178 * \note 7179 * This API is available for CAT1A devices. 7180 * 7181 * \funcusage 7182 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckIsVoltage2HwControlled 7183 * 7184 *******************************************************************************/ 7185 bool Cy_SysPm_BuckIsVoltage2HwControlled(void); 7186 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) */ 7187 7188 7189 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7190 7191 /******************************************************************************* 7192 * Function Name: Cy_SysPm_CoreBuckSetVoltage 7193 ****************************************************************************//** 7194 * 7195 * Set the Core Buck Regulator Voltage 7196 * 7197 * \param voltage 7198 * Pick from \ref cy_en_syspm_core_buck_voltage_t 7199 * 7200 * \return 7201 * see \ref cy_en_syspm_status_t. 7202 * 7203 * \note 7204 * This API is available for CAT1B and CAT1D devices. 7205 * 7206 *******************************************************************************/ 7207 cy_en_syspm_status_t Cy_SysPm_CoreBuckSetVoltage(cy_en_syspm_core_buck_voltage_t voltage); 7208 7209 /******************************************************************************* 7210 * Function Name: Cy_SysPm_CoreBuckGetVoltage 7211 ****************************************************************************//** 7212 * 7213 * Get the Core Buck Regulator Voltage 7214 * 7215 * \return 7216 * Gets enum value of type \ref cy_en_syspm_core_buck_voltage_t 7217 * 7218 * \note 7219 * This API is available for CAT1B and CAT1D devices. 7220 * 7221 *******************************************************************************/ 7222 cy_en_syspm_core_buck_voltage_t Cy_SysPm_CoreBuckGetVoltage(void); 7223 7224 /******************************************************************************* 7225 * Function Name: Cy_SysPm_CoreBuckSetMode 7226 ****************************************************************************//** 7227 * 7228 * Set the Core Buck Regulator mode 7229 * 7230 * \param mode 7231 * Pick from \ref cy_en_syspm_core_buck_mode_t 7232 * 7233 * \note 7234 * This API is available for CAT1B and CAT1D devices. 7235 * 7236 *******************************************************************************/ 7237 void Cy_SysPm_CoreBuckSetMode(cy_en_syspm_core_buck_mode_t mode); 7238 7239 /******************************************************************************* 7240 * Function Name: Cy_SysPm_CoreBuckGetMode 7241 ****************************************************************************//** 7242 * 7243 * Get the Core Buck Regulator Mode 7244 * 7245 * \return 7246 * Gets enum value of type \ref cy_en_syspm_core_buck_mode_t 7247 * 7248 * \note 7249 * This API is available for CAT1B and CAT1D devices. 7250 * 7251 *******************************************************************************/ 7252 cy_en_syspm_core_buck_mode_t Cy_SysPm_CoreBuckGetMode(void); 7253 7254 /******************************************************************************* 7255 * Function Name: Cy_SysPm_CoreBuckStatus 7256 ****************************************************************************//** 7257 * 7258 * Get the status of Core Buck Regulator 7259 * 7260 * \return 7261 * Gets enum value of type \ref cy_en_syspm_status_t 7262 * 7263 * \note 7264 * This API is available for CAT1B and CAT1D devices. 7265 * 7266 *******************************************************************************/ 7267 cy_en_syspm_status_t Cy_SysPm_CoreBuckStatus(void); 7268 7269 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7270 7271 /******************************************************************************* 7272 * Function Name: Cy_SysPm_CoreBuckDpslpSetVoltage 7273 ****************************************************************************//** 7274 * 7275 * Set the Deepsleep mode Core Buck Regulator Voltage 7276 * 7277 * \param voltage 7278 * Pick from \ref cy_en_syspm_core_buck_voltage_t 7279 * 7280 * \note 7281 * This API is available for CAT1D devices. 7282 * 7283 *******************************************************************************/ 7284 cy_en_syspm_status_t Cy_SysPm_CoreBuckDpslpSetVoltage(cy_en_syspm_core_buck_voltage_t voltage); 7285 7286 /******************************************************************************* 7287 * Function Name: Cy_SysPm_CoreBuckDpslpGetVoltage 7288 ****************************************************************************//** 7289 * 7290 * Get the Deepsleep Core Buck Regulator Voltage 7291 * 7292 * \return 7293 * Gets enum value of type \ref cy_en_syspm_core_buck_voltage_t 7294 * 7295 * \note 7296 * This API is available for CAT1D devices. 7297 * 7298 * \return 7299 * see \ref cy_en_syspm_status_t. 7300 * 7301 *******************************************************************************/ 7302 cy_en_syspm_core_buck_voltage_t Cy_SysPm_CoreBuckDpslpGetVoltage(void); 7303 7304 /******************************************************************************* 7305 * Function Name: Cy_SysPm_CoreBuckDpslpSetMode 7306 ****************************************************************************//** 7307 * 7308 * Set the Deepsleep Core Buck Regulator mode 7309 * 7310 * \param mode 7311 * Pick from \ref cy_en_syspm_core_buck_mode_t 7312 * 7313 * \note 7314 * This API is available for CAT1D devices. 7315 * 7316 *******************************************************************************/ 7317 void Cy_SysPm_CoreBuckDpslpSetMode(cy_en_syspm_core_buck_mode_t mode); 7318 7319 /******************************************************************************* 7320 * Function Name: Cy_SysPm_CoreBuckDpslpGetMode 7321 ****************************************************************************//** 7322 * 7323 * Get the Deepsleep Core Buck Regulator Mode 7324 * 7325 * \return 7326 * Gets enum value of type \ref cy_en_syspm_core_buck_mode_t 7327 * 7328 * \note 7329 * This API is available for CAT1D devices. 7330 * 7331 *******************************************************************************/ 7332 cy_en_syspm_core_buck_mode_t Cy_SysPm_CoreBuckDpslpGetMode(void); 7333 7334 7335 /******************************************************************************* 7336 * Function Name: Cy_SysPm_CoreBuckDpslpEnableOverride 7337 ****************************************************************************//** 7338 * 7339 * Enable the Override feature for core buck during Deepsleep 7340 * 7341 * \param enable 7342 * true - enable, false - disable 7343 * 7344 * \note 7345 * This function is available for CAT1D devices. 7346 * 7347 *******************************************************************************/ 7348 void Cy_SysPm_CoreBuckDpslpEnableOverride(bool enable); 7349 7350 /******************************************************************************* 7351 * Function Name: Cy_SysPm_CoreBuckDpslpIsOverrideEnabled 7352 ****************************************************************************//** 7353 * 7354 * Checks if Override feature of core buck during deepsleep is enabled or not. 7355 * 7356 * \return 7357 * True if enabled, False if disabled. 7358 * 7359 * \note 7360 * This function is available for CAT1D devices. 7361 * 7362 *******************************************************************************/ 7363 bool Cy_SysPm_CoreBuckDpslpIsOverrideEnabled(void); 7364 7365 /******************************************************************************* 7366 * Function Name: Cy_SysPm_CoreBuckSetProfile 7367 ****************************************************************************//** 7368 * 7369 * Set the Core Buck Regulator Profile 7370 * 7371 * \param profile 7372 * Pick from \ref cy_en_syspm_core_buck_profile_t 7373 * 7374 * \note 7375 * This API is available for CAT1D devices. 7376 * 7377 *******************************************************************************/ 7378 void Cy_SysPm_CoreBuckSetProfile(cy_en_syspm_core_buck_profile_t profile); 7379 7380 /******************************************************************************* 7381 * Function Name: Cy_SysPm_CoreBuckGetProfile 7382 ****************************************************************************//** 7383 * 7384 * Get the Core Buck Regulator Profile 7385 * 7386 * \return 7387 * Gets enum value of type \ref cy_en_syspm_core_buck_profile_t 7388 * 7389 * \note 7390 * This API is available for CAT1D devices. 7391 * 7392 *******************************************************************************/ 7393 cy_en_syspm_core_buck_profile_t Cy_SysPm_CoreBuckGetProfile(void); 7394 7395 /******************************************************************************* 7396 * Function Name: Cy_SysPm_RetLdoStatus 7397 ****************************************************************************//** 7398 * 7399 * Get the status of RETLDO Regulator 7400 * 7401 * \return 7402 * Gets enum value of type \ref cy_en_syspm_status_t 7403 * 7404 * \note 7405 * This API is available for CAT1D devices. 7406 * 7407 *******************************************************************************/ 7408 cy_en_syspm_status_t Cy_SysPm_RetLdoStatus(void); 7409 7410 /******************************************************************************* 7411 * Function Name: Cy_SysPm_RetLdoConfigure 7412 ****************************************************************************//** 7413 * 7414 * Configures the RETLDO Regulator 7415 * 7416 * \param retLdoParam 7417 * Structure containing the config parameters, \ref cy_stc_syspm_retldo_params_t 7418 * 7419 * \note 7420 * This API is available for CAT1D devices. 7421 * 7422 * \return 7423 * see \ref cy_en_syspm_status_t. 7424 * 7425 *******************************************************************************/ 7426 cy_en_syspm_status_t Cy_SysPm_RetLdoConfigure(cy_stc_syspm_retldo_params_t *retLdoParam); 7427 7428 /******************************************************************************* 7429 * Function Name: Cy_SysPm_SramLdoStatus 7430 ****************************************************************************//** 7431 * 7432 * Get the status of SRAMLDO Regulator 7433 * 7434 * \return 7435 * Gets enum value of type \ref cy_en_syspm_status_t 7436 * 7437 * \note 7438 * This API is available for CAT1D devices. 7439 * 7440 *******************************************************************************/ 7441 cy_en_syspm_status_t Cy_SysPm_SramLdoStatus(void); 7442 7443 /******************************************************************************* 7444 * Function Name: Cy_SysPm_SramLdoConfigure 7445 ****************************************************************************//** 7446 * 7447 * Configures the SRAMLDO Regulator 7448 * 7449 * \param sramLdoParam 7450 * Structure containing the config parameters, \ref cy_stc_syspm_sramldo_params_t 7451 * 7452 * \note 7453 * This API is available for CAT1D devices. 7454 * 7455 * \return 7456 * see \ref cy_en_syspm_status_t. 7457 * 7458 *******************************************************************************/ 7459 cy_en_syspm_status_t Cy_SysPm_SramLdoConfigure(cy_stc_syspm_sramldo_params_t *sramLdoParam); 7460 7461 /******************************************************************************* 7462 * Function Name: Cy_SysPm_SramLdoEnable 7463 ****************************************************************************//** 7464 * 7465 * Enable/Disable SRAMLDO Regulator 7466 * 7467 * \param enable 7468 * true - enable, false - disable 7469 * 7470 * \note 7471 * This API is available for CAT1D devices. 7472 * 7473 *******************************************************************************/ 7474 void Cy_SysPm_SramLdoEnable(bool enable); 7475 7476 /******************************************************************************* 7477 * Function Name: Cy_SysPm_SramLdoSetVoltage 7478 ****************************************************************************//** 7479 * 7480 * Set SRAM LDO Voltage 7481 * 7482 * \param voltage 7483 * Enum \ref cy_en_syspm_sramldo_voltage_t 7484 * 7485 * \note 7486 * This API is available for CAT1D devices. 7487 * 7488 * \return 7489 * see \ref cy_en_syspm_status_t. 7490 * 7491 *******************************************************************************/ 7492 cy_en_syspm_status_t Cy_SysPm_SramLdoSetVoltage(cy_en_syspm_sramldo_voltage_t voltage); 7493 7494 /******************************************************************************* 7495 * Function Name: Cy_SysPm_SramLdoGetVoltage 7496 ****************************************************************************//** 7497 * 7498 * Get the SRAM LDO Voltage 7499 * 7500 * \return 7501 * Gets enum value of type \ref cy_en_syspm_sramldo_voltage_t 7502 * 7503 * \note 7504 * This API is available for CAT1D devices. 7505 * 7506 *******************************************************************************/ 7507 cy_en_syspm_sramldo_voltage_t Cy_SysPm_SramLdoGetVoltage(void); 7508 7509 /******************************************************************************* 7510 * Function Name: Cy_SysPm_MiscLdoStatus 7511 ****************************************************************************//** 7512 * 7513 * Get the status of MISCLDO Regulator 7514 * 7515 * \return 7516 * Gets enum value of type \ref cy_en_syspm_status_t 7517 * 7518 * \note 7519 * This API is available for CAT1D devices. 7520 * 7521 *******************************************************************************/ 7522 cy_en_syspm_status_t Cy_SysPm_MiscLdoStatus(void); 7523 7524 /******************************************************************************* 7525 * Function Name: Cy_SysPm_MiscLdoConfigure 7526 ****************************************************************************//** 7527 * 7528 * Configures the MISCLDO Regulator 7529 * 7530 * \param miscLdoParam 7531 * Structure containing the config parameters, \ref cy_stc_syspm_miscldo_params_t 7532 * 7533 * \note 7534 * This API is available for CAT1D devices. 7535 * 7536 * \return 7537 * see \ref cy_en_syspm_status_t. 7538 * 7539 *******************************************************************************/ 7540 cy_en_syspm_status_t Cy_SysPm_MiscLdoConfigure(cy_stc_syspm_miscldo_params_t *miscLdoParam); 7541 7542 7543 7544 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 7545 7546 7547 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 7548 7549 /******************************************************************************* 7550 * Function Name: Cy_SysPm_CoreBuckSetInrushLimit 7551 ****************************************************************************//** 7552 * 7553 * Set the Core Buck Inrush Limit 7554 * 7555 * \param inrushLimit 7556 * Pick from \ref cy_en_syspm_core_inrush_limit_t 7557 * 7558 * \note 7559 * This API is available for CAT1B devices. 7560 * 7561 *******************************************************************************/ 7562 void Cy_SysPm_CoreBuckSetInrushLimit(cy_en_syspm_core_inrush_limit_t inrushLimit); 7563 7564 7565 /******************************************************************************* 7566 * Function Name: Cy_SysPm_CoreBuckGetInrushLimit 7567 ****************************************************************************//** 7568 * 7569 * Get the Core Buck Inrush Limit 7570 * 7571 * \return 7572 * Gets enum value of type \ref cy_en_syspm_core_inrush_limit_t 7573 * 7574 * \note 7575 * This API is available for CAT1B devices. 7576 * 7577 *******************************************************************************/ 7578 cy_en_syspm_core_inrush_limit_t Cy_SysPm_CoreBuckGetInrushLimit(void); 7579 7580 7581 /******************************************************************************* 7582 * Function Name: Cy_SysPm_CoreBuckConfig 7583 ****************************************************************************//** 7584 * 7585 * Configures the Core Buck Regulator 7586 * 7587 * \note 7588 * Core buck voltage and mode are selected based on a voting system by the 7589 * following 5 requesters 7590 * Deepsleep Requester, SDR0 DS Requester, SDR0 Requester, SDR1 Requester and 7591 * Extra Requester. 7592 * The requesters may all request different voltages and CBUCK modes. 7593 * When multiple requesters are used for a profile, the requests are harmonized 7594 * into a composite request according to rules: 7595 * - The composite CBUCK voltage request is the maximum voltage from all 7596 * enabled requesters. 7597 * - The composite CBUCK mode is the maximum setting among all enabled requesters 7598 * to get the highest mode. 7599 * 7600 * For information about the CBUCK control, refer to the appropriate device TRM. 7601 * 7602 * \param config 7603 * Structure containing the config parameters, \ref cy_stc_syspm_core_buck_params_t 7604 * 7605 * \note 7606 * This API is available for CAT1B devices. 7607 * 7608 * \return 7609 * see \ref cy_en_syspm_status_t. 7610 * 7611 *******************************************************************************/ 7612 cy_en_syspm_status_t Cy_SysPm_CoreBuckConfig(cy_stc_syspm_core_buck_params_t *config); 7613 7614 /******************************************************************************* 7615 * Function Name: Cy_SysPm_LdoExtraRequesterConfig 7616 ****************************************************************************//** 7617 * 7618 * Configures the Extra Requester for Core Buck Regulator 7619 * 7620 * \note 7621 * The extra requester caters to two special cases: 7622 * - To temporarily force the system to choose a scratch profile with the 7623 * settings defined by the extra requester. This allows other requester 7624 * settings to be changed without changing the internal setting of an active 7625 * profile. This can be used to change the target voltage of an enabled 7626 * stepdown regulator. 7627 * - To participate in requester harmonization as an extra requester. 7628 * This can be used to restrict the composite settings higher than the 7629 * hardware would normally choose according to the harmonization rules. 7630 * 7631 * For information about the CBUCK control, refer to the appropriate device TRM. 7632 * 7633 * \param extraReqConfig 7634 * Pointer to structure containing the extra requester config parameters, 7635 * \ref cy_stc_syspm_extraReq_params_t 7636 * 7637 * \note 7638 * This API is available for CAT1B devices. 7639 * 7640 * \return 7641 * see \ref cy_en_syspm_status_t. 7642 * 7643 *******************************************************************************/ 7644 cy_en_syspm_status_t Cy_SysPm_LdoExtraRequesterConfig(cy_stc_syspm_extraReq_params_t *extraReqConfig); 7645 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 7646 7647 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 7648 /** \} group_syspm_functions_buck */ 7649 7650 7651 /** 7652 * \addtogroup group_syspm_functions_ldo 7653 * \{ 7654 */ 7655 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) 7656 7657 /******************************************************************************* 7658 * Function Name: Cy_SysPm_LdoGetVoltage 7659 ****************************************************************************//** 7660 * 7661 * Gets the current output voltage value of the core LDO regulator. 7662 * 7663 * \note The actual device Vccd voltage can be different from the 7664 * nominal voltage because the actual voltage value depends on conditions 7665 * including the load current. 7666 * 7667 * \return 7668 * The nominal output voltage of the LDO. See \ref cy_en_syspm_ldo_voltage_t. 7669 * 7670 * \funcusage 7671 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7672 * 7673 * \note 7674 * This API is available for CAT1A devices. 7675 * 7676 *******************************************************************************/ 7677 cy_en_syspm_ldo_voltage_t Cy_SysPm_LdoGetVoltage(void); 7678 7679 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) */ 7680 7681 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3) || defined (CY_DOXYGEN) 7682 7683 /******************************************************************************* 7684 * Function Name: Cy_SysPm_LdoIsEnabled 7685 ****************************************************************************//** 7686 * 7687 * Reads the current status of the core LDO regulator. 7688 * 7689 * \return 7690 * - True means the LDO is enabled. 7691 * - False means it is disabled. 7692 * 7693 * \funcusage 7694 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7695 * 7696 *******************************************************************************/ 7697 bool Cy_SysPm_LdoIsEnabled(void); 7698 7699 #endif 7700 7701 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 7702 /******************************************************************************* 7703 * Function Name: Cy_SysPm_SdrConfigure 7704 ****************************************************************************//** 7705 * 7706 * Configures the SDR(Step Down Regulator) 7707 * 7708 * \note 7709 * The CBUCK voltage selection must be 60mV higher than the SDR output or the 7710 * regulator output may bypass. 7711 * 7712 * \param sdr 7713 * CY_SYSPM_SDR_0 - for SDR0 7714 * CY_SYSPM_SDR_1 - for SDR1 7715 * 7716 * \param config 7717 * Structure containing the config parameters, \ref cy_stc_syspm_sdr_params_t 7718 * 7719 * \note 7720 * Maintain below conditions when switching th voltages 7721 * High to Low voltage --> Set TRIM's first , Set Voltage next 7722 * Low to High voltage --> Set Voltage first , Set TRIM's next 7723 * 7724 * \note 7725 * This API is available for CAT1B devices. 7726 * 7727 *******************************************************************************/ 7728 void Cy_SysPm_SdrConfigure(cy_en_syspm_sdr_t sdr, cy_stc_syspm_sdr_params_t *config); 7729 7730 /******************************************************************************* 7731 * Function Name: Cy_SysPm_SdrSetVoltage 7732 ****************************************************************************//** 7733 * 7734 * Set the SDR(Step Down Regulator) Voltage 7735 * 7736 * \note 7737 * The CBUCK voltage selection must be 60mV higher than the SDR output or the 7738 * regulator output may bypass. 7739 * 7740 * \param sdr 7741 * CY_SYSPM_SDR_0 - for SDR0 7742 * CY_SYSPM_SDR_1 - for SDR1 7743 * 7744 * \param voltage 7745 * Pick from \ref cy_en_syspm_sdr_voltage_t 7746 * 7747 * \note 7748 * Maintain below conditions when switching th voltages 7749 * High to Low voltage --> Set TRIM's first , Set Voltage next 7750 * Low to High voltage --> Set Voltage first , Set TRIM's next 7751 * 7752 * \note 7753 * This API is available for CAT1B devices. 7754 * 7755 *******************************************************************************/ 7756 void Cy_SysPm_SdrSetVoltage(cy_en_syspm_sdr_t sdr, cy_en_syspm_sdr_voltage_t voltage); 7757 7758 7759 /******************************************************************************* 7760 * Function Name: Cy_SysPm_SdrGetVoltage 7761 ****************************************************************************//** 7762 * 7763 * Get the SDR(Step Down Regulator) Voltage 7764 * 7765 * \param sdr 7766 * CY_SYSPM_SDR_0 - for SDR0 7767 * CY_SYSPM_SDR_1 - for SDR1 7768 * 7769 * \return 7770 * Gets Voltage enum value of type \ref cy_en_syspm_sdr_t 7771 * 7772 * \note 7773 * This API is available for CAT1B devices. 7774 * 7775 *******************************************************************************/ 7776 cy_en_syspm_sdr_voltage_t Cy_SysPm_SdrGetVoltage(cy_en_syspm_sdr_t sdr); 7777 7778 /******************************************************************************* 7779 * Function Name: Cy_SysPm_SdrEnable 7780 ****************************************************************************//** 7781 * 7782 * Enable the SDR(Step Down Regulator) 7783 * 7784 * \note 7785 * Applicable for only SDR1, whereas SDR0 is always enabled. 7786 * 7787 * \param sdr 7788 * CY_SYSPM_SDR_0 - for SDR0 7789 * CY_SYSPM_SDR_1 - for SDR1 7790 * 7791 * \param enable 7792 * true - enable, false - disable 7793 * 7794 * \note 7795 * This function is available for CAT1B devices. 7796 * 7797 *******************************************************************************/ 7798 void Cy_SysPm_SdrEnable(cy_en_syspm_sdr_t sdr, bool enable); 7799 7800 /******************************************************************************* 7801 * Function Name: Cy_SysPm_IsSdrEnabled 7802 ****************************************************************************//** 7803 * 7804 * Checks if SDR(Step Down Regulator) is enabled or not. 7805 * 7806 * \param sdr 7807 * CY_SYSPM_SDR_0 - for SDR0 7808 * CY_SYSPM_SDR_1 - for SDR1 7809 * 7810 * \return 7811 * True if enabled, False if disabled. 7812 * 7813 * \note 7814 * This function is available for CAT1B devices. 7815 * 7816 *******************************************************************************/ 7817 bool Cy_SysPm_IsSdrEnabled(cy_en_syspm_sdr_t sdr); 7818 7819 /******************************************************************************* 7820 * Function Name: Cy_SysPm_HvLdoConfigure 7821 ****************************************************************************//** 7822 * 7823 * Configures the HVLDO Regulator 7824 * 7825 * \param config 7826 * Structure containing the config parameters, \ref cy_stc_syspm_hvldo_params_t 7827 * 7828 * \note 7829 * This function is available for CAT1B devices. 7830 * 7831 *******************************************************************************/ 7832 void Cy_SysPm_HvLdoConfigure(cy_stc_syspm_hvldo_params_t *config); 7833 7834 /******************************************************************************* 7835 * Function Name: Cy_SysPm_HvLdoSetVoltage 7836 ****************************************************************************//** 7837 * 7838 * Set the HVLDO Regulator Voltage 7839 * 7840 * \param voltage 7841 * Pick from \ref cy_en_syspm_hvldo_voltage_t 7842 * 7843 * \note 7844 * This function is available for CAT1B devices. 7845 * 7846 *******************************************************************************/ 7847 void Cy_SysPm_HvLdoSetVoltage(cy_en_syspm_hvldo_voltage_t voltage); 7848 7849 /******************************************************************************* 7850 * Function Name: Cy_SysPm_HvLdoGetVoltage 7851 ****************************************************************************//** 7852 * 7853 * Get the HVLDO Regulator Voltage 7854 * 7855 * \return 7856 * Gets Voltage enum value of type \ref cy_en_syspm_hvldo_voltage_t 7857 * 7858 * \note 7859 * This function is available for CAT1B devices. 7860 * 7861 *******************************************************************************/ 7862 cy_en_syspm_hvldo_voltage_t Cy_SysPm_HvLdoGetVoltage(void); 7863 7864 /******************************************************************************* 7865 * Function Name: Cy_SysPm_HvLdoEnable 7866 ****************************************************************************//** 7867 * 7868 * Enable the HVLDO Regulator 7869 * 7870 * \param enable 7871 * true - enable, false - disable 7872 * 7873 * \note 7874 * This parameter is available for CAT1B devices. 7875 * 7876 *******************************************************************************/ 7877 void Cy_SysPm_HvLdoEnable(bool enable); 7878 7879 /******************************************************************************* 7880 * Function Name: Cy_SysPm_IsHvLdoEnabled 7881 ****************************************************************************//** 7882 * 7883 * Checks if HVLDO Regulator is enabled or not. 7884 * 7885 * \return 7886 * True if enabled, False if disabled. 7887 * 7888 * \note 7889 * This parameter is available for CAT1B devices. 7890 * 7891 *******************************************************************************/ 7892 bool Cy_SysPm_IsHvLdoEnabled(void); 7893 7894 #endif 7895 /** \} group_syspm_functions_ldo */ 7896 7897 7898 /** 7899 * \addtogroup group_syspm_functions_iofreeze 7900 * \{ 7901 */ 7902 /******************************************************************************* 7903 * Function Name: Cy_SysPm_IoIsFrozen 7904 ****************************************************************************//** 7905 * 7906 * Checks whether IOs are frozen. 7907 * 7908 * \return 7909 * - True if IOs are frozen. 7910 * - False if IOs are unfrozen. 7911 * 7912 * \funcusage 7913 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IoUnfreeze 7914 * 7915 *******************************************************************************/ 7916 bool Cy_SysPm_IoIsFrozen(void); 7917 7918 /******************************************************************************* 7919 * Function Name: Cy_SysPm_IoUnfreeze 7920 ****************************************************************************//** 7921 * 7922 * This function unfreezes the I/O cells that are automatically frozen when 7923 * Hibernate is entered with the call to \ref Cy_SysPm_SystemEnterHibernate(). 7924 * 7925 * I/O cells remain frozen after a wakeup from Hibernate mode until the 7926 * firmware unfreezes them by calling this function. 7927 * 7928 * If the firmware must retain the data value on the pin, then the 7929 * value must be read and re-written to the pin's port data register before 7930 * calling this function. Furthermore, the drive mode must be re-programmed 7931 * before the pins are unfrozen. If this is not done, the pin will change to 7932 * the default state the moment the freeze is removed. 7933 * 7934 * Note that I/O cell configuration can be changed while frozen. The new 7935 * configuration becomes effective only after the pins are unfrozen. 7936 * 7937 * \funcusage 7938 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IoUnfreeze 7939 * 7940 *******************************************************************************/ 7941 void Cy_SysPm_IoUnfreeze(void); 7942 7943 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) 7944 /******************************************************************************* 7945 * Function Name: Cy_SysPm_IoFreeze 7946 ****************************************************************************//** 7947 * 7948 * Freezes IOs. 7949 * 7950 * Freezes the IO cells directly to save the IO-cell state on a wakeup from the 7951 * Hibernate. Do not call this function before entering the 7952 * Hibernate mode, because Cy_SysPm_Hibernate() function freezes the IO cells. 7953 * 7954 * \note 7955 * This function is available for CAT1C devices. 7956 * 7957 ******************************************************************************/ 7958 void Cy_SysPm_IoFreeze(void); 7959 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) */ 7960 7961 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7962 7963 /******************************************************************************* 7964 * Function Name: Cy_SysPm_DeepSleepIoIsFrozen 7965 ****************************************************************************//** 7966 * 7967 * Checks whether IOs are frozen during DEEPSLEEP-RAM/OFF 7968 * 7969 * \return 7970 * - True if IOs are frozen. 7971 * - False if IOs are unfrozen. 7972 * 7973 * \note 7974 * This function is available for CAT1B and CAT1D devices. 7975 * 7976 *******************************************************************************/ 7977 bool Cy_SysPm_DeepSleepIoIsFrozen(void); 7978 7979 /******************************************************************************* 7980 * Function Name: Cy_SysPm_DeepSleepIoUnfreeze 7981 ****************************************************************************//** 7982 * 7983 * This function unfreezes the I/O cells that are automatically frozen when 7984 * DEEPSLEEP-RAM/OFF is entered. 7985 * 7986 * I/O cells remain frozen after a wakeup from DEEPSLEEP_RAM/OFF mode until the 7987 * firmware unfreezes them by calling this function. 7988 * 7989 * If the firmware must retain the data value on the pin, then the 7990 * value must be read and re-written to the pin's port data register before 7991 * calling this function. Furthermore, the drive mode must be re-programmed 7992 * before the pins are unfrozen. If this is not done, the pin will change to 7993 * the default state the moment the freeze is removed. 7994 * 7995 * Note that I/O cell configuration can be changed while frozen. The new 7996 * configuration becomes effective only after the pins are unfrozen. 7997 * 7998 * \note 7999 * This function is available for CAT1B and CAT1D devices. 8000 * 8001 *******************************************************************************/ 8002 void Cy_SysPm_DeepSleepIoUnfreeze(void); 8003 8004 #endif 8005 8006 /** \} group_syspm_functions_iofreeze */ 8007 8008 8009 8010 /** 8011 * \addtogroup group_syspm_functions_pmic 8012 * \{ 8013 */ 8014 8015 #if defined (CY_IP_MXS40SRSS) 8016 8017 /******************************************************************************* 8018 * Function Name: Cy_SysPm_PmicEnable 8019 ****************************************************************************//** 8020 * 8021 * Enable the external PMIC controller that supplies Vddd (if present). 8022 * 8023 * For information about the PMIC controller input and output pins and their 8024 * assignment in specific devices, refer to the appropriate device TRM. 8025 * 8026 * This function is not effective when the PMIC controller is locked. Call 8027 * Cy_SysPm_PmicUnlock() before enabling the PMIC. 8028 * 8029 * \funcusage 8030 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnable 8031 * 8032 * \note 8033 * This API is available for CAT1A & CAT1C devices. 8034 * 8035 *******************************************************************************/ 8036 void Cy_SysPm_PmicEnable(void); 8037 8038 8039 /******************************************************************************* 8040 * Function Name: Cy_SysPm_PmicDisable 8041 ****************************************************************************//** 8042 * 8043 * Disable the external PMIC controller that supplies Vddd (if present). 8044 * This function does not affect the PMIC controller output pin. The PMIC 8045 * controller input pin has programmable polarity to 8046 * enable the external PMIC using different input polarities. The PMIC controller 8047 * is automatically enabled when the input pin polarity and configured polarity 8048 * match. This function is not effective when the active level of PMIC controller 8049 * input pin is equal to the configured PMIC controller polarity. 8050 * 8051 * The function is not effective when the PMIC controller is locked. Call 8052 * Cy_SysPm_PmicUnlock() before enabling the PMIC controller. 8053 * 8054 * \param polarity 8055 * Configures the PMIC controller wakeup input pin to be active low or active 8056 * high. The PMIC will be automatically enabled when the set polarity and the 8057 * active level of PMIC input pin match. 8058 * See \ref cy_en_syspm_pmic_wakeup_polarity_t. 8059 * 8060 * The PMIC controller will be enabled automatically by any of RTC alarm or 8061 * PMIC wakeup events, regardless of the PMIC controller lock state. 8062 * 8063 * \note 8064 * Before disabling the PMIC controller, ensure that PMIC input and PMIC output 8065 * pins are configured correctly to enable expected PMIC operation. 8066 * 8067 * \warning 8068 * The PMIC is enabled automatically when you call Cy_SysPm_PmicLock(). 8069 * To keep the external PMIC disabled, the PMIC controller must remain unlocked. 8070 * 8071 * \warning 8072 * Do not call Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW) because this 8073 * is not supported by hardware. 8074 * 8075 * For information about the PMIC controller input and output pins and their 8076 * assignment in the specific devices, refer to the appropriate 8077 * device TRM. 8078 * 8079 * \funcusage 8080 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisable 8081 * 8082 * \note 8083 * This API is available for CAT1A & CAT1C devices. 8084 * 8085 *******************************************************************************/ 8086 void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t polarity); 8087 8088 8089 /******************************************************************************* 8090 * Function Name: Cy_SysPm_PmicAlwaysEnable 8091 ****************************************************************************//** 8092 * 8093 * Enable the external PMIC controller that supplies Vddd (if present) and force 8094 * active. This is a Write once API. It ensures that the PMIC controller cannot 8095 * be disabled or polarity changed until a next device reset. 8096 * 8097 * For information about the PMIC controller input and output pins and their 8098 * assignment in the specific devices, refer to the appropriate device TRM. 8099 * 8100 * \funcusage 8101 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicAlwaysEnable 8102 * 8103 * \note 8104 * This API is available for CAT1A & CAT1C devices. 8105 * 8106 *******************************************************************************/ 8107 void Cy_SysPm_PmicAlwaysEnable(void); 8108 8109 8110 /******************************************************************************* 8111 * Function Name: Cy_SysPm_PmicEnableOutput 8112 ****************************************************************************//** 8113 * 8114 * Enables the PMIC controller output pin. 8115 * 8116 * The function is not effective when the PMIC controller is locked. Call 8117 * Cy_SysPm_PmicUnlock() before enabling the PMIC controller. 8118 * 8119 * For information about the PMIC controller output pin and its assignment in 8120 * specific devices, refer to the appropriate device TRM. 8121 * 8122 * \funcusage 8123 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnableOutput 8124 * 8125 * \note 8126 * This API is available for CAT1A & CAT1C devices. 8127 * 8128 *******************************************************************************/ 8129 void Cy_SysPm_PmicEnableOutput(void); 8130 8131 8132 /******************************************************************************* 8133 * Function Name: Cy_SysPm_PmicDisableOutput 8134 ****************************************************************************//** 8135 * 8136 * Disables the PMIC controller output pin. 8137 * 8138 * When the PMIC controller output pin is disabled and is unlocked, the PMIC 8139 * controller output pin can be used for the another purpose. 8140 * 8141 * The function has no effect when the PMIC is locked. Call 8142 * Cy_SysPm_PmicUnlock() before enabling the PMIC. 8143 * 8144 * For information about the PMIC controller output pin and its assignment in 8145 * specific devices, refer to the appropriate device TRM. 8146 * 8147 * \note 8148 * After the PMIC controller output is disabled, the PMIC output pin returns to 8149 * its GPIO configured state. 8150 * 8151 * \warning 8152 * The PMIC controller output is enabled automatically when you call 8153 * Cy_SysPm_PmicLock(). To keep the PMIC controller output disabled, the PMIC 8154 * controller must remain unlocked. 8155 * 8156 * \funcusage 8157 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisableOutput 8158 * 8159 * \note 8160 * This API is available for CAT1A & CAT1C devices. 8161 * 8162 *******************************************************************************/ 8163 void Cy_SysPm_PmicDisableOutput(void); 8164 8165 8166 /******************************************************************************* 8167 * Function Name: Cy_SysPm_PmicLock 8168 ****************************************************************************//** 8169 * 8170 * Locks the PMIC control controller register so that no changes can be made. 8171 * The changes are related to PMIC enabling/disabling and PMIC output pin 8172 * enabling/disabling. 8173 * 8174 * \warning 8175 * The PMIC controller and/or the PMIC output are enabled automatically when 8176 * you call Cy_SysPm_PmicLock(). To keep the PMIC or PMIC controller output 8177 * disabled, the PMIC controller must remain unlocked. 8178 * 8179 * \funcusage 8180 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8181 * 8182 * \note 8183 * This API is available for CAT1A & CAT1C devices. 8184 * 8185 *******************************************************************************/ 8186 void Cy_SysPm_PmicLock(void); 8187 8188 8189 /******************************************************************************* 8190 * Function Name: Cy_SysPm_PmicUnlock 8191 ****************************************************************************//** 8192 * 8193 * Unlocks the PMIC control register so that changes can be made. The changes are 8194 * related to the PMIC controller enabling/disabling and PMIC output pin 8195 * enabling/disabling. 8196 * 8197 * \warning 8198 * The PMIC controller and/or the PMIC output are enabled automatically when 8199 * you call Cy_SysPm_PmicLock(). To keep the PMIC controller or PMIC output 8200 * disabled, the PMIC must remain unlocked. 8201 * 8202 * \funcusage 8203 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnable 8204 * 8205 * \note 8206 * This API is available for CAT1A & CAT1C devices. 8207 * 8208 *******************************************************************************/ 8209 void Cy_SysPm_PmicUnlock(void); 8210 8211 8212 /******************************************************************************* 8213 * Function Name: Cy_SysPm_PmicIsEnabled 8214 ****************************************************************************//** 8215 * 8216 * This function returns the status of the PMIC controller. 8217 * 8218 * \return 8219 * - True if the PMIC is enabled. 8220 * - False if the PMIC is disabled. 8221 * 8222 * \funcusage 8223 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8224 * 8225 * \note 8226 * This API is available for CAT1A & CAT1C devices. 8227 * 8228 *******************************************************************************/ 8229 bool Cy_SysPm_PmicIsEnabled(void); 8230 8231 8232 /******************************************************************************* 8233 * Function Name: Cy_SysPm_PmicIsOutputEnabled 8234 ****************************************************************************//** 8235 * 8236 * This function returns the status of the PMIC controller output. 8237 * 8238 * \return 8239 * - True if the PMIC output is enabled. 8240 * - False if the PMIC output is disabled. 8241 * 8242 * \funcusage 8243 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisable 8244 * 8245 * \note 8246 * This API is available for CAT1A & CAT1C devices. 8247 * 8248 *******************************************************************************/ 8249 bool Cy_SysPm_PmicIsOutputEnabled(void); 8250 8251 8252 /******************************************************************************* 8253 * Function Name: Cy_SysPm_PmicIsLocked 8254 ****************************************************************************//** 8255 * 8256 * Returns the PMIC controller lock status. 8257 * 8258 * \return 8259 * - True if the PMIC is locked. 8260 * - False if the PMIC is unlocked. 8261 * 8262 * \funcusage 8263 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8264 * 8265 * \note 8266 * This API is available for CAT1A & CAT1C devices. 8267 * 8268 *******************************************************************************/ 8269 bool Cy_SysPm_PmicIsLocked(void); 8270 #endif /* CY_IP_MXS40SRSS */ 8271 /** \} group_syspm_functions_pmic */ 8272 8273 8274 /** 8275 * \addtogroup group_syspm_functions_backup 8276 * \{ 8277 */ 8278 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3) || defined (CY_DOXYGEN) 8279 8280 /******************************************************************************* 8281 * Function Name: Cy_SysPm_BackupSetSupply 8282 ****************************************************************************//** 8283 * 8284 * Sets the backup supply (Vddback) operation mode. 8285 * 8286 * \param 8287 * vddBackControl 8288 * Selects backup supply (Vddback) operation mode. 8289 * See \ref cy_en_syspm_vddbackup_control_t. 8290 * 8291 * Refer to device TRM for more detail about backup supply modes. 8292 * 8293 * \funcusage 8294 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupSetSupply 8295 * 8296 *******************************************************************************/ 8297 void Cy_SysPm_BackupSetSupply(cy_en_syspm_vddbackup_control_t vddBackControl); 8298 8299 8300 /******************************************************************************* 8301 * Function Name: Cy_SysPm_BackupGetSupply 8302 ****************************************************************************//** 8303 * 8304 * Returns the current backup supply (Vddback) operation mode. 8305 * 8306 * \return 8307 * The current backup supply (Vddback) operation mode, 8308 * see \ref cy_en_syspm_status_t. 8309 * 8310 * Refer to device TRM for more detail about backup supply modes. 8311 * 8312 * \funcusage 8313 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupGetSupply 8314 * 8315 *******************************************************************************/ 8316 cy_en_syspm_vddbackup_control_t Cy_SysPm_BackupGetSupply(void); 8317 8318 /******************************************************************************* 8319 * Function Name: Cy_SysPm_BackupEnableVoltageMeasurement 8320 ****************************************************************************//** 8321 * 8322 * This function enables Vbackup supply measurement by the ADC. The function 8323 * connects the Vbackup supply to AMuxBusA. The ADC input can then be connected 8324 * to AMuxBusA. Note that the measured signal is scaled by 10% to allow full 8325 * range measurement by the ADC. 8326 * 8327 * Refer to device TRM for more detail about Vbackup supply measurement. 8328 * 8329 * \funcusage 8330 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupEnableVoltageMeasurement 8331 * 8332 *******************************************************************************/ 8333 void Cy_SysPm_BackupEnableVoltageMeasurement(void); 8334 8335 8336 /******************************************************************************* 8337 * Function Name: Cy_SysPm_BackupDisableVoltageMeasurement 8338 ****************************************************************************//** 8339 * 8340 * The function disables Vbackup supply measurement by the ADC by disconnecting 8341 * the Vbackup supply from AMuxBusA. 8342 * 8343 * Refer to device TRM for more detail about Vbackup supply measurement. 8344 * 8345 * \funcusage 8346 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupDisableVoltageMeasurement 8347 * 8348 *******************************************************************************/ 8349 void Cy_SysPm_BackupDisableVoltageMeasurement(void); 8350 8351 /******************************************************************************* 8352 * Function Name: Cy_SysPm_BackupSuperCapCharge 8353 ****************************************************************************//** 8354 * 8355 * Configures the supercapacitor charger circuit. 8356 * 8357 * \param key 8358 * Passes the key to enable or disable the supercapacitor charger circuit. 8359 * See \ref cy_en_syspm_sc_charge_key_t. 8360 * 8361 * \warning 8362 * This function is used only for charging the supercapacitor. 8363 * Do not use this function to charge a battery. Refer to device TRM for more 8364 * detail. 8365 * 8366 * \funcusage 8367 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupSuperCapCharge 8368 * 8369 *******************************************************************************/ 8370 void Cy_SysPm_BackupSuperCapCharge(cy_en_syspm_sc_charge_key_t key); 8371 #endif 8372 8373 8374 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3) || defined (CY_DOXYGEN) 8375 8376 /******************************************************************************* 8377 * Function Name: Cy_SysPm_BackupWordStore 8378 ****************************************************************************//** 8379 * 8380 * Stores supported number of words(SRSS_BACKUP_NUM_BREG) in Backup Domain 8381 * 8382 * \param wordIndex 8383 * Offset/Index of Backup Register Region(BREG) to where the data needs 8384 * to be stored. 8385 * Starts with 0, ends with (SRSS_BACKUP_NUM_BREG - 1) 8386 * 8387 * \param wordSrcPointer 8388 * Source address from where the words have to be picked and backed up. 8389 * 8390 * \param wordSize 8391 * Number of words to be stored 8392 * 8393 * \note 8394 * This API is available for CAT1B & CAT1C devices. 8395 * 8396 *******************************************************************************/ 8397 8398 void Cy_SysPm_BackupWordStore(uint32_t wordIndex, uint32_t *wordSrcPointer, uint32_t wordSize); 8399 8400 /******************************************************************************* 8401 * Function Name: Cy_SysPm_BackupWordReStore 8402 ****************************************************************************//** 8403 * 8404 * Restores supported number of words(SRSS_BACKUP_NUM_BREG) in Backup Domain 8405 * 8406 * \param wordIndex 8407 * Offset/Index of Backup Register Region(BREG) from where the data need 8408 * to be Restored. 8409 * Starts with 0, ends with (SRSS_BACKUP_NUM_BREG - 1) 8410 * 8411 * \param wordDstPointer 8412 * Destination address from where the backed up words have to be written. 8413 * 8414 * \param wordSize 8415 * Number of words to be Restored 8416 * 8417 * \note 8418 * This API is available for CAT1B & CAT1C devices. 8419 * 8420 *******************************************************************************/ 8421 void Cy_SysPm_BackupWordReStore(uint32_t wordIndex, uint32_t *wordDstPointer, uint32_t wordSize); 8422 #endif 8423 8424 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 8425 /******************************************************************************* 8426 * Function Name: Cy_SysPm_SetupDeepSleepRAM 8427 ****************************************************************************//** 8428 * 8429 * Implements Pre and Post Deepsleep RAM Setup. 8430 * 8431 * \param dsramCheck 8432 * CY_SYSPM_PRE_DSRAM or CY_SYSPM_POST_DSRAM 8433 * 8434 * \param dsramIntState 8435 * Variable to save the interrupt state before and after Deepsleep RAM. 8436 * 8437 * \return 8438 * - CY_SYSPM_SUCCESS - Deepsleep RAM checks are successful 8439 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 8440 * the function returns CY_SYSPM_SUCCESS. 8441 * 8442 * \note 8443 * This API is available for CAT1B devices. 8444 * 8445 *******************************************************************************/ 8446 cy_en_syspm_status_t Cy_SysPm_SetupDeepSleepRAM(cy_en_syspm_dsram_checks_t dsramCheck, uint32_t *dsramIntState); 8447 8448 /******************************************************************************* 8449 * Function Name: Cy_SysPm_CpuEnterRAMOffDeepSleep 8450 ****************************************************************************//** 8451 * 8452 * Sets executing CPU to the Deep Sleep mode forceful RAM OFF. 8453 * 8454 * \return 8455 * Entered status, see \ref cy_en_syspm_status_t. 8456 * 8457 * \note 8458 * This API is available for CAT1B devices. 8459 * 8460 * \note 8461 * This API is not a standard PDL interface, it is a custom defined Power 8462 * Management State, not to be used by the customers. 8463 * 8464 *******************************************************************************/ 8465 cy_en_syspm_status_t Cy_SysPm_CpuEnterRAMOffDeepSleep(void); 8466 8467 #endif 8468 8469 8470 /** \} group_syspm_functions_backup */ 8471 /** \} group_syspm_functions */ 8472 8473 /** \cond INTERNAL */ 8474 8475 /******************************************************************************* 8476 * Backward compatibility macro. The following code is DEPRECATED and must 8477 * not be used in new projects 8478 *******************************************************************************/ 8479 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) 8480 /** 8481 * \note 8482 * These macros is available for CAT1A devices. 8483 **/ 8484 /* BWC defines for Buck related functions */ 8485 typedef cy_en_syspm_buck_voltage1_t cy_en_syspm_simo_buck_voltage1_t; 8486 typedef cy_en_syspm_buck_voltage2_t cy_en_syspm_simo_buck_voltage2_t; 8487 8488 #define Cy_SysPm_SimoBuckGetVoltage2 Cy_SysPm_BuckGetVoltage2 8489 #define Cy_SysPm_DisableVoltage2 Cy_SysPm_BuckDisableVoltage2 8490 #define Cy_SysPm_EnableVoltage2 Cy_SysPm_BuckEnableVoltage2 8491 #define Cy_SysPm_SimoBuckSetHwControl Cy_SysPm_BuckSetVoltage2HwControl 8492 #define Cy_SysPm_SimoBuckGetHwControl Cy_SysPm_BuckIsVoltage2HwControlled 8493 #define Cy_SysPm_SimoBuckSetVoltage2 Cy_SysPm_BuckSetVoltage2 8494 8495 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_15V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V 8496 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_2V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V 8497 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_25V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V 8498 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_3V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V 8499 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_35V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V 8500 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_4V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V 8501 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_45V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V 8502 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_5V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V 8503 8504 #define CY_SYSPM_SIMO_BUCK_OUT1_VOLTAGE_0_9V CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V 8505 #define CY_SYSPM_SIMO_BUCK_OUT1_VOLTAGE_1_1V CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V 8506 8507 #define Cy_SysPm_SwitchToSimoBuck() (Cy_SysPm_BuckEnable(CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V)) 8508 #define Cy_SysPm_SimoBuckGetVoltage1 Cy_SysPm_BuckGetVoltage1 8509 #define Cy_SysPm_SimoBuckIsEnabled Cy_SysPm_BuckIsEnabled 8510 #define Cy_SysPm_SimoBuckSetVoltage1 Cy_SysPm_BuckSetVoltage1 8511 #define Cy_SysPm_SimoBuckOutputIsEnabled Cy_SysPm_BuckIsOutputEnabled 8512 #endif /* CY_IP_MXS40SRSS */ 8513 8514 #define CY_SYSPM_LPCOMP0_LOW CY_SYSPM_HIBERNATE_LPCOMP0_LOW 8515 #define CY_SYSPM_LPCOMP0_HIGH CY_SYSPM_HIBERNATE_LPCOMP0_HIGH 8516 #define CY_SYSPM_LPCOMP1_LOW CY_SYSPM_HIBERNATE_LPCOMP1_LOW 8517 #define CY_SYSPM_LPCOMP1_HIGH CY_SYSPM_HIBERNATE_LPCOMP1_HIGH 8518 #define CY_SYSPM_HIBALARM CY_SYSPM_HIBERNATE_RTC_ALARM 8519 #define CY_SYSPM_HIBWDT CY_SYSPM_HIBERNATE_WDT 8520 #define CY_SYSPM_HIBPIN0_LOW CY_SYSPM_HIBERNATE_PIN0_LOW 8521 #define CY_SYSPM_HIBPIN0_HIGH CY_SYSPM_HIBERNATE_PIN0_HIGH 8522 #define CY_SYSPM_HIBPIN1_LOW CY_SYSPM_HIBERNATE_PIN1_LOW 8523 #define CY_SYSPM_HIBPIN1_HIGH CY_SYSPM_HIBERNATE_PIN1_HIGH 8524 8525 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) 8526 /** 8527 * \note 8528 * These macros is available for CAT1A devices. 8529 **/ 8530 #define CY_SYSPM_ENTER_LP_MODE CY_SYSPM_ULP 8531 #define CY_SYSPM_EXIT_LP_MODE CY_SYSPM_LP 8532 #define CY_SYSPM_STATUS_SYSTEM_LOWPOWER CY_SYSPM_STATUS_SYSTEM_ULP 8533 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3) */ 8534 8535 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) 8536 /** 8537 * \note 8538 * These macros is available for CAT1C devices. 8539 **/ 8540 #define CY_SYSPM_STATUS_SYSTEM_LOWPOWER CY_SYSPM_STATUS_SYSTEM_LPACTIVE 8541 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3) */ 8542 8543 typedef cy_en_syspm_hibernate_wakeup_source_t cy_en_syspm_hib_wakeup_source_t; 8544 8545 /* BWC defines related to hibernation functions */ 8546 #define Cy_SysPm_SetHibWakeupSource Cy_SysPm_SetHibernateWakeupSource 8547 #define Cy_SysPm_ClearHibWakeupSource Cy_SysPm_ClearHibernateWakeupSource 8548 #define Cy_SysPm_GetIoFreezeStatus Cy_SysPm_IoIsFrozen 8549 8550 /* BWC defines for Backup related functions */ 8551 #define Cy_SysPm_SetBackupSupply Cy_SysPm_BackupSetSupply 8552 #define Cy_SysPm_GetBackupSupply Cy_SysPm_BackupGetSupply 8553 #define Cy_SysPm_EnableBackupVMeasure Cy_SysPm_BackupEnableVoltageMeasurement 8554 #define Cy_SysPm_DisableBackupVMeasure Cy_SysPm_BackupDisableVoltageMeasurement 8555 8556 #if defined (CY_IP_MXS40SRSS) 8557 /** 8558 * \note 8559 * These macros is available for CAT1A devices. 8560 **/ 8561 /* BWC defines for PMIC related functions */ 8562 #define Cy_SysPm_EnablePmic Cy_SysPm_PmicEnable 8563 #define Cy_SysPm_DisablePmic Cy_SysPm_PmicDisable 8564 #define Cy_SysPm_AlwaysEnablePmic Cy_SysPm_PmicAlwaysEnable 8565 #define Cy_SysPm_EnablePmicOutput Cy_SysPm_PmicEnableOutput 8566 #define Cy_SysPm_DisablePmicOutput Cy_SysPm_PmicDisableOutput 8567 #define Cy_SysPm_LockPmic Cy_SysPm_PmicLock 8568 #define Cy_SysPm_UnlockPmic Cy_SysPm_PmicUnlock 8569 #define Cy_SysPm_IsPmicEnabled Cy_SysPm_PmicIsEnabled 8570 #define Cy_SysPm_IsPmicOutputEnabled Cy_SysPm_PmicIsOutputEnabled 8571 #define Cy_SysPm_IsPmicLocked Cy_SysPm_PmicIsLocked 8572 #endif /* CY_IP_MXS40SRSS */ 8573 8574 /* BWC defines for functions related to low power transition */ 8575 #define Cy_SysPm_Sleep Cy_SysPm_CpuEnterSleep 8576 #define Cy_SysPm_DeepSleep Cy_SysPm_CpuEnterDeepSleep 8577 #define Cy_SysPm_Hibernate Cy_SysPm_SystemEnterHibernate 8578 8579 #define Cy_SysPm_SleepOnExit Cy_SysPm_CpuSleepOnExit 8580 8581 /* BWC defines for functions related to low power transition */ 8582 #define Cy_SysPm_EnterLpMode Cy_SysPm_EnterLowPowerMode 8583 #define Cy_SysPm_ExitLpMode Cy_SysPm_ExitLowPowerMode 8584 #define Cy_SysPm_IsLowPower Cy_SysPm_IsSystemUlp 8585 8586 #define Cy_SysPm_EnterLowPowerMode Cy_SysPm_SystemSetMinRegulatorCurrent 8587 #define Cy_SysPm_ExitLowPowerMode Cy_SysPm_SystemSetNormalRegulatorCurrent 8588 8589 #define CY_SYSPM_WAKEUP_PIN0_BIT CY_SYSPM_HIB_WAKEUP_PIN0_POS 8590 #define CY_SYSPM_WAKEUP_PIN1_BIT CY_SYSPM_HIB_WAKEUP_PIN1_POS 8591 #define CY_SYSPM_WAKEUP_LPCOMP0_BIT CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS 8592 #define CY_SYSPM_WAKEUP_LPCOMP1_BIT CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS 8593 8594 #define CY_SYSPM_WAKEUP_LPCOMP0 CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK 8595 #define CY_SYSPM_WAKEUP_LPCOMP1 CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK 8596 #define CY_SYSPM_WAKEUP_PIN0 CY_SYSPM_HIB_WAKEUP_PIN0_MASK 8597 #define CY_SYSPM_WAKEUP_PIN1 CY_SYSPM_HIB_WAKEUP_PIN1_MASK 8598 #define CY_SYSPM_WAKEUP_LPCOMP0_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK 8599 #define CY_SYSPM_WAKEUP_LPCOMP1_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK 8600 #define CY_SYSPM_WAKEUP_PIN0_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK 8601 #define CY_SYSPM_WAKEUP_PIN1_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK 8602 8603 #define CY_SYSPM_PWR_TOKEN_HIBERNATE HIBERNATE_TOKEN 8604 #define CY_SYSPM_PWR_WAKEUP_HIB_MASK HIBERNATE_WAKEUP_MASK 8605 #define CY_SYSPM_PWR_RETAIN_HIBERNATE_STATUS HIBERNATE_RETAIN_STATUS_MASK 8606 #define CY_SYSPM_PWR_SET_HIBERNATE SET_HIBERNATE_MODE 8607 #define CY_SYSPM_PWR_HIBERNATE_UNLOCK HIBERNATE_UNLOCK_VAL 8608 8609 /** \endcond */ 8610 8611 #ifdef __cplusplus 8612 } 8613 #endif 8614 8615 #endif /* defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) */ 8616 8617 #endif /* CY_SYSPM_H */ 8618 8619 /** \} group_syspm */ 8620 8621 8622 /* [] END OF FILE */ 8623
