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Searched refs:CY_SYSCLK_DPLL_LP_MAX_REF_DIV (Results 1 – 1 of 1) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_sysclk_v2.c3268 #define CY_SYSCLK_DPLL_LP_MAX_REF_DIV (16UL) macro
3996 for (q = CY_SYSCLK_DPLL_LP_MIN_REF_DIV; q <= CY_SYSCLK_DPLL_LP_MAX_REF_DIV; q++) in Cy_SysClk_DpllLpConfigure()
4075 …pPllCfg->referenceDiv < CY_SYSCLK_DPLL_LP_MIN_REF_DIV) || (CY_SYSCLK_DPLL_LP_MAX_REF_DIV < c… in Cy_SysClk_DpllLpManualConfigure()