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Searched refs:CY_PRA_INDX_SRSS_SRSS_INTR_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_wdt.h736 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_WDT_MATCH, 0U); in Cy_WDT_MaskInterrupt()
758 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_WDT_MATCH, 1U); in Cy_WDT_UnmaskInterrupt()
Dcy_lvd.h571 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 1U); in Cy_LVD_SetInterruptMask()
591 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 0U); in Cy_LVD_ClearInterruptMask()
Dcy_pra.h383 #define CY_PRA_INDX_SRSS_SRSS_INTR_MASK (3U) macro
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_pra.c127 regIndexToAddr[CY_PRA_INDX_SRSS_SRSS_INTR_MASK].addr = &SRSS_SRSS_INTR_MASK; in Cy_PRA_Init()