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Searched refs:CY_GPIO_CFG_OUT_DRIVE_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_gpio.c126 … | (CY_GPIO_CFG_OUT_DRIVE_SEL_MASK << ((uint32_t)(pinNum << 1U) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)); in Cy_GPIO_Pin_Init()
142 …el & CY_GPIO_CFG_OUT_DRIVE_SEL_MASK) << ((uint32_t)(pinNum << 1U) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)); in Cy_GPIO_Pin_Init()
2015 pinLoc = (uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET; in Cy_GPIO_SetDriveSel()
2125 return ((tempReg >> ((uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)) in Cy_GPIO_GetDriveSel()
Dcy_pra.c315 pinLoc = (uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET; in Cy_PRA_InitGpioPort()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_gpio.h440 #define CY_GPIO_CFG_OUT_DRIVE_OFFSET (16UL) /**< Offset for drive strength */ macro