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Searched refs:CRC_POL_CTL (Results 1 – 11 of 11) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_hw.c82 /* cryptoCrcPolCtlOffset */ offsetof(CRYPTO_V1_Type, CRC_POL_CTL),
108 /* cryptoCrcPolCtlOffset */ offsetof(CRYPTO_V2_Type, CRC_POL_CTL),
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_dw.h81 __IOM uint32_t CRC_POL_CTL; /*!< 0x00000120 CRC polynomial control */ member
Dcyip_crypto_v2.h108 __IOM uint32_t CRC_POL_CTL; /*!< 0x00001420 CRC polynomial control */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_dw_v2.h81 __IOM uint32_t CRC_POL_CTL; /*!< 0x00000120 CRC polynomial control */ member
Dcyip_crypto.h91 __IOM uint32_t CRC_POL_CTL; /*!< 0x00000420 CRC polynomial control */ member
Dcyip_crypto_v2.h108 __IOM uint32_t CRC_POL_CTL; /*!< 0x00001420 CRC polynomial control */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_dw.h81 __IOM uint32_t CRC_POL_CTL; /*!< 0x00000120 CRC polynomial control */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h542 #define REG_CRYPTO_CRC_POL_CTL(base) (((CRYPTO_V1_Type*)(base))->CRC_POL_CTL)
566 #define REG_CRYPTO_CRC_POL_CTL(base) (((CRYPTO_V2_Type*)(base))->CRC_POL_CTL)
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h758 #define DW_CRC_POL_CTL(base) (((DW_V2_Type*)(base))->CRC_POL_CTL)
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1045 #define DW_CRC_POL_CTL(base) (((DW_Type*)(base))->CRC_POL_CTL)
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h300 #define DW_CRC_POL_CTL(base) (((DW_Type*)(base))->CRC_POL_CTL)