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Searched refs:limit (Results 1 – 25 of 68) sorted by relevance

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/hal_infineon-3.6.0/XMCLib/drivers/src/
Dxmc1_scu.c262 uint32_t limit; in XMC_SCU_CalcTSEVAR() local
266 limit = ROM_CalcTSEVAR(temperature); in XMC_SCU_CalcTSEVAR()
267 if (limit == 0U) in XMC_SCU_CalcTSEVAR()
269 limit = ROM_CalcTSEVAR(temperature + 1U); in XMC_SCU_CalcTSEVAR()
270 if (limit == 0U) in XMC_SCU_CalcTSEVAR()
272 limit = ROM_CalcTSEVAR(temperature - 1U); in XMC_SCU_CalcTSEVAR()
276 return (limit); in XMC_SCU_CalcTSEVAR()
450 XMC_SCU_STATUS_t XMC_SCU_SetTempLowLimit(uint32_t limit) in XMC_SCU_SetTempLowLimit() argument
454 limit = XMC_SCU_CalcTSEVAR(limit); in XMC_SCU_SetTempLowLimit()
456 if (limit != 0) in XMC_SCU_SetTempLowLimit()
[all …]
Dxmc_usic.c363 const uint32_t limit) in XMC_USIC_CH_TXFIFO_Configure() argument
376 (uint32_t)((limit << USIC_CH_TBCTR_LIMIT_Pos) | in XMC_USIC_CH_TXFIFO_Configure()
385 const uint32_t limit) in XMC_USIC_CH_RXFIFO_Configure() argument
396 ((limit << USIC_CH_RBCTR_LIMIT_Pos) | in XMC_USIC_CH_RXFIFO_Configure()
404 const uint32_t limit) in XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit() argument
413 (limit << USIC_CH_TBCTR_LIMIT_Pos) | in XMC_USIC_CH_TXFIFO_SetSizeTriggerLimit()
419 const uint32_t limit) in XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit() argument
425 (limit << USIC_CH_RBCTR_LIMIT_Pos) | in XMC_USIC_CH_RXFIFO_SetSizeTriggerLimit()
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_cryptolite_utils.c97 int32_t limit; in Cy_Cryptolite_InvertEndianness() local
113 limit = (int32_t)byteSize / 2; in Cy_Cryptolite_InvertEndianness()
116 --limit; in Cy_Cryptolite_InvertEndianness()
121 while ( i > limit) in Cy_Cryptolite_InvertEndianness()
Dcy_mcwdt_b.c791 void Cy_MCWDT_SetLowerLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wa… in Cy_MCWDT_SetLowerLimit() argument
796 …T_FLD32U(MCWDT_CTR_LOWER_LIMIT(base, CY_MCWDT_COUNTER0), MCWDT_CTR_LOWER_LIMIT_LOWER_LIMIT, limit); in Cy_MCWDT_SetLowerLimit()
799 …T_FLD32U(MCWDT_CTR_LOWER_LIMIT(base, CY_MCWDT_COUNTER1), MCWDT_CTR_LOWER_LIMIT_LOWER_LIMIT, limit); in Cy_MCWDT_SetLowerLimit()
844 void Cy_MCWDT_SetUpperLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wa… in Cy_MCWDT_SetUpperLimit() argument
849 …T_FLD32U(MCWDT_CTR_UPPER_LIMIT(base, CY_MCWDT_COUNTER0), MCWDT_CTR_UPPER_LIMIT_UPPER_LIMIT, limit); in Cy_MCWDT_SetUpperLimit()
852 …T_FLD32U(MCWDT_CTR_UPPER_LIMIT(base, CY_MCWDT_COUNTER1), MCWDT_CTR_UPPER_LIMIT_UPPER_LIMIT, limit); in Cy_MCWDT_SetUpperLimit()
897 void Cy_MCWDT_SetWarnLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wai… in Cy_MCWDT_SetWarnLimit() argument
902 …_SET_FLD32U(MCWDT_CTR_WARN_LIMIT(base, CY_MCWDT_COUNTER0), MCWDT_CTR_WARN_LIMIT_WARN_LIMIT, limit); in Cy_MCWDT_SetWarnLimit()
905 …_SET_FLD32U(MCWDT_CTR_WARN_LIMIT(base, CY_MCWDT_COUNTER1), MCWDT_CTR_WARN_LIMIT_WARN_LIMIT, limit); in Cy_MCWDT_SetWarnLimit()
Dcy_crypto_core_hw.c689 int32_t limit; in Cy_Crypto_Core_InvertEndianness() local
697 limit = (int32_t)byteSize / 2; in Cy_Crypto_Core_InvertEndianness()
700 --limit; in Cy_Crypto_Core_InvertEndianness()
705 while ( i > limit) in Cy_Crypto_Core_InvertEndianness()
Dcy_crypto.c1261 int32_t limit; in Cy_Crypto_InvertEndianness() local
1269 limit = (int32_t)byteSize / 2; in Cy_Crypto_InvertEndianness()
1272 --limit; in Cy_Crypto_InvertEndianness()
1277 while ( i > limit) in Cy_Crypto_InvertEndianness()
/hal_infineon-3.6.0/XMCLib/drivers/inc/
Dxmc_usic.h1497 const uint32_t limit);
1518 const uint32_t limit);
1809 const uint32_t limit);
1830 const uint32_t limit);
Dxmc1_scu.h917 XMC_SCU_STATUS_t XMC_SCU_SetTempLowLimit(uint32_t limit);
931 XMC_SCU_STATUS_t XMC_SCU_SetTempHighLimit(uint32_t limit);
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_mcwdt.h667 void Cy_MCWDT_SetLowerLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wa…
668 void Cy_MCWDT_SetUpperLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wa…
669 void Cy_MCWDT_SetWarnLimit(MCWDT_Type *base, cy_en_mcwdtctr_t counter, uint16_t limit, uint16_t wai…
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/
Dcyb06xx5_cm4.ld300 /* Set stack top to end of RAM, and stack limit move down by
306 /* Check if data + heap + stack exceeds RAM limit */
Dcy8c6xx4_cm4.ld304 /* Set stack top to end of RAM, and stack limit move down by
310 /* Check if data + heap + stack exceeds RAM limit */
Dcyb06xx5_cm4_dual.ld317 /* Set stack top to end of RAM, and stack limit move down by
323 /* Check if data + heap + stack exceeds RAM limit */
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1b/COMPONENT_MTB/COMPONENT_CM33/TOOLCHAIN_GCC_ARM/
Dcyw20829A0_ns_ram_cbus.ld356 /* Set stack top to end of RAM, and stack limit move down by
363 /* Check if data + heap + stack exceeds RAM limit */
Dcyw20829_ns_l1ram_cbus.ld347 /* Set stack top to end of RAM, and stack limit move down by
354 /* Check if data + heap + stack exceeds RAM limit */
Dcyw20829_ns_ram_cbus.ld356 /* Set stack top to end of RAM, and stack limit move down by
363 /* Check if data + heap + stack exceeds RAM limit */
Dcyw20829A0_ns_l1ram_cbus.ld347 /* Set stack top to end of RAM, and stack limit move down by
354 /* Check if data + heap + stack exceeds RAM limit */
Dcyw20829A0_ns_ram_sahb.ld328 /* Set stack top to end of RAM, and stack limit move down by
335 /* Check if data + heap + stack exceeds RAM limit */
Dcyw20829_ns_ram_sahb.ld328 /* Set stack top to end of RAM, and stack limit move down by
335 /* Check if data + heap + stack exceeds RAM limit */
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/
Dxmc7200d_x8384_cm0plus.ld304 /* Set stack top to end of RAM, and stack limit move down by
310 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7100_x1088_cm0plus.ld301 /* Set stack top to end of RAM, and stack limit move down by
307 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7100_x4160_cm0plus.ld304 /* Set stack top to end of RAM, and stack limit move down by
310 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7100d_x4160_cm0plus.ld304 /* Set stack top to end of RAM, and stack limit move down by
310 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7100_x2112_cm0plus.ld301 /* Set stack top to end of RAM, and stack limit move down by
307 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7100d_x2112_cm0plus.ld301 /* Set stack top to end of RAM, and stack limit move down by
307 /* Check if data + heap + stack exceeds RAM limit */
Dxmc7200_x8384_cm0plus.ld304 /* Set stack top to end of RAM, and stack limit move down by
310 /* Check if data + heap + stack exceeds RAM limit */

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