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/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/
Dwhd_sdpcm.c183 unsigned char header[SDPCM_LOG_HEADER_SIZE];
196 memcpy(sdpcm_log[next_sdpcm_log_pos].header, eth_data, SDPCM_LOG_HEADER_SIZE);
303 sdpcm_sw_header_t *header = (sdpcm_sw_header_t *)(data + 4); in whd_sdpcm_update_credit() local
307 if ( (header->channel_and_flags & 0x0f) < (uint8_t)3 ) in whd_sdpcm_update_credit()
309 tx_seq_max = header->bus_data_credit; in whd_sdpcm_update_credit()
319 whd_bus_set_flow_control(whd_driver, header->wireless_flow_control); in whd_sdpcm_update_credit()
/hal_infineon-3.6.0/mtb-pdl-cat1/
DREADME.md5 The PDL integrates device header files, and
16 * The ARM Cortex® Microcontroller Software Interface Standard (CMSIS) core access header files
17 * CMSIS compliant device header files, startup code (platform initialization) and device configurat…
/hal_infineon-3.6.0/XMCLib/
DReadme.txt63 …ludes System View Description files (SVD) for use with debuggers, device header files with the reg…
78 5. Include into your source the header files of the peripherals you want to use, i.e. #include <xmc…
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/
Dwhd_bus_spi_protocol.c109 whd_bus_gspi_header_t header; member
286 …whd_buffer_header_t *header = (whd_buffer_header_t *)whd_buffer_get_current_piece_data_pointer(whd… in whd_bus_spi_transfer_buffer() local
292 CHECK_PACKET_NULL(header, WHD_NO_REGISTER_FUNCTION_POINTER); in whd_bus_spi_transfer_buffer()
328 (whd_bus_gspi_header_t *)( (char *)header->bus_header + MAX_BUS_HEADER_SIZE - in whd_bus_spi_transfer_buffer()
331 addr = (uint32_t )header; in whd_bus_spi_transfer_buffer()
338 memcpy(aligned_header, header, sizeof(*aligned_header) + size); in whd_bus_spi_transfer_buffer()
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/
Dcyb06xx5_cm4_dual.sct62 ; The size of the MCU boot header area at the start of FLASH
65 ; The size of the Cortex-M0+ application image (including MCU boot header area)
Dcyb06xxa_cm4_dual.sct62 ; The size of the MCU boot header area at the start of FLASH
65 ; The size of the Cortex-M0+ application image (including MCU boot header area)
Dcyb06xx7_cm4_dual.sct62 ; The size of the MCU boot header area at the start of FLASH
65 ; The size of the Cortex-M0+ application image (including MCU boot header area)
Dcyb06xx5_cm4.sct59 ; The size of the MCU boot header area at the start of FLASH
Dcyb06xx7_cm4.sct59 ; The size of the MCU boot header area at the start of FLASH
Dcys06xxa_cm4.sct59 ; The size of the MCU boot header area at the start of FLASH
Dcyb06xxa_cm4.sct59 ; The size of the MCU boot header area at the start of FLASH
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/
Dcyb06xx7_cm4_dual.icf105 /* The size of the MCU boot header area at the start of FLASH */
108 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
Dcyb06xx5_cm4_dual.icf105 /* The size of the MCU boot header area at the start of FLASH */
108 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
Dcyb06xxa_cm4_dual.icf105 /* The size of the MCU boot header area at the start of FLASH */
108 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
/hal_infineon-3.6.0/mtb-hal-cat1/
DREADME.md7 To use code from the HAL, the specific driver header file can be included or the top level `cyhal.h…
45 …s for common error situations. Note that the errors listed in the driver header are not a comprehe…
/hal_infineon-3.6.0/
DReadme.txt25 devices refers to PSOC6 devices and vice versa. The PDL integrates device header
/hal_infineon-3.6.0/mtb-template-cat1/
DREADME.md28 …ed by the application. This will cause the BSP to include the applicable header file and to initia…
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/
Dcyb06xx5_cm4_dual.ld46 /* The size of the MCU boot header area at the start of FLASH */
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
Dcyb06xx7_cm4_dual.ld46 /* The size of the MCU boot header area at the start of FLASH */
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
Dcyb06xxa_cm4_dual.ld46 /* The size of the MCU boot header area at the start of FLASH */
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1b/COMPONENT_MTB/COMPONENT_CM33/TOOLCHAIN_ARM/
Dcyw20829A0_ns_ram_cbus.sct91 ; The size of the MCU boot header area at the start of FLASH
Dcyw20829A0_ns_ram_sahb.sct92 ; The size of the MCU boot header area at the start of FLASH
Dcyw20829_ns_ram_cbus.sct91 ; The size of the MCU boot header area at the start of FLASH
Dcyw20829_ns_ram_sahb.sct92 ; The size of the MCU boot header area at the start of FLASH
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/
Dcyb06xx5_cm0plus.sct62 ; The size of the MCU boot header area at the start of FLASH

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