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Searched refs:bits (Results 1 – 15 of 15) sorted by relevance

/hal_infineon-3.6.0/abstraction-rtos/source/COMPONENT_FREERTOS/
Dcyabs_rtos_freertos.c665 cy_rslt_t cy_rtos_setbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_setbits_event() argument
678 ret = xEventGroupSetBitsFromISR(*event, bits, &bt); in cy_rtos_setbits_event()
682 ret = xEventGroupSetBits(*event, bits); in cy_rtos_setbits_event()
701 cy_rslt_t cy_rtos_clearbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_clearbits_event() argument
713 ret = xEventGroupClearBitsFromISR(*event, bits); in cy_rtos_clearbits_event()
717 ret = xEventGroupClearBits(*event, bits); in cy_rtos_clearbits_event()
736 cy_rslt_t cy_rtos_getbits_event(cy_event_t* event, uint32_t* bits) in cy_rtos_getbits_event() argument
739 if ((event == NULL) || (bits == NULL)) in cy_rtos_getbits_event()
745 *bits = xEventGroupGetBits(*event); in cy_rtos_getbits_event()
766 uint32_t bits = *waitfor; in cy_rtos_waitbits_event() local
[all …]
/hal_infineon-3.6.0/abstraction-rtos/source/COMPONENT_THREADX/
Dcyabs_rtos_threadx.c588 cy_rslt_t cy_rtos_setbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_setbits_event() argument
597 return convert_error(tx_event_flags_set(event, bits, TX_OR)); in cy_rtos_setbits_event()
604 cy_rslt_t cy_rtos_clearbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_clearbits_event() argument
613 return convert_error(tx_event_flags_set(event, ~bits, TX_AND)); in cy_rtos_clearbits_event()
620 cy_rslt_t cy_rtos_getbits_event(cy_event_t* event, uint32_t* bits) in cy_rtos_getbits_event() argument
622 if ((event == NULL) || (bits == NULL)) in cy_rtos_getbits_event()
627 cy_rtos_error_t tx_rslt = tx_event_flags_get(event, ALL_EVENT_FLAGS, TX_OR, bits, TX_NO_WAIT); in cy_rtos_getbits_event()
631 *bits = 0; in cy_rtos_getbits_event()
644 cy_rslt_t cy_rtos_waitbits_event(cy_event_t* event, uint32_t* bits, bool clear, bool all, in cy_rtos_waitbits_event() argument
649 if ((event == NULL) || (bits == NULL)) in cy_rtos_waitbits_event()
[all …]
/hal_infineon-3.6.0/abstraction-rtos/source/COMPONENT_RTX/
Dcyabs_rtos_rtxv5.c679 cy_rslt_t cy_rtos_setbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_setbits_event() argument
691 statusInternal = (osStatus_t)osEventFlagsSet(*event, bits); in cy_rtos_setbits_event()
705 cy_rslt_t cy_rtos_clearbits_event(cy_event_t* event, uint32_t bits, bool in_isr) in cy_rtos_clearbits_event() argument
717 statusInternal = (osStatus_t)osEventFlagsClear(*event, bits); in cy_rtos_clearbits_event()
731 cy_rslt_t cy_rtos_getbits_event(cy_event_t* event, uint32_t* bits) in cy_rtos_getbits_event() argument
735 if ((event == NULL) || (bits == NULL)) in cy_rtos_getbits_event()
741 *bits = osEventFlagsGet(*event); in cy_rtos_getbits_event()
751 cy_rslt_t cy_rtos_waitbits_event(cy_event_t* event, uint32_t* bits, bool clear, bool all, in cy_rtos_waitbits_event() argument
758 if ((event == NULL) || (bits == NULL)) in cy_rtos_waitbits_event()
770 statusInternal = (osStatus_t)osEventFlagsWait(*event, *bits, flagOption, timeout); in cy_rtos_waitbits_event()
[all …]
/hal_infineon-3.6.0/abstraction-rtos/include/
Dcyabs_rtos.h516 cy_rslt_t cy_rtos_setbits_event(cy_event_t* event, uint32_t bits, bool in_isr);
530 cy_rslt_t cy_rtos_clearbits_event(cy_event_t* event, uint32_t bits, bool in_isr);
542 cy_rslt_t cy_rtos_getbits_event(cy_event_t* event, uint32_t* bits);
561 cy_rslt_t cy_rtos_waitbits_event(cy_event_t* event, uint32_t* bits, bool clear, bool all,
/hal_infineon-3.6.0/core-lib/
DREADME.md14 * `CY_LO8`: Gets the lower 8 bits of a 16-bit value
15 * `CY_HI8`: Gets the upper 8 bits of a 16-bit value
16 * `CY_LO16`: Gets the lower 16 bits of a 32-bit value
17 * `CY_HI16`: Gets the upper 16 bits of a 32-bit value
DRELEASE.md10 * CY_LO8: Gets the lower 8 bits of a 16-bit value
11 * CY_HI8: Gets the upper 8 bits of a 16-bit value
12 * CY_LO16: Gets the lower 16 bits of a 32-bit value
13 * CY_HI16: Gets the upper 16 bits of a 32-bit value
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/
Dcy_syslib_ext.s67 ; bits are not atomic. Therefore, to avoid a corrupting processor state, it must
68 ; be the policy that all interrupt routines restore the interrupt enable bits as
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/
Dstartup_cm0plus.s96 …; align to 256 byte, because CM0_VECTOR_TABLE_BASE register only supports address bits [31:8] (Not…
170 ; Set CPUSS->RAMx_CTL0.ECC_CHECK_DIS bits to avoid causing unintentional ECC faults during startup …
172 ; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SRAM
/hal_infineon-3.6.0/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/
Dstartup_cm0plus.s107 …; Set CPUSS->RAMx_CTL0.ECC_CHECK_DIS bits to avoid causing unintentional ECC faults during startup…
109 …; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SR…
/hal_infineon-3.6.0/mtb-hal-cat1/include/
Dcyhal_sdio.h406 cy_rslt_t cyhal_sdio_dev_mailbox_write(cyhal_sdio_t *obj, uint32_t bits, uint32_t *data);
Dcyhal_spi.h255 … const cyhal_clock_t *clk, uint8_t bits, cyhal_spi_mode_t mode, bool is_slave);
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/include/
Dwhd_chip.h382 extern whd_result_t whd_reset_core(whd_driver_t whd_driver, device_core_t core_id, uint32_t bits, u…
/hal_infineon-3.6.0/mtb-hal-cat1/source/
Dcyhal_spi.c915 … const cyhal_clock_t *clk, uint8_t bits, cyhal_spi_mode_t mode, bool is_slave) in cyhal_spi_init() argument
926 driver_config.rxDataWidth = bits; in cyhal_spi_init()
927 driver_config.txDataWidth = bits; in cyhal_spi_init()
Dcyhal_clock.c2978 uint32_t bits = (clock->block & 0x01) ? 16 : 8; in _cyhal_clock_set_frequency_peripheral() local
2979 cy_rslt_t rslt = _cyhal_clock_compute_div((uint64_t)input_hz, hz, bits, tolerance, &div); in _cyhal_clock_set_frequency_peripheral()
2988 uint32_t bits = (clock->block & 0x01) ? 29 : 21; // Integer bits + 5 in _cyhal_clock_set_frequency_peripheral() local
2989 … cy_rslt_t rslt = _cyhal_clock_compute_div(((uint64_t)input_hz) << 5, hz, bits, tolerance, &div); in _cyhal_clock_set_frequency_peripheral()
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/
Dwhd_chip.c200 whd_result_t whd_reset_core(whd_driver_t whd_driver, device_core_t core_id, uint32_t bits, uint32_t… in whd_reset_core() argument
219 (bits | resetbits | SICF_FGC | SICF_CLOCK_EN) ); in whd_reset_core()
245 …result = whd_bus_write_backplane_value(whd_driver, base + AI_IOCTRL_OFFSET, (uint8_t)1, (bits | SI… in whd_reset_core()