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Searched refs:_CLR_SET_FLD16U (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_sd_host.h1678 SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), in Cy_SD_Host_DisableSdClk()
1685 SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), in Cy_SD_Host_DisableSdClk()
1822 SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), in Cy_SD_Host_EnableAutoCmd23()
1845 SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), in Cy_SD_Host_DisableAutoCmd23()
1871 SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in Cy_SD_Host_EnableAsyncInterrupt()
1893 SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in Cy_SD_Host_DisableAsyncInterrupt()
1934 SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), in Cy_SD_Host_EMMC_Reset()
1941 SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), in Cy_SD_Host_EMMC_Reset()
/hal_infineon-3.6.0/core-lib/include/
Dcy_utils.h324 #define _CLR_SET_FLD16U(reg, field, value) \ macro
337 #define CY_REG16_CLR_SET(reg, field, value) ((reg) = _CLR_SET_FLD16U((reg), field, (value)))
/hal_infineon-3.6.0/core-lib/
DREADME.md31 …* `_CLR_SET_FLD16U`: The macro for setting a 16-bit register with a name field and value for provi…
32 …* `CY_REG16_CLR_SET`: Uses _CLR_SET_FLD16U macro for providing get-clear-modify-write operations w…
DRELEASE.md27 …* _CLR_SET_FLD16U: The macro for setting a 16-bit register with a name field and value for providi…
28 …* CY_REG16_CLR_SET: Uses _CLR_SET_FLD16U macro for providing get-clear-modify-write operations wit…
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_sd_host.c2920 SDHC_CORE_EMMC_CTRL_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), in Cy_SD_Host_Init()
2954 SDHC_CORE_HOST_CTRL2_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in Cy_SD_Host_Init()
4229 SDHC_CORE_CLK_CTRL_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), in Cy_SD_Host_Enable()
4262 SDHC_CORE_CLK_CTRL_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), in Cy_SD_Host_Disable()
4480 SDHC_CORE_HOST_CTRL2_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in Cy_SD_Host_SetHostSpeedMode()
4484 SDHC_CORE_GP_OUT_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_GP_OUT_R(base), in Cy_SD_Host_SetHostSpeedMode()
4488 SDHC_CORE_GP_OUT_R(base) = (uint16_t)_CLR_SET_FLD16U(SDHC_CORE_GP_OUT_R(base), in Cy_SD_Host_SetHostSpeedMode()
5012 SDHC_CORE_BLOCKSIZE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_BLOCKSIZE_R(base), in Cy_SD_Host_InitDataTransfer()
5043 SDHC_CORE_BLOCKSIZE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_BLOCKSIZE_R(base), in Cy_SD_Host_InitDataTransfer()
5134 SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in Cy_SD_Host_ChangeIoVoltage()
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/hal_infineon-3.6.0/mtb-hal-cat1/source/
Dcyhal_sdhc.c408 SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), in _cyhal_sdxx_handle_weak_func()