Home
last modified time | relevance | path

Searched refs:SRSS_NUM_PLL200M (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-3.6.0/mtb-hal-cat1/source/
Dcyhal_clock.c360 #if (SRSS_NUM_PLL200M > 0)
361 const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PLL200M[SRSS_NUM_PLL200M] =
364 #if (SRSS_NUM_PLL200M > 1)
367 #if (SRSS_NUM_PLL200M > 2)
370 #if (SRSS_NUM_PLL200M > 3)
373 #if (SRSS_NUM_PLL200M > 4)
376 #if (SRSS_NUM_PLL200M > 5)
379 #if (SRSS_NUM_PLL200M > 6)
382 #if (SRSS_NUM_PLL200M > 7)
385 #if (SRSS_NUM_PLL200M > 8)
[all …]
Dcyhal_hwmgr_impl_part.h186 #define CY_CHANNEL_COUNT_CLOCK (10 + 7 + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400…
813 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + 11, //…
814 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + 11, //…
816 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + 12, //…
817 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + 13, //…
818 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + 14, //…
820 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + SRSS_NUM_HFROOT + 14, //…
821 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + SRSS_NUM_HFROOT + 15, //…
822 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + SRSS_NUM_HFROOT + 16, //…
823 …PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL200M + SRSS_NUM_PLL400M + SRSS_NUM_HFROOT + 17, //…
Dcyhal_utils_impl.c416 return SRSS_NUM_PLL200M; in _cyhal_utils_get_clock_count()
/hal_infineon-3.6.0/mtb-hal-cat1/include_pvt/
Dcyhal_clock_impl.h43 #define SRSS_NUM_PLL (SRSS_NUM_PLL200M + SRSS_NUM_PLL400M)
289 extern const cyhal_clock_t CYHAL_CLOCK_PLL200[SRSS_NUM_PLL200M];
291 extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PLL200M[SRSS_NUM_PLL200M];
300 #if (SRSS_NUM_PLL200M > 0) && defined(COMPONENT_CAT1B)
302 extern const cyhal_clock_t CYHAL_CLOCK_PLL[SRSS_NUM_PLL200M];
304 extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PLL[SRSS_NUM_PLL200M];
Dcyhal_hw_resources.h95 #define SRSS_NUM_PLL200M SRSS_NUM_PLL macro
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h2180 #define SRSS_NUM_PLL200M 0u macro
Dcyw20829B0_config.h2183 #define SRSS_NUM_PLL200M 0u macro