SRSS_CLK_TIMER_CTL_ENABLE_Msk (reference) in projects: hal_infineon-3.6.0

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Searched refs:SRSS_CLK_TIMER_CTL_ENABLE_Msk (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
D	cyip_srss.h	`341 #define SRSS_CLK_TIMER_CTL_ENABLE_Msk 0x80000000UL macro`
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
D	cyip_srss_v3.h	`862 #define SRSS_CLK_TIMER_CTL_ENABLE_Msk 0x80000000UL macro`
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
D	cy_sysclk.c	`497 SRSS_CLK_TIMER_CTL \|= SRSS_CLK_TIMER_CTL_ENABLE_Msk; in Cy_SysClk_ClkTimerEnable() 520 SRSS_CLK_TIMER_CTL &= ~SRSS_CLK_TIMER_CTL_ENABLE_Msk; in Cy_SysClk_ClkTimerDisable()`

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