1 /* 2 * Copyright 2023, Cypress Semiconductor Corporation (an Infineon company) 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #include "whd.h" 19 #include "bus_protocols/whd_bus_protocol_interface.h" 20 21 #ifndef INCLUDED_SDIO_WHD_BUS_PROTOCOL_H 22 #define INCLUDED_SDIO_WHD_BUS_PROTOCOL_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /****************************************************** 29 * Macros 30 ******************************************************/ 31 #ifndef BIT_MASK 32 #define BIT_MASK(x) ( (1 << x) - 1 ) 33 #endif 34 35 #define WHD_BUS_HEADER_SIZE (0) 36 37 #define WHD_BUS_SDIO_MAX_BACKPLANE_TRANSFER_SIZE (1536) 38 #define WHD_BUS_SDIO_BACKPLANE_READ_PADD_SIZE (0) 39 40 #define WHD_BUS_STATS_INCREMENT_VARIABLE(bus_priv, var) \ 41 do { bus_priv->whd_bus_stats.var++; } while (0) 42 43 #define WHD_BUS_STATS_CONDITIONAL_INCREMENT_VARIABLE(bus_priv, condition, var) \ 44 do { if (condition){ bus_priv->whd_bus_stats.var++; }} while (0) 45 46 /****************************************************** 47 * Structures 48 ******************************************************/ 49 #pragma pack(1) 50 typedef struct 51 { 52 unsigned char stuff_bits; 53 unsigned int ocr : 24; 54 } sdio_cmd5_argument_t; 55 56 typedef struct 57 { 58 unsigned int _unique2 : 9; /* 0-8 */ 59 unsigned int register_address : 17; /* 9-25 */ 60 unsigned int _unique : 2; /* 26-27 */ 61 unsigned int function_number : 3; /* 28-30 */ 62 unsigned int rw_flag : 1; /* 31 */ 63 } sdio_cmd5x_argument_t; 64 65 typedef struct 66 { 67 uint8_t write_data; /* 0 - 7 */ 68 unsigned int _stuff2 : 1; /* 8 */ 69 unsigned int register_address : 17; /* 9-25 */ 70 unsigned int _stuff : 1; /* 26 */ 71 unsigned int raw_flag : 1; /* 27 */ 72 unsigned int function_number : 3; /* 28-30 */ 73 unsigned int rw_flag : 1; /* 31 */ 74 } whd_bus_sdio_cmd52_argument_t; 75 76 typedef struct 77 { 78 unsigned int count : 9; /* 0-8 */ 79 unsigned int register_address : 17; /* 9-25 */ 80 unsigned int op_code : 1; /* 26 */ 81 unsigned int block_mode : 1; /* 27 */ 82 unsigned int function_number : 3; /* 28-30 */ 83 unsigned int rw_flag : 1; /* 31 */ 84 } whd_bus_sdio_cmd53_argument_t; 85 86 typedef union 87 { 88 uint32_t value; 89 sdio_cmd5_argument_t cmd5; 90 sdio_cmd5x_argument_t cmd5x; 91 whd_bus_sdio_cmd52_argument_t cmd52; 92 whd_bus_sdio_cmd53_argument_t cmd53; 93 } sdio_cmd_argument_t; 94 95 typedef struct 96 { 97 unsigned int ocr : 24; /* 0-23 */ 98 unsigned int stuff_bits : 3; /* 24-26 */ 99 unsigned int memory_present : 1; /* 27 */ 100 unsigned int function_count : 3; /* 28-30 */ 101 unsigned int c : 1; /* 31 */ 102 } sdio_response4_t; 103 104 typedef struct 105 { 106 uint8_t data; /* 0-7 */ 107 uint8_t response_flags; /* 8-15 */ 108 uint16_t stuff; /* 16-31 */ 109 } sdio_response5_t; 110 111 typedef struct 112 { 113 uint16_t card_status; /* 0-15 */ 114 uint16_t rca; /* 16-31 */ 115 } sdio_response6_t; 116 117 typedef union 118 { 119 uint32_t value; 120 sdio_response4_t r4; 121 sdio_response5_t r5; 122 sdio_response6_t r6; 123 } sdio_response_t; 124 125 typedef enum 126 { 127 SDIO_BLOCK_MODE = (0 << 2), /* These are STM32 implementation specific */ 128 SDIO_BYTE_MODE = (1 << 2) /* These are STM32 implementation specific */ 129 } sdio_transfer_mode_t; 130 131 typedef enum 132 { 133 SDIO_1B_BLOCK = 1, SDIO_2B_BLOCK = 2, SDIO_4B_BLOCK = 4, SDIO_8B_BLOCK = 8, SDIO_16B_BLOCK = 16, 134 SDIO_32B_BLOCK = 32, SDIO_64B_BLOCK = 64, SDIO_128B_BLOCK = 128, SDIO_256B_BLOCK = 256, SDIO_512B_BLOCK = 512, 135 SDIO_1024B_BLOCK = 1024, SDIO_2048B_BLOCK = 2048 136 } sdio_block_size_t; 137 138 typedef enum 139 { 140 RESPONSE_NEEDED, NO_RESPONSE 141 } sdio_response_needed_t; 142 143 typedef struct 144 { 145 uint32_t cmd52; /* Number of cmd52 reads/writes issued */ 146 uint32_t cmd53_read; /* Number of cmd53 reads */ 147 uint32_t cmd53_write; /* Number of cmd53 writes */ 148 uint32_t cmd52_fail; /* Number of cmd52 read/write fails */ 149 uint32_t cmd53_read_fail; /* Number of cmd53 read fails */ 150 uint32_t cmd53_write_fail; /* Number of cmd53 write fails */ 151 uint32_t oob_intrs; /* Number of OOB interrupts generated by wlan chip */ 152 uint32_t sdio_intrs; /* Number of SDIO interrupts generated by wlan chip */ 153 uint32_t error_intrs; /* Number of SDIO error interrupts generated by wlan chip */ 154 uint32_t read_aborts; /* Number of times read aborts are called */ 155 } whd_bus_stats_t; 156 #pragma pack() 157 158 /****************************************************** 159 * Function declarations 160 ******************************************************/ 161 /* Initialisation functions */ 162 extern whd_result_t whd_bus_sdio_init(whd_driver_t whd_driver); 163 extern whd_result_t whd_bus_sdio_resume_after_deep_sleep(whd_driver_t whd_driver); 164 extern whd_result_t whd_bus_sdio_deinit(whd_driver_t whd_driver); 165 166 /* Device register access functions */ 167 extern whd_result_t whd_bus_sdio_write_backplane_value(whd_driver_t whd_driver, uint32_t address, 168 uint8_t register_length, uint32_t value); 169 extern whd_result_t whd_bus_sdio_read_backplane_value(whd_driver_t whd_driver, uint32_t address, 170 uint8_t register_length, uint8_t *value); 171 extern whd_result_t whd_bus_sdio_write_register_value(whd_driver_t whd_driver, whd_bus_function_t function, 172 uint32_t address, uint8_t value_length, uint32_t value); 173 extern whd_result_t whd_bus_sdio_read_register_value(whd_driver_t whd_driver, whd_bus_function_t function, 174 uint32_t address, uint8_t value_length, uint8_t *value); 175 176 /* Device data transfer functions */ 177 extern whd_result_t whd_bus_sdio_send_buffer(whd_driver_t whd_driver, whd_buffer_t buffer); 178 extern whd_result_t whd_bus_sdio_transfer_bytes(whd_driver_t whd_driver, whd_bus_transfer_direction_t direction, 179 whd_bus_function_t function, uint32_t address, uint16_t size, 180 whd_transfer_bytes_packet_t *data); 181 extern whd_result_t whd_bus_sdio_transfer_backplane_bytes(whd_driver_t whd_driver, 182 whd_bus_transfer_direction_t direction, uint32_t address, 183 uint32_t size, uint8_t *data); 184 185 /* Frame transfer function */ 186 extern whd_result_t whd_bus_sdio_read_frame(whd_driver_t whd_driver, whd_buffer_t *buffer); 187 188 extern whd_result_t whd_bus_sdio_poke_wlan(whd_driver_t whd_driver); 189 extern uint32_t whd_bus_sdio_packet_available_to_read(whd_driver_t whd_driver); 190 extern whd_result_t whd_bus_sdio_ack_interrupt(whd_driver_t whd_driver, uint32_t intstatus); 191 192 extern whd_result_t whd_bus_sdio_set_backplane_window(whd_driver_t whd_driver, uint32_t addr, uint32_t *curbase); 193 194 extern void whd_delayed_bus_release_schedule_update(whd_driver_t whd_driver, whd_bool_t is_scheduled); 195 #define DELAYED_BUS_RELEASE_SCHEDULE(whd_driver, schedule) \ 196 do { whd_delayed_bus_release_schedule_update(whd_driver, schedule); } while (0) 197 198 extern whd_bool_t whd_bus_sdio_wake_interrupt_present(whd_driver_t whd_driver); 199 200 extern whd_result_t whd_bus_sdio_wakeup(whd_driver_t whd_driver); 201 extern whd_result_t whd_bus_sdio_sleep(whd_driver_t whd_driver); 202 203 extern void whd_bus_sdio_init_stats(whd_driver_t whd_driver); 204 extern whd_result_t whd_bus_sdio_print_stats(whd_driver_t whd_driver, whd_bool_t reset_after_print); 205 extern whd_result_t whd_bus_sdio_reinit_stats(whd_driver_t whd_driver, whd_bool_t wake_from_firmware); 206 207 uint8_t whd_bus_sdio_backplane_read_padd_size(whd_driver_t whd_driver); 208 209 extern whd_result_t whd_bus_sdio_wait_for_wlan_event(whd_driver_t whd_driver, 210 cy_semaphore_t *transceive_semaphore); 211 extern whd_bool_t whd_bus_sdio_use_status_report_scheme(whd_driver_t whd_driver); 212 extern uint32_t whd_bus_sdio_get_max_transfer_size(whd_driver_t whd_driver); 213 /****************************************************** 214 * Global variables 215 ******************************************************/ 216 217 #ifdef __cplusplus 218 } /*extern "C" */ 219 #endif 220 221 #endif /* ifndef INCLUDED_SDIO_WHD_BUS_PROTOCOL_H */ 222 223
