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Searched refs:SCU_PLL_PLLCON1_K1DIV_Msk (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-3.6.0/XMCLib/devices/XMC4500/Source/
Dsystem_XMC4500.c671 kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; in SystemCoreClockUpdate()
/hal_infineon-3.6.0/XMCLib/devices/XMC4700/Source/
Dsystem_XMC4700.c721 kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; in SystemCoreClockUpdate()
/hal_infineon-3.6.0/XMCLib/devices/XMC4800/Source/
Dsystem_XMC4800.c820 kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; in SystemCoreClockUpdate()
/hal_infineon-3.6.0/XMCLib/drivers/src/
Dxmc4_scu.c699 … ((((SCU_PLL->PLLCON1) & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1UL)); in XMC_SCU_CLOCK_GetSystemPllClockFrequency()
1731 SCU_PLL->PLLCON1 = (uint32_t)((SCU_PLL->PLLCON1 & ~SCU_PLL_PLLCON1_K1DIV_Msk) | in XMC_SCU_CLOCK_StartSystemPll()
/hal_infineon-3.6.0/XMCLib/devices/XMC4500/Include/
DXMC4500.h5302 #define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV… macro
/hal_infineon-3.6.0/XMCLib/devices/XMC4700/Include/
DXMC4700.h5637 #define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV… macro
/hal_infineon-3.6.0/XMCLib/devices/XMC4800/Include/
DXMC4800.h5869 #define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV… macro