Home
last modified time | relevance | path

Searched refs:SCB_I2C_M_CMD_M_NACK_Msk (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_scb_i2c.c1300 SCB_I2C_M_CMD_M_NACK_Msk : 0UL)); in Cy_SCB_I2C_MasterRead()
1419 SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_STOP_Msk | SCB_I2C_M_CMD_M_NACK_Msk); in Cy_SCB_I2C_MasterAbortRead()
1528 SCB_I2C_M_CMD_M_NACK_Msk : 0UL)); in Cy_SCB_I2C_MasterWrite()
1656 SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_STOP_Msk | SCB_I2C_M_CMD_M_NACK_Msk); in Cy_SCB_I2C_MasterAbortWrite()
1871 SCB_I2C_M_CMD_M_NACK_Msk : 0UL); in Cy_SCB_I2C_MasterSendReStart()
1960 SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_STOP_Msk | SCB_I2C_M_CMD_M_NACK_Msk); in Cy_SCB_I2C_MasterSendStop()
3164 SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_STOP_Msk | SCB_I2C_M_CMD_M_NACK_Msk); in MasterHandleStop()
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_scb.h282 #define SCB_I2C_M_CMD_M_NACK_Msk 0x8UL macro
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_scb_v2.h308 #define SCB_I2C_M_CMD_M_NACK_Msk 0x8UL macro
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_scb_v4.h318 #define SCB_I2C_M_CMD_M_NACK_Msk 0x8UL macro