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Searched refs:REG_I2S_CMD (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_i2s.h575 REG_I2S_CMD(base) |= I2S_CMD_TX_START_Msk; in Cy_I2S_EnableTx()
593 REG_I2S_CMD(base) |= I2S_CMD_TX_PAUSE_Msk; in Cy_I2S_PauseTx()
611 REG_I2S_CMD(base) &= (uint32_t) ~I2S_CMD_TX_PAUSE_Msk; in Cy_I2S_ResumeTx()
632 REG_I2S_CMD(base) &= (uint32_t) ~I2S_CMD_TX_START_Msk; in Cy_I2S_DisableTx()
654 REG_I2S_CMD(base) |= I2S_CMD_RX_START_Msk; in Cy_I2S_EnableRx()
675 REG_I2S_CMD(base) &= (uint32_t) ~I2S_CMD_RX_START_Msk; in Cy_I2S_DisableRx()
695 … return (REG_I2S_CMD(base) & (I2S_CMD_TX_START_Msk | I2S_CMD_TX_PAUSE_Msk | I2S_CMD_RX_START_Msk)); in Cy_I2S_GetCurrentState()
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_i2s.c65 REG_I2S_CMD(base) = 0UL; /* Stop any communication */ in Cy_I2S_Init()
211 REG_I2S_CMD(base) = 0UL; in Cy_I2S_DeInit()
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h932 #define REG_I2S_CMD(base) (((I2S_V1_Type*)(base))->CMD) macro
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1607 #define REG_I2S_CMD(base) (((I2S_Type*)(base))->CMD) macro