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Searched refs:REF_CLOCK_CTL (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_evtgen.c90 … base->REF_CLOCK_CTL = _VAL2FLD(EVTGEN_REF_CLOCK_CTL_INT_DIV, (uint8_t)(refDiv - 1UL)); in Cy_EvtGen_Init()
135 base->REF_CLOCK_CTL = 0UL; in Cy_EvtGen_DeInit()
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_evtgen.h63 __IOM uint32_t REF_CLOCK_CTL; /*!< 0x00000030 Reference clock control */ member