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Searched refs:PASS_V2_INTR_CAUSE_FIFO1_INT_Msk (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_sysanalog.h407 …CY_SYSANALOG_INTR_CAUSE_FIFO1 = PASS_V2_INTR_CAUSE_FIFO1_INT_Msk, /**< Interrupt cause …
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_pass_v2.h262 #define PASS_V2_INTR_CAUSE_FIFO1_INT_Msk 0x2000UL macro