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Searched refs:IS_DIV_VALID (Results 1 – 1 of 1) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_sysanalog.c47 #define IS_DIV_VALID(div) (((div) == CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV) || \ macro
160 CY_ASSERT_L3(IS_DIV_VALID(config->dsClkdivider)); in Cy_SysAnalog_DeepSleepInit()