1 /***************************************************************************//**
2 * \file cy_tcpwm.h
3 * \version 1.60
4 *
5 * The header file of the TCPWM driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2016-2022 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_tcpwm
27 * \{
28 * \defgroup group_tcpwm_common Common
29 * \defgroup group_tcpwm_counter Timer/Counter (TCPWM)
30 * \defgroup group_tcpwm_pwm PWM (TCPWM)
31 * \defgroup group_tcpwm_quaddec Quadrature Decoder (TCPWM)
32 * \defgroup group_tcpwm_shiftreg Shift Register (TCPWM)
33 * \} */
34
35 /**
36 * \addtogroup group_tcpwm
37 * \{
38 *
39 * The TCPWM driver is a multifunction driver that implements Timer Counter,
40 * PWM, Quadrature Decoder and Shift Register functionality using the TCPWM block.
41 *
42 * The functions and other declarations used in this driver are in cy_tcpwm_counter.h,
43 * cy_tcpwm_pwm.h, cy_tcpwm_quaddec.h, cy_tcpwm_shiftreg.h respectively. Include cy_pdl.h
44 * to get access to all functions and declarations in the PDL.
45 *
46 * Each TCPWM block is a collection of counters that can all be triggered
47 * simultaneously. For each function call, the base register address of
48 * the TCPWM being used must be passed first, followed by the index of
49 * the counter you want to touch next.
50 *
51 * The TCPWM supports seven function modes:
52 * * Timer
53 * * Capture
54 * * Quadrature Decoder
55 * * Pulse Width Modulation (PWM)
56 * * PWM with dead time insertion (PWMDT)
57 * * Pseudo random PWM (PWMPR)
58 * * Shift Register
59 *
60 * The TCPWM driver is structured to map these seven functional modes to four
61 * high level operating modes:
62 * * Timer/Counter (includes Timer, Capture modes)
63 * * PWM (PWM, PWMDT, PWMPR)
64 * * Quadrature Decoder
65 * * Shift Register
66 *
67 * A brief description on each of the operating modes:
68 *
69 * \b Timer/Counter
70 *
71 * Use this mode whenever a specific timing interval or measurement is
72 * needed. Examples include:
73 * * Creating a periodic interrupt for running other system tasks
74 * * Measuring frequency of an input signal
75 * * Measuring pulse width of an input signal
76 * * Measuring time between two external events
77 * * Counting events
78 * * Triggering other system resources after x number events
79 * * Capturing time stamps when events occur
80 *
81 * \n
82 * \b PWM
83 *
84 * Use this mode when an output square wave is needed with a specific
85 * period and duty cycle, such as:
86 * * Creating arbitrary square wave outputs
87 * * Driving an LED (changing the brightness)
88 * * Driving Motors (dead time assertion available)
89 *
90 * \n
91 * \b Quadrature \b Decoder
92 *
93 * A quadrature decoder is used to decode the output of a quadrature encoder.
94 * A quadrature encoder senses the position, velocity, and direction of
95 * an object (for example a rotating axle, or a spinning mouse ball).
96 * A quadrature decoder can also be used for precision measurement of speed,
97 * acceleration, and position of a motor's rotor, or with a rotary switch to
98 * determine user input. \n
99 *
100 * \n
101 * \b Shift \b Register
102 *
103 * Shift Register functionality shifts the counter value to the right.
104 * A shift register is used to apply a signal delay function which can be used
105 * eg: in detecting frequency shift keying (FSK) signals.
106 * A shift register is also used in parallel-in to serial-out data conversion
107 * and serial-in to parallel-out data conversion.
108 *
109 * \section group_tcpwm_version_information TCPWM Versions
110 *
111 * There are two versions of TCPWM driver
112 *
113 * \b TCPWM \b Version \b 2
114 *
115 * - Devices CY8C61x4 and CY8C62x4 use this version.
116 * - Supports up to four counter groups (check TRM for actual number of groups supported)
117 * - Each counter group consists of up to 256 counters (check TRM for actual number of counters supported)
118 * - Each counter
119 * - Can run in one of seven function modes
120 * - Supports various counting modes:
121 * - One-shot mode, Continuous mode (Up/Down/Up-down)
122 * - Selects input signals
123 * - Start, Reload, Stop, Count, and two Capture event signals
124 * - Generates output signals:
125 * - Two output triggers, PWM output, and Interrupt
126 * - Trigger Outputs (TR_OUT0/1) and an Interrupt on an event
127 * - Overflow (OV)
128 * - Underflow (UN)
129 * - Terminal Count (TC)
130 * - CC0/1_MATCH
131 * - LINE_OUT
132 * - Supports debug mode
133 * - Each counter can produce two output signals
134 *
135 * \image html tcpwm_v2_block_diagram.png
136 *
137 * - \b Input \b Trigger \b Selection \b and \b Event \b Detection
138 * - The counter control signals are generated as follows:
139 * - Selects input signals from two types of trigger multiplexer signals
140 * - Group trigger and one-to-one trigger
141 * - The constant '1' and '0' are also used as input triggers
142 * - Detects the selected edge from four types
143 * - Rising edge/falling edge/any edge/no edge
144 * - Supports software (SW) command
145 * - SW command of Trigger Multiplexer/SW command of TCPWM
146 *
147 * \image html tcpwm_v2_input_trigger_sel.png
148 *
149 * - \b Simultaneous \b Activation:
150 * - When a Trigger Multiplexer block SW command is used, the TCPWM counters can be activated at the same time
151 *
152 * \image html tcpwm_v2_trigger_simultaneously.png
153 *
154 * \b TCPWM \b Version \b 1
155 *
156 * - Devices CY8C61x6, CY8C61x7, CY8C62x5, CY8C62x6, CY8C62x7, CY8C62x8, CY8C62xA, CY8C63x6, CY8C63x7, CYS0644xxZI-S2D44,
157 * CYB0644xxZI-S4D44, CYB06447BZI-BLDX, CYB06447BZI-D54 and CYB06445LQI-S3D42 use this version.
158 * - Supports up to 32 counters (check TRM for actual number of counters supported)
159 * - Synchronized operation of multiple counters.
160 * - 16 or 32 bit counter, compare/capture (CC) and period registers.
161 * - CC and period registers are double buffered.
162 * - Up, down and up/down counting modes.
163 * - 14 trigger input signals and 2 constant input signals: '0' and '1', for a total of 16 hardware (HW) input signals
164 * - Rising edge, falling edge, combined rising/falling edge detection or pass-through on all HW input signals to derive counter events.
165 * - The start, reload, stop and capture events can be generated by software.
166 * - Clock pre-scaling (1x, 2x, 4x ... 128x).
167 * - Support Pseudo Random PWM
168 * - 3 output trigger signals for each counter to indicate underflow, overflow and cc_match events.
169 * - 2 PWM complementary output lines for each counter. Dead time insertion ([0, 255] counter cycles).
170 * - Support one interrupt output for each counter.
171 *
172 * \image html tcpwm_v1_block_diagram.png
173 *
174 * - Many functions work with an individual counter. You can also manage multiple counters simultaneously for certain functions.
175 * - These are listed in the \ref group_tcpwm_functions_common section of the TCPWM.
176 * - You can enable, disable, or trigger (in various ways) multiple counters simultaneously.
177 * - For these functions you provide a bit field representing each counter in the TCPWM you want to control.
178 * - You can represent the bit field as an ORed mask of each counter, like ((1U << cntNumX) | (1U << cntNumX) | (1U << cntNumX)), where X is the counter number from 0 to 31.
179 *
180 * \note
181 * * If none of the input terminals (start, reload(index)) are used, the
182 * software event \ref Cy_TCPWM_TriggerStart or
183 * \ref Cy_TCPWM_TriggerReloadOrIndex must be called to start the counting.
184 * * If count input terminal is not used, the \ref CY_TCPWM_INPUT_LEVEL macro
185 * should be set for the countInputMode parameter and the \ref CY_TCPWM_INPUT_1
186 * macro should be set for the countInput parameter in the configuration
187 * structure of the appropriate mode(Counter
188 * \ref group_tcpwm_data_structures_counter, PWM
189 * \ref group_tcpwm_data_structures_pwm, QuadDec
190 * \ref group_tcpwm_data_structures_quaddec, or Shift Register
191 * \ref group_tcpwm_data_structures_shiftreg).
192
193 * \section group_tcpwm_more_information More Information
194 *
195 * For more information on the TCPWM peripheral, refer to the technical
196 * reference manual (TRM).
197 *
198 * \section group_tcpwm_changelog Changelog
199 * <table class="doxtable">
200 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
201 * <tr>
202 * <td>1.60</td>
203 * <td>Newly Added \ref Cy_TCPWM_OutputTriggerSetup API and code enhancement. </td>
204 * <td>Glitch filter support added for TCPWM version 3 and above.</td>
205 * </tr>
206 * <tr>
207 * <td>1.50</td>
208 * <td>
209 * <ul>
210 * <li>Newly Added \ref cy_en_gf_depth_support_value_t, \ref cy_en_counter_direction_t , \ref cy_en_group_dithering_t and \ref cy_en_dithering_limiter_t enums.<br>
211 * <li> Newly Added \ref Cy_TCPWM_Block_EnableSwap , \ref Cy_TCPWM_InputTriggerSetupWithGF , \ref Cy_TCPWM_Counter_EnableSwap , \ref Cy_TCPWM_QuadDec_EnableSwap and \ref Cy_TCPWM_Shiftreg_EnableSwap APIs.<br>
212 * </ul>
213 * <td>
214 * <ul>
215 * <li>Support for IP version 3.0.<br>
216 * <li>Bug fixes.<br>
217 * <li>Documentation update.</td>
218 * </ul>
219 * <tr>
220 * <td>1.40</td>
221 * <td>Support for CAT1B and CAT1D devices is added. No changes in public APIs interface and behavior. </td>
222 * <td>New devices support added.</td>
223 * </tr>
224 * <tr>
225 * <td>1.30.1</td>
226 * <td>Updated documentation of PWM mode. </td>
227 * <td>Documentation enhancement. </td>
228 * </tr>
229 * <tr>
230 * <td>1.30</td>
231 * <td>Added new option to Swap Overflow/Underflow behavior in PWM Centre/Asymmetric Alignment modes.</td>
232 * <td>New feature.</td>
233 * </tr>
234 * <tr>
235 * <td>1.20</td>
236 * <td>Added new features: Shift Register, New QuadDec modes, Additional Compare/Capture Buffer.</td>
237 * <td>New silicon family support.</td>
238 * </tr>
239 * <tr>
240 * <td>1.10.2</td>
241 * <td>Minor documentation updates.</td>
242 * <td>Documentation enhancement.</td>
243 * </tr>
244 * <tr>
245 * <td>1.10.1</td>
246 * <td>Added header guards CY_IP_MXTCPWM.</td>
247 * <td>To enable the PDL compilation with wounded out IP blocks.</td>
248 * </tr>
249 * <tr>
250 * <td rowspan="2">1.10</td>
251 * <td>Flattened the organization of the driver source code into the single
252 * source directory and the single include directory.
253 * </td>
254 * <td>Driver library directory-structure simplification.</td>
255 * </tr>
256 * <tr>
257 * <td>Added register access layer. Use register access macros instead
258 * of direct register access using dereferenced pointers.</td>
259 * <td>Makes register access device-independent, so that the PDL does
260 * not need to be recompiled for each supported part number.</td>
261 * </tr>
262 * <tr>
263 * <td>1.0.1</td>
264 * <td>Added a deviation to the MISRA Compliance section.
265 * Added function-level code snippets.</td>
266 * <td>Documentation update and clarification</td>
267 * </tr>
268 * <tr>
269 * <td>1.0</td>
270 * <td>Initial version</td>
271 * <td></td>
272 * </tr>
273 * </table>
274 */
275
276 /** \} group_tcpwm */
277
278 /**
279 * \addtogroup group_tcpwm_common
280 * Common API for the Timer Counter PWM Block.
281 *
282 * This is the common API that provides an interface to the TCPWM hardware.
283 * The Timer Counter, PWM, and Quadrature Decoder drivers use this common API.
284 * Most users will use individual drivers and do not need to use the common
285 * API for the TCPWM.
286 *
287 * The functions and other declarations used in this part of the driver are in cy_tcpwm.h.
288 * Include either of cy_tcpwm_counter.h, cy_tcpwm_pwm.h, cy_tcpwm_quaddec.h
289 * depending on the desired functionality. You can also include cy_pdl.h
290 * to get access to all functions and declarations in the PDL.
291 *
292 * \{
293 * \defgroup group_tcpwm_macros_common Macros
294 * \defgroup group_tcpwm_functions_common Functions
295 * \defgroup group_tcpwm_data_structures_common Data Structures
296 * \defgroup group_tcpwm_enums Enumerated Types
297 */
298
299
300 #if !defined(CY_TCPWM_H)
301 #define CY_TCPWM_H
302
303 #include <stdint.h>
304 #include <stdbool.h>
305 #include <stddef.h>
306 #include "cy_syslib.h"
307 #include "cy_device_headers.h"
308 #include "cy_device.h"
309
310 #ifdef CY_IP_MXTCPWM
311
312 #if defined(__cplusplus)
313 extern "C" {
314 #endif
315
316 /**
317 * \addtogroup group_tcpwm_macros_common
318 * \{
319 */
320
321 /** Driver major version */
322 #define CY_TCPWM_DRV_VERSION_MAJOR 1
323
324 /** Driver minor version */
325 #define CY_TCPWM_DRV_VERSION_MINOR 60
326
327
328 /******************************************************************************
329 * API Constants
330 ******************************************************************************/
331
332 /** TCPWM driver identifier */
333 #define CY_TCPWM_ID (CY_PDL_DRV_ID(0x2DU))
334
335 /** \defgroup group_tcpwm_input_selection TCPWM Input Selection
336 * \{
337 * Selects which input to use
338 */
339 #define CY_TCPWM_INPUT_0 (0U) /**< Input is tied to logic 0 */
340 #define CY_TCPWM_INPUT_1 (1U) /**< Input is tied to logic 1 */
341 #define CY_TCPWM_INPUT_TRIG_0 (2U) /**< Input is connected to the trigger input 0 */
342 #define CY_TCPWM_INPUT_TRIG_1 (3U) /**< Input is connected to the trigger input 1 */
343 #define CY_TCPWM_INPUT_TRIG_2 (4U) /**< Input is connected to the trigger input 2 */
344 #define CY_TCPWM_INPUT_TRIG_3 (5U) /**< Input is connected to the trigger input 3 */
345 #define CY_TCPWM_INPUT_TRIG_4 (6U) /**< Input is connected to the trigger input 4 */
346 #define CY_TCPWM_INPUT_TRIG_5 (7U) /**< Input is connected to the trigger input 5 */
347 #define CY_TCPWM_INPUT_TRIG_6 (8U) /**< Input is connected to the trigger input 6 */
348 #define CY_TCPWM_INPUT_TRIG_7 (9U) /**< Input is connected to the trigger input 7 */
349 #define CY_TCPWM_INPUT_TRIG_8 (10U) /**< Input is connected to the trigger input 8 */
350 #define CY_TCPWM_INPUT_TRIG_9 (11U) /**< Input is connected to the trigger input 9 */
351 #define CY_TCPWM_INPUT_TRIG_10 (12U) /**< Input is connected to the trigger input 10 */
352 #define CY_TCPWM_INPUT_TRIG_11 (13U) /**< Input is connected to the trigger input 11 */
353 #define CY_TCPWM_INPUT_TRIG_12 (14U) /**< Input is connected to the trigger input 12 */
354 #define CY_TCPWM_INPUT_TRIG_13 (15U) /**< Input is connected to the trigger input 13 */
355
356 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined(CY_DOXYGEN)
357
358 #ifndef TCPWM_TR_ONE_CNT_NR
359 #define CY_TCPWM_INPUT_TRIG_WITH_INST(n,m) (n + TCPWM ##m## _TR_ONE_CNT_NR + 2U) /**< Input is connected to the trigger input n - all purpose trigger,
360 * m is the TCPWM instance number.*/
361 #else
362 #define CY_TCPWM_INPUT_TRIG(n) (n + TCPWM_TR_ONE_CNT_NR + 2U) /**< Input is connected to the trigger input n - all purpose trigger */
363
364 #endif /* TCPWM_TR_ONE_CNT_NR */
365 #endif /* (CY_IP_MXTCPWM_VERSION >= 2U) || defined(CY_DOXYGEN) */
366
367 /** Input is defined by Creator, and Init() function does not need to configure input */
368 #define CY_TCPWM_INPUT_CREATOR (0xFFFFFFFFU)
369 /** \} group_tcpwm_input_selection */
370
371 /**
372 * \defgroup group_tcpwm_input_modes Input Modes
373 * \{
374 * Configures how TCPWM inputs behave
375 */
376 /** A rising edge triggers the event (Capture, Start, Reload, etc..) */
377 #define CY_TCPWM_INPUT_RISINGEDGE (0U)
378 /** A falling edge triggers the event (Capture, Start, Reload, etc..) */
379 #define CY_TCPWM_INPUT_FALLINGEDGE (1U)
380 /** A rising edge or falling edge triggers the event (Capture, Start, Reload, etc..) */
381 #define CY_TCPWM_INPUT_EITHEREDGE (2U)
382 /** The event is triggered on each edge of the TCPWM clock if the input is high */
383 #define CY_TCPWM_INPUT_LEVEL (3U)
384 /** \} group_tcpwm_input_modes */
385
386 /**
387 * \defgroup group_tcpwm_output_trigger_modes Output Trigger Modes
388 * \{
389 * Configures how TCPWM output triggers behave (TCPWM_v2 only)
390 */
391 /** Output trigger generates signal on overflow event */
392 #define CY_TCPWM_CNT_TRIGGER_ON_OVERFLOW (0U)
393 /** Output trigger generates signal on underflow event */
394 #define CY_TCPWM_CNT_TRIGGER_ON_UNDEFLOW (1U)
395 /** Output trigger generates signal on terminal count event */
396 #define CY_TCPWM_CNT_TRIGGER_ON_TC (2U)
397 /** Output trigger generates signal on compare/capture 0 event */
398 #define CY_TCPWM_CNT_TRIGGER_ON_CC0_MATCH (3U)
399 /** Output trigger generates signal on compare/capture 1 event */
400 #define CY_TCPWM_CNT_TRIGGER_ON_CC1_MATCH (4U)
401 /** Output trigger generates the same signal as line_out */
402 #define CY_TCPWM_CNT_TRIGGER_ON_LINE_OUT (5U)
403 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
404 /** Output trigger generates signal on compare/capture 0 or event */
405 #define CY_TCPWM_CNT_TRIGGER_ON_CC0_OR_CC1_MATCH (6U)
406 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
407 /** Output trigger disabled */
408 #define CY_TCPWM_CNT_TRIGGER_ON_DISABLED (7U)
409 /** \} group_tcpwm_output_trigger_modes */
410
411 /**
412 * \defgroup group_tcpwm_interrupt_sources Interrupt Sources
413 * \{
414 * Interrupt Sources
415 */
416 #define CY_TCPWM_INT_NONE (0U) /**< No Interrupt */
417 #define CY_TCPWM_INT_ON_TC (1U) /**< Interrupt on Terminal count(TC) */
418 #define CY_TCPWM_INT_ON_CC0 (2U) /**< Interrupt on Compare 0/Capture 0(CC0) */
419 #define CY_TCPWM_INT_ON_CC0_OR_TC (3U) /**< Interrupt on TC or CC0 */
420 #define CY_TCPWM_INT_ON_CC1 (4U) /**< Interrupt on Compare 1/Capture 1(CC1)*/
421 /** \} group_tcpwm_interrupt_sources */
422
423 /***************************************
424 * Registers Constants
425 ***************************************/
426
427 /**
428 * \defgroup group_tcpwm_reg_const Default registers constants
429 * \{
430 * Default constants for CNT Registers
431 */
432 #define CY_TCPWM_CNT_CTRL_DEFAULT (0x0U) /**< Default value for CTRL register */
433 #define CY_TCPWM_CNT_COUNTER_DEFAULT (0x0U) /**< Default value for COUNTER register */
434 #define CY_TCPWM_CNT_CC_DEFAULT (0xFFFFFFFFU) /**< Default value for CC register */
435 #define CY_TCPWM_CNT_CC_BUFF_DEFAULT (0xFFFFFFFFU) /**< Default value for CC_BUFF register */
436 #define CY_TCPWM_CNT_PERIOD_DEFAULT (0xFFFFFFFFU) /**< Default value for PERIOD register */
437 #define CY_TCPWM_CNT_PERIOD_BUFF_DEFAULT (0xFFFFFFFFU) /**< Default value for PERIOD_BUFF register */
438 #define CY_TCPWM_CNT_TR_CTRL0_DEFAULT (0x10U) /**< Default value for TR_CTRL0 register */
439 #define CY_TCPWM_CNT_TR_CTRL1_DEFAULT (0x3FFU) /**< Default value for TR_CTRL1 register */
440 #define CY_TCPWM_CNT_TR_CTRL2_DEFAULT (0x3FU) /**< Default value for TR_CTRL2 register */
441 #define CY_TCPWM_CNT_INTR_DEFAULT (0x3U) /**< Default value for INTR register */
442 #define CY_TCPWM_CNT_INTR_SET_DEFAULT (0x0U) /**< Default value for INTR_SET register */
443 #define CY_TCPWM_CNT_INTR_MASK_DEFAULT (0x0U) /**< Default value for INTR_MASK register */
444
445 #define CY_TCPWM_GRP_CNT_CTRL_DEFAULT (0xF0U) /**< Default value for CTRL register */
446 #define CY_TCPWM_GRP_CNT_DT_DEFAULT (0x0U) /**< Default value for DT register */
447 #define CY_TCPWM_GRP_CNT_COUNTER_DEFAULT (0x0U) /**< Default value for COUNTER register */
448 #define CY_TCPWM_GRP_CNT_CC0_DEFAULT (0xFFFFFFFFU) /**< Default value for CC0 register */
449 #define CY_TCPWM_GRP_CNT_CC0_BUFF_DEFAULT (0xFFFFFFFFU) /**< Default value for CC0_BUFF register */
450 #define CY_TCPWM_GRP_CNT_CC1_DEFAULT (0xFFFFFFFFU) /**< Default value for CC0 register */
451 #define CY_TCPWM_GRP_CNT_CC1_BUFF_DEFAULT (0xFFFFFFFFU) /**< Default value for CC0_BUFF register */
452 #define CY_TCPWM_GRP_CNT_PERIOD_DEFAULT (0xFFFFFFFFU) /**< Default value for PERIOD register */
453 #define CY_TCPWM_GRP_CNT_PERIOD_BUFF_DEFAULT (0xFFFFFFFFU) /**< Default value for PERIOD_BUFF register */
454 #define CY_TCPWM_GRP_CNT_TR_PWM_CTRL_DEFAULT (0xFFFU) /**< Default value for TR_PWM_CTRL register */
455 #define CY_TCPWM_GRP_CNT_TR_IN_SEL0_DEFAULT (0x100U) /**< Default value for TR_IN_SEL0 register */
456 #define CY_TCPWM_GRP_CNT_TR_IN_SEL1_DEFAULT (0x0U) /**< Default value for TR_IN_SEL1 register */
457 #define CY_TCPWM_GRP_CNT_TR_IN_EDGE_SEL_DEFAULT (0xFFFU) /**< Default value for TR_IN_EDGE_SEL register */
458 #define CY_TCPWM_GRP_CNT_INTR_MASK_DEFAULT (0x0U) /**< Default value for INTR_MASK register */
459
460 /** \} group_tcpwm_reg_const */
461
462 /** Position of Up counting counter status */
463 #define CY_TCPWM_CNT_STATUS_UP_POS (0x1U)
464 /** Initial value for the counter in the Up counting mode */
465 #define CY_TCPWM_CNT_UP_INIT_VAL (0x0U)
466 /** Initial value for the counter in the Up/Down counting modes */
467 #define CY_TCPWM_CNT_UP_DOWN_INIT_VAL (0x1U)
468 /** \} group_tcpwm_macros_common */
469
470
471 /*******************************************************************************
472 * Enumerations
473 ******************************************************************************/
474
475 /**
476 * \addtogroup group_tcpwm_enums
477 * \{
478 */
479
480 /** TCPWM Input Triggers */
481 typedef enum
482 {
483 CY_TCPWM_INPUT_TR_START = 0x00U, /**< Start */
484 CY_TCPWM_INPUT_TR_RELOAD_OR_INDEX = 0x01U, /**< Reload/Index */
485 CY_TCPWM_INPUT_TR_STOP_OR_KILL = 0x02U, /**< Stop/Kill */
486 CY_TCPWM_INPUT_TR_COUNT = 0x03U, /**< Count */
487 CY_TCPWM_INPUT_TR_INDEX_OR_SWAP = 0x04U, /**< Index/Swap */
488 CY_TCPWM_INPUT_TR_CAPTURE0 = 0x04U, /**< Capture 0 */
489 CY_TCPWM_INPUT_TR_CAPTURE1 = 0x05U /**< Capture 1 */
490 } cy_en_tcpwm_trigselect_t;
491
492 /** TCPWM output Triggers */
493 typedef enum
494 {
495 CY_TCPWM_OUTPUT_TR_OVERFLOW = 0x00U, /**< Overflow Event */
496 CY_TCPWM_OUTPUT_TR_UNDERFLOW = 0x01U, /**< Underflow Event */
497 CY_TCPWM_OUTPUT_TR_TC_EVENT = 0x02U, /**< Terminal Count Event */
498 CY_TCPWM_OUTPUT_TR_CC0_MATCH = 0x03U, /**< Compare Match 0 Event */
499 CY_TCPWM_OUTPUT_TR_CC1_MATCH = 0x04U, /**< Compare Match 1 Event */
500 CY_TCPWM_OUTPUT_TR_LINE_OUT = 0x05U, /**< PWM Output Signal Line Out */
501 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
502 CY_TCPWM_OUTPUT_TR_CC0ORCC1_MATCH = 0x06U, /**< Compare Match 0 Event or Compare Match 1 Event */
503 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
504 CY_TCPWM_OUTPUT_TR_DISABLED = 0x07U /**< Trigger Out Disabled */
505 } cy_en_tcpwm_output_trigselect_t;
506
507 /** TCPWM status definitions */
508 typedef enum
509 {
510 CY_TCPWM_SUCCESS = 0x00U, /**< Successful */
511 CY_TCPWM_BAD_PARAM = CY_TCPWM_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< One or more invalid parameters */
512 CY_TCPWM_UNSUPPORTED_FEATURE = CY_TCPWM_ID | CY_PDL_STATUS_ERROR | 0x02U, /**< Feature Unsupported */
513 } cy_en_tcpwm_status_t;
514
515 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
516
517 /** Glitch filter depth support values */
518 typedef enum
519 {
520 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_0 = 0UL, /**< GLitch filter depth value 0. */
521 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_1 = 1UL, /**< GLitch filter depth value 1. */
522 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_2 = 2UL, /**< GLitch filter depth value 2. */
523 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_4 = 3UL, /**< GLitch filter depth value 4. */
524 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_8 = 4UL, /**< GLitch filter depth value 8. */
525 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_16 = 5UL, /**< GLitch filter depth value 16 */
526 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_32 = 6UL, /**< GLitch filter depth value 32 */
527 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_64 = 7UL, /**< GLitch filter depth value 64 */
528 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_128 = 8UL, /**< GLitch filter depth value 128 */
529 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_256 = 9UL, /**< GLitch filter depth value 256 */
530 CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_512 = 10UL, /**< GLitch filter depth value 512 */
531 } cy_en_gf_depth_support_value_t;
532
533 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
534 /** \} group_tcpwm_enums */
535
536 /*******************************************************************************
537 * Function Prototypes
538 *******************************************************************************/
539
540 /**
541 * \addtogroup group_tcpwm_functions_common
542 * \{
543 */
544
545 #if (CY_IP_MXTCPWM_VERSION == 1U) || defined(CY_DOXYGEN)
546 __STATIC_INLINE void Cy_TCPWM_Enable_Multiple(TCPWM_Type *base, uint32_t counters);
547 __STATIC_INLINE void Cy_TCPWM_Disable_Multiple(TCPWM_Type *base, uint32_t counters);
548 __STATIC_INLINE void Cy_TCPWM_TriggerStart(TCPWM_Type *base, uint32_t counters);
549 __STATIC_INLINE void Cy_TCPWM_TriggerReloadOrIndex(TCPWM_Type *base, uint32_t counters);
550 __STATIC_INLINE void Cy_TCPWM_TriggerStopOrKill(TCPWM_Type *base, uint32_t counters);
551 __STATIC_INLINE void Cy_TCPWM_TriggerCaptureOrSwap(TCPWM_Type *base, uint32_t counters);
552 #endif
553 __STATIC_INLINE void Cy_TCPWM_Enable_Single(TCPWM_Type *base, uint32_t cntNum);
554 __STATIC_INLINE void Cy_TCPWM_Disable_Single(TCPWM_Type *base, uint32_t cntNum);
555 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatus(TCPWM_Type const *base, uint32_t cntNum);
556 __STATIC_INLINE void Cy_TCPWM_ClearInterrupt(TCPWM_Type *base, uint32_t cntNum, uint32_t source);
557 __STATIC_INLINE void Cy_TCPWM_SetInterrupt(TCPWM_Type *base, uint32_t cntNum, uint32_t source);
558 __STATIC_INLINE void Cy_TCPWM_SetInterruptMask(TCPWM_Type *base, uint32_t cntNum, uint32_t mask);
559 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptMask(TCPWM_Type const *base, uint32_t cntNum);
560 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatusMasked(TCPWM_Type const *base, uint32_t cntNum);
561 __STATIC_INLINE void Cy_TCPWM_TriggerStart_Single(TCPWM_Type *base, uint32_t cntNum);
562 __STATIC_INLINE void Cy_TCPWM_TriggerReloadOrIndex_Single(TCPWM_Type *base, uint32_t cntNum);
563 __STATIC_INLINE void Cy_TCPWM_TriggerStopOrKill_Single(TCPWM_Type *base, uint32_t cntNum);
564 __STATIC_INLINE void Cy_TCPWM_TriggerCaptureOrSwap_Single(TCPWM_Type *base, uint32_t cntNum);
565 __STATIC_INLINE void Cy_TCPWM_TriggerCapture0(TCPWM_Type *base, uint32_t cntNum);
566 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined(CY_DOXYGEN)
567 __STATIC_INLINE void Cy_TCPWM_TriggerCapture1(TCPWM_Type *base, uint32_t cntNum);
568 __STATIC_INLINE bool Cy_TCPWM_GetTrigPinLevel (TCPWM_Type const *base, uint32_t cntNum, cy_en_tcpwm_trigselect_t triggerSelect);
569 __STATIC_INLINE void Cy_TCPWM_InputTriggerSetup (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_trigselect_t triggerSelect, uint32_t edgeSelect, uint32_t triggerSignal);
570 __STATIC_INLINE void Cy_TCPWM_OutputTriggerSetup (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_output_trigselect_t trigger0event, cy_en_tcpwm_output_trigselect_t trigger1event);
571 __STATIC_INLINE cy_en_tcpwm_status_t Cy_TCPWM_SetDebugFreeze (TCPWM_Type *base, uint32 cntNum, bool enable);
572 #endif
573 /** \cond INTERNAL */
574 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC0Val(TCPWM_Type const *base, uint32_t cntNum);
575 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC0BufVal(TCPWM_Type const *base, uint32_t cntNum);
576 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCounter(TCPWM_Type const *base, uint32_t cntNum);
577 __STATIC_INLINE void Cy_TCPWM_Block_SetCounter(TCPWM_Type *base, uint32_t cntNum, uint32_t count);
578 __STATIC_INLINE void Cy_TCPWM_Block_SetPeriod(TCPWM_Type *base, uint32_t cntNum, uint32_t period);
579 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetPeriod(TCPWM_Type const *base, uint32_t cntNum);
580 __STATIC_INLINE void Cy_TCPWM_Block_SetCC0BufVal(TCPWM_Type *base, uint32_t cntNum, uint32_t compare1);
581 __STATIC_INLINE void Cy_TCPWM_Block_SetCC0Val(TCPWM_Type *base, uint32_t cntNum, uint32_t compare0);
582 __STATIC_INLINE void Cy_TCPWM_Block_EnableCompare0Swap(TCPWM_Type *base, uint32_t cntNum, bool enable);
583 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
584 __STATIC_INLINE void Cy_TCPWM_Block_EnableCompare1Swap(TCPWM_Type *base, uint32_t cntNum, bool enable);
585 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC1Val(TCPWM_Type const *base, uint32_t cntNum);
586 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC1BufVal(TCPWM_Type const *base, uint32_t cntNum);
587 __STATIC_INLINE void Cy_TCPWM_Block_SetCC1BufVal(TCPWM_Type *base, uint32_t cntNum, uint32_t compareBuf1);
588 __STATIC_INLINE void Cy_TCPWM_Block_SetCC1Val(TCPWM_Type *base, uint32_t cntNum, uint32_t compare1);
589 #endif
590 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
591 __STATIC_INLINE void Cy_TCPWM_Block_EnableSwap(TCPWM_Type *base, uint32_t cntNum, bool enable);
592 __STATIC_INLINE void Cy_TCPWM_InputTriggerSetupWithGF (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_trigselect_t triggerSelect, uint32_t edgeSelect, uint32_t triggerSignal, cy_en_gf_depth_support_value_t dsvalue);
593 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
594
595 /** \endcond */
596
597 /** \cond INTERNAL */
Cy_TCPWM_Block_GetCC0Val(TCPWM_Type const * base,uint32_t cntNum)598 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC0Val(TCPWM_Type const *base, uint32_t cntNum)
599 {
600 uint32_t result;
601
602 #if (CY_IP_MXTCPWM_VERSION == 1U)
603 result = (TCPWM_CNT_CC(base, cntNum));
604 #else
605 result = (TCPWM_GRP_CNT_CC0(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum));
606 #endif
607 return result;
608 }
Cy_TCPWM_Block_GetCC0BufVal(TCPWM_Type const * base,uint32_t cntNum)609 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC0BufVal(TCPWM_Type const *base, uint32_t cntNum)
610 {
611 uint32_t result;
612
613 #if (CY_IP_MXTCPWM_VERSION == 1U)
614 result = (TCPWM_CNT_CC_BUFF(base, cntNum));
615 #else
616 result = (TCPWM_GRP_CNT_CC0_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum));
617 #endif
618
619 return result;
620 }
Cy_TCPWM_Block_GetCounter(TCPWM_Type const * base,uint32_t cntNum)621 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCounter(TCPWM_Type const *base, uint32_t cntNum)
622 {
623 uint32_t result;
624
625 #if (CY_IP_MXTCPWM_VERSION == 1U)
626 result = TCPWM_CNT_COUNTER(base, cntNum);
627 #else
628 result = TCPWM_GRP_CNT_COUNTER(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
629 #endif
630
631 return result;
632 }
Cy_TCPWM_Block_SetCounter(TCPWM_Type * base,uint32_t cntNum,uint32_t count)633 __STATIC_INLINE void Cy_TCPWM_Block_SetCounter(TCPWM_Type *base, uint32_t cntNum, uint32_t count)
634 {
635 #if (CY_IP_MXTCPWM_VERSION == 1U)
636
637 TCPWM_CNT_COUNTER(base, cntNum) = count;
638 #else
639 TCPWM_GRP_CNT_COUNTER(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = count;
640 #endif
641 }
Cy_TCPWM_Block_SetPeriod(TCPWM_Type * base,uint32_t cntNum,uint32_t period)642 __STATIC_INLINE void Cy_TCPWM_Block_SetPeriod(TCPWM_Type *base, uint32_t cntNum, uint32_t period)
643 {
644 #if (CY_IP_MXTCPWM_VERSION == 1U)
645
646 TCPWM_CNT_PERIOD(base, cntNum) = period;
647 #else
648 TCPWM_GRP_CNT_PERIOD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = period;
649 #endif
650 }
Cy_TCPWM_Block_GetPeriod(TCPWM_Type const * base,uint32_t cntNum)651 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetPeriod(TCPWM_Type const *base, uint32_t cntNum)
652 {
653 uint32_t result;
654
655 #if (CY_IP_MXTCPWM_VERSION == 1U)
656
657 result = TCPWM_CNT_PERIOD(base, cntNum);
658 #else
659 result = TCPWM_GRP_CNT_PERIOD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
660 #endif
661 return result;
662 }
Cy_TCPWM_Block_SetCC0BufVal(TCPWM_Type * base,uint32_t cntNum,uint32_t compare1)663 __STATIC_INLINE void Cy_TCPWM_Block_SetCC0BufVal(TCPWM_Type *base, uint32_t cntNum, uint32_t compare1)
664 {
665 #if (CY_IP_MXTCPWM_VERSION == 1U)
666 TCPWM_CNT_CC_BUFF(base, cntNum) = compare1;
667 #else
668 TCPWM_GRP_CNT_CC0_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = compare1;
669 #endif
670 }
Cy_TCPWM_Block_SetCC0Val(TCPWM_Type * base,uint32_t cntNum,uint32_t compare0)671 __STATIC_INLINE void Cy_TCPWM_Block_SetCC0Val(TCPWM_Type *base, uint32_t cntNum, uint32_t compare0)
672 {
673 #if (CY_IP_MXTCPWM_VERSION == 1U)
674 TCPWM_CNT_CC(base, cntNum) = compare0;
675 #else
676 TCPWM_GRP_CNT_CC0(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = compare0;
677 #endif
678 }
Cy_TCPWM_Block_EnableCompare0Swap(TCPWM_Type * base,uint32_t cntNum,bool enable)679 __STATIC_INLINE void Cy_TCPWM_Block_EnableCompare0Swap(TCPWM_Type *base, uint32_t cntNum, bool enable)
680 {
681 #if (CY_IP_MXTCPWM_VERSION == 1U)
682
683 if (enable)
684 {
685 TCPWM_CNT_CTRL(base, cntNum) |= TCPWM_CNT_CTRL_AUTO_RELOAD_CC_Msk;
686 }
687 else
688 {
689 TCPWM_CNT_CTRL(base, cntNum) &= ~TCPWM_CNT_CTRL_AUTO_RELOAD_CC_Msk;
690 }
691 #else
692 if (enable)
693 {
694 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |=
695 TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC0_Msk;
696 }
697 else
698 {
699 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) &=
700 ~TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC0_Msk;
701 }
702 #endif
703 }
704 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
Cy_TCPWM_Block_EnableCompare1Swap(TCPWM_Type * base,uint32_t cntNum,bool enable)705 __STATIC_INLINE void Cy_TCPWM_Block_EnableCompare1Swap(TCPWM_Type *base, uint32_t cntNum, bool enable)
706 {
707 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
708 {
709 if (enable)
710 {
711 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |=
712 TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC1_Msk;
713 }
714 else
715 {
716 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) &=
717 ~TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC1_Msk;
718 }
719 }
720 }
Cy_TCPWM_Block_GetCC1Val(TCPWM_Type const * base,uint32_t cntNum)721 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC1Val(TCPWM_Type const *base, uint32_t cntNum)
722 {
723 uint32_t result = 0UL;
724
725 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
726 {
727 result = TCPWM_GRP_CNT_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
728 }
729
730 return result;
731 }
Cy_TCPWM_Block_GetCC1BufVal(TCPWM_Type const * base,uint32_t cntNum)732 __STATIC_INLINE uint32_t Cy_TCPWM_Block_GetCC1BufVal(TCPWM_Type const *base, uint32_t cntNum)
733 {
734 uint32_t result = 0UL;
735
736 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
737 {
738 result = TCPWM_GRP_CNT_CC1_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
739 }
740
741 return result;
742 }
Cy_TCPWM_Block_SetCC1BufVal(TCPWM_Type * base,uint32_t cntNum,uint32_t compareBuf1)743 __STATIC_INLINE void Cy_TCPWM_Block_SetCC1BufVal(TCPWM_Type *base, uint32_t cntNum, uint32_t compareBuf1)
744 {
745 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
746 {
747 TCPWM_GRP_CNT_CC1_BUFF(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = compareBuf1;
748 }
749 }
Cy_TCPWM_Block_SetCC1Val(TCPWM_Type * base,uint32_t cntNum,uint32_t compare1)750 __STATIC_INLINE void Cy_TCPWM_Block_SetCC1Val(TCPWM_Type *base, uint32_t cntNum, uint32_t compare1)
751 {
752 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
753 {
754 TCPWM_GRP_CNT_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = compare1;
755 }
756 }
757 #endif
758 /** \endcond */
759 #if (CY_IP_MXTCPWM_VERSION == 1U) || defined(CY_DOXYGEN)
760 /*******************************************************************************
761 * Function Name: Cy_TCPWM_Enable_Multiple
762 ****************************************************************************//**
763 *
764 * Enables the counter(s) in the TCPWM block. Multiple blocks can be started
765 * simultaneously.
766 *
767 * \param base
768 * The pointer to a TCPWM instance.
769 *
770 * \param counters
771 * A bit field representing each counter in the TCPWM block.
772 *
773 * \funcusage
774 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_Enable_Multiple
775 *
776 * \note supported only in TCPWM_ver1
777 *
778 *******************************************************************************/
Cy_TCPWM_Enable_Multiple(TCPWM_Type * base,uint32_t counters)779 __STATIC_INLINE void Cy_TCPWM_Enable_Multiple(TCPWM_Type *base, uint32_t counters)
780 {
781 TCPWM_CTRL_SET(base) = counters;
782 }
783
784
785 /*******************************************************************************
786 * Function Name: Cy_TCPWM_Disable_Multiple
787 ****************************************************************************//**
788 *
789 * Disables the counter(s) in the TCPWM block. Multiple TCPWM can be disabled
790 * simultaneously.
791 *
792 * \param base
793 * The pointer to a TCPWM instance.
794 *
795 * \param counters
796 * A bit field representing each counter in the TCPWM block.
797 *
798 * \funcusage
799 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_Disable_Multiple
800 *
801 * \note supported only in TCPWM_ver1
802 *
803 *******************************************************************************/
Cy_TCPWM_Disable_Multiple(TCPWM_Type * base,uint32_t counters)804 __STATIC_INLINE void Cy_TCPWM_Disable_Multiple(TCPWM_Type *base, uint32_t counters)
805 {
806 TCPWM_CTRL_CLR(base) = counters;
807 }
808
809
810 /*******************************************************************************
811 * Function Name: Cy_TCPWM_TriggerStart
812 ****************************************************************************//**
813 *
814 * Triggers a software start on the selected TCPWMs.
815 *
816 * \param base
817 * The pointer to a TCPWM instance.
818 *
819 * \param counters
820 * A bit field representing each counter in the TCPWM block.
821 *
822 * \funcusage
823 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_Enable_Multiple
824 *
825 * \note supported only in TCPWM_ver1
826 *
827 *******************************************************************************/
Cy_TCPWM_TriggerStart(TCPWM_Type * base,uint32_t counters)828 __STATIC_INLINE void Cy_TCPWM_TriggerStart(TCPWM_Type *base, uint32_t counters)
829 {
830 TCPWM_CMD_START(base) = counters;
831 }
832
833
834 /*******************************************************************************
835 * Function Name: Cy_TCPWM_TriggerReloadOrIndex
836 ****************************************************************************//**
837 *
838 * Triggers a software reload event (or index in QuadDec mode).
839 *
840 * \param base
841 * The pointer to a TCPWM instance
842 *
843 * \param counters
844 * A bit field representing each counter in the TCPWM block.
845 *
846 * \funcusage
847 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_TriggerReloadOrIndex
848 *
849 * \note supported only in TCPWM_ver1
850 *
851 *******************************************************************************/
Cy_TCPWM_TriggerReloadOrIndex(TCPWM_Type * base,uint32_t counters)852 __STATIC_INLINE void Cy_TCPWM_TriggerReloadOrIndex(TCPWM_Type *base, uint32_t counters)
853 {
854 TCPWM_CMD_RELOAD(base) = counters;
855 }
856
857
858 /*******************************************************************************
859 * Function Name: Cy_TCPWM_TriggerStopOrKill
860 ****************************************************************************//**
861 *
862 * Triggers a stop in the Timer Counter mode, or a kill in the PWM mode.
863 *
864 * \note The kill trigger behavior for PWM is defined by the
865 * \ref cy_stc_tcpwm_pwm_config_t::killMode field. The pins states after a kill
866 * trigger are defined by \ref cy_stc_tcpwm_pwm_config_t::invertPWMOut and
867 * \ref cy_stc_tcpwm_pwm_config_t::invertPWMOutN fields.
868 *
869 * \param base
870 * The pointer to a TCPWM instance.
871 *
872 * \param counters
873 * A bit field representing each counter in the TCPWM block.
874 *
875 * \funcusage
876 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_TriggerStopOrKill
877 *
878 * \note supported only in TCPWM_ver1
879 *
880 *******************************************************************************/
Cy_TCPWM_TriggerStopOrKill(TCPWM_Type * base,uint32_t counters)881 __STATIC_INLINE void Cy_TCPWM_TriggerStopOrKill(TCPWM_Type *base, uint32_t counters)
882 {
883 TCPWM_CMD_STOP(base) = counters;
884 }
885
886
887 /*******************************************************************************
888 * Function Name: Cy_TCPWM_TriggerCaptureOrSwap
889 ****************************************************************************//**
890 *
891 * Triggers a Capture in the Timer Counter mode, and a Swap in the PWM mode.
892 *
893 * \param base
894 * The pointer to a TCPWM instance.
895 *
896 * \param counters
897 * A bit field representing each counter in the TCPWM block.
898 *
899 * \funcusage
900 * \snippet tcpwm/counter/snippet/main.c snippet_Cy_TCPWM_Counter_Capture
901 *
902 * \note supported only in TCPWM_ver1
903 *
904 *******************************************************************************/
Cy_TCPWM_TriggerCaptureOrSwap(TCPWM_Type * base,uint32_t counters)905 __STATIC_INLINE void Cy_TCPWM_TriggerCaptureOrSwap(TCPWM_Type *base, uint32_t counters)
906 {
907 TCPWM_CMD_CAPTURE(base) = counters;
908 }
909 #endif
910 /*******************************************************************************
911 * Function Name: Cy_TCPWM_Enable_Single
912 ****************************************************************************//**
913 *
914 * Enables specified counter
915 *
916 * \param base
917 * The pointer to a TCPWM instance.
918 *
919 * \param cntNum
920 * The Counter instance number in the selected TCPWM.
921 *
922 *******************************************************************************/
923
Cy_TCPWM_Enable_Single(TCPWM_Type * base,uint32_t cntNum)924 __STATIC_INLINE void Cy_TCPWM_Enable_Single(TCPWM_Type *base, uint32_t cntNum)
925 {
926 #if (CY_IP_MXTCPWM_VERSION == 1U)
927
928 TCPWM_CTRL_SET(base) = (1UL << cntNum);
929 #else
930
931 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |=
932 _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_ENABLED, 1U);
933 #endif
934 }
935
936 /*******************************************************************************
937 * Function Name: Cy_TCPWM_Disable_Single
938 ****************************************************************************//**
939 *
940 * Disable specified counter
941 *
942 * \param base
943 * The pointer to a TCPWM instance.
944 *
945 * \param cntNum
946 * The Counter instance number in the selected TCPWM.
947 *
948 *******************************************************************************/
Cy_TCPWM_Disable_Single(TCPWM_Type * base,uint32_t cntNum)949 __STATIC_INLINE void Cy_TCPWM_Disable_Single(TCPWM_Type *base, uint32_t cntNum)
950 {
951 #if (CY_IP_MXTCPWM_VERSION == 1U)
952 TCPWM_CTRL_CLR(base) = (1UL << cntNum);
953 #else
954 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) &=
955 ~TCPWM_GRP_CNT_V2_CTRL_ENABLED_Msk;
956 #endif
957 }
958
959 /*******************************************************************************
960 * Function Name: Cy_TCPWM_GetInterruptStatus
961 ****************************************************************************//**
962 *
963 * Returns which event triggered the interrupt.
964 *
965 * \param base
966 * The pointer to a TCPWM instance.
967 *
968 * \param cntNum
969 * The Counter instance number in the selected TCPWM.
970 *
971 * \return
972 * See \ref group_tcpwm_interrupt_sources
973 *
974 * \funcusage
975 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_GetInterruptStatus
976 *
977 *******************************************************************************/
Cy_TCPWM_GetInterruptStatus(TCPWM_Type const * base,uint32_t cntNum)978 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatus(TCPWM_Type const *base, uint32_t cntNum)
979 {
980 uint32_t result;
981
982 #if (CY_IP_MXTCPWM_VERSION == 1U)
983
984 result = TCPWM_CNT_INTR(base, cntNum);
985 #else
986 result = TCPWM_GRP_CNT_INTR(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
987 #endif
988
989 return result;
990 }
991
992
993 /*******************************************************************************
994 * Function Name: Cy_TCPWM_ClearInterrupt
995 ****************************************************************************//**
996 *
997 * Clears Active Interrupt Source
998 *
999 * \param base
1000 * The pointer to a TCPWM instance.
1001 *
1002 * \param cntNum
1003 * The Counter instance number in the selected TCPWM.
1004 *
1005 * \param source
1006 * source to clear. See \ref group_tcpwm_interrupt_sources
1007 *
1008 * \funcusage
1009 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_GetInterruptStatusMasked
1010 *
1011 *******************************************************************************/
Cy_TCPWM_ClearInterrupt(TCPWM_Type * base,uint32_t cntNum,uint32_t source)1012 __STATIC_INLINE void Cy_TCPWM_ClearInterrupt(TCPWM_Type *base, uint32_t cntNum, uint32_t source)
1013 {
1014 #if (CY_IP_MXTCPWM_VERSION == 1U)
1015
1016 TCPWM_CNT_INTR(base, cntNum) = source;
1017 (void)TCPWM_CNT_INTR(base, cntNum);
1018 #else
1019 TCPWM_GRP_CNT_INTR(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = source;
1020 (void)TCPWM_GRP_CNT_INTR(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1021 #endif
1022 }
1023
1024
1025 /*******************************************************************************
1026 * Function Name: Cy_TCPWM_SetInterrupt
1027 ****************************************************************************//**
1028 *
1029 * Triggers an interrupt via a software write.
1030 *
1031 * \param base
1032 * The pointer to a TCPWM instance.
1033 *
1034 * \param cntNum
1035 * The Counter instance number in the selected TCPWM.
1036 *
1037 * \param source
1038 * The source to set an interrupt. See \ref group_tcpwm_interrupt_sources.
1039 *
1040 * \funcusage
1041 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_SetInterrupt
1042 *
1043 *******************************************************************************/
Cy_TCPWM_SetInterrupt(TCPWM_Type * base,uint32_t cntNum,uint32_t source)1044 __STATIC_INLINE void Cy_TCPWM_SetInterrupt(TCPWM_Type *base, uint32_t cntNum, uint32_t source)
1045 {
1046 #if (CY_IP_MXTCPWM_VERSION == 1U)
1047
1048 TCPWM_CNT_INTR_SET(base, cntNum) = source;
1049 #else
1050 TCPWM_GRP_CNT_INTR_SET(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = source;
1051 #endif
1052 }
1053
1054
1055 /*******************************************************************************
1056 * Function Name: Cy_TCPWM_SetInterruptMask
1057 ****************************************************************************//**
1058 *
1059 * Sets an interrupt mask. A 1 means that when the event occurs, it will cause an
1060 * interrupt; a 0 means no interrupt will be triggered.
1061 *
1062 * \param base
1063 * The pointer to a TCPWM instance.
1064 *
1065 * \param cntNum
1066 * The Counter instance number in the selected TCPWM.
1067 *
1068 * \param mask
1069 *. See \ref group_tcpwm_interrupt_sources
1070 *
1071 * \funcusage
1072 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_SetInterruptMask
1073 *
1074 *******************************************************************************/
Cy_TCPWM_SetInterruptMask(TCPWM_Type * base,uint32_t cntNum,uint32_t mask)1075 __STATIC_INLINE void Cy_TCPWM_SetInterruptMask(TCPWM_Type *base, uint32_t cntNum, uint32_t mask)
1076 {
1077 #if (CY_IP_MXTCPWM_VERSION == 1U)
1078
1079 TCPWM_CNT_INTR_MASK(base, cntNum) = mask;
1080 #else
1081 TCPWM_GRP_CNT_INTR_MASK(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) = mask;
1082 #endif
1083 }
1084
1085
1086 /*******************************************************************************
1087 * Function Name: Cy_TCPWM_GetInterruptMask
1088 ****************************************************************************//**
1089 *
1090 * Returns the interrupt mask.
1091 *
1092 * \param base
1093 * The pointer to a TCPWM instance.
1094 *
1095 * \param cntNum
1096 * The Counter instance number in the selected TCPWM.
1097 *
1098 * \return
1099 * Interrupt Mask. See \ref group_tcpwm_interrupt_sources
1100 *
1101 * \funcusage
1102 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_SetInterruptMask
1103 *
1104 *******************************************************************************/
Cy_TCPWM_GetInterruptMask(TCPWM_Type const * base,uint32_t cntNum)1105 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptMask(TCPWM_Type const *base, uint32_t cntNum)
1106 {
1107 uint32_t mask;
1108
1109 #if (CY_IP_MXTCPWM_VERSION == 1U)
1110
1111 mask = TCPWM_CNT_INTR_MASK(base, cntNum);
1112 #else
1113 mask = TCPWM_GRP_CNT_INTR_MASK(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1114 #endif
1115
1116 return mask;
1117 }
1118
1119
1120 /*******************************************************************************
1121 * Function Name: Cy_TCPWM_GetInterruptStatusMasked
1122 ****************************************************************************//**
1123 *
1124 * Returns which masked interrupt triggered the interrupt.
1125 *
1126 * \param base
1127 * The pointer to a TCPWM instance.
1128 *
1129 * \param cntNum
1130 * The Counter instance number in the selected TCPWM.
1131 *
1132 * \return
1133 * Interrupt Mask. See \ref group_tcpwm_interrupt_sources
1134 *
1135 * \funcusage
1136 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_GetInterruptStatusMasked
1137 *
1138 *******************************************************************************/
Cy_TCPWM_GetInterruptStatusMasked(TCPWM_Type const * base,uint32_t cntNum)1139 __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatusMasked(TCPWM_Type const *base, uint32_t cntNum)
1140 {
1141 uint32_t status;
1142
1143 #if (CY_IP_MXTCPWM_VERSION == 1U)
1144
1145 status = TCPWM_CNT_INTR_MASKED(base, cntNum);
1146 #else
1147 status = TCPWM_GRP_CNT_INTR_MASKED(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1148 #endif
1149
1150 return status;
1151 }
1152
1153
1154 /*******************************************************************************
1155 * Function Name: Cy_TCPWM_TriggerStart_Single
1156 ****************************************************************************//**
1157 *
1158 * Triggers a software start on the selected TCPWM.
1159 *
1160 * \param base
1161 * The pointer to a TCPWM instance.
1162 *
1163 * \param cntNum
1164 * The Counter instance number in the selected TCPWM.
1165 *
1166 * \funcusage
1167 * \snippet tcpwm/shiftreg/snippet/main.c snippet_Cy_TCPWM_ShiftReg_Start
1168 *
1169 *******************************************************************************/
Cy_TCPWM_TriggerStart_Single(TCPWM_Type * base,uint32_t cntNum)1170 __STATIC_INLINE void Cy_TCPWM_TriggerStart_Single(TCPWM_Type *base, uint32_t cntNum)
1171 {
1172 #if (CY_IP_MXTCPWM_VERSION == 1U)
1173
1174 TCPWM_CMD_START(base) = (1UL << cntNum);
1175 #else
1176 TCPWM_GRP_CNT_TR_CMD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) =
1177 TCPWM_GRP_CNT_V2_TR_CMD_START_Msk;
1178 #endif
1179 }
1180
1181
1182 /*******************************************************************************
1183 * Function Name: Cy_TCPWM_TriggerReloadOrIndex_Single
1184 ****************************************************************************//**
1185 *
1186 * Triggers a software reload event (or index 0 in QuadDec mode) on selected TCPWM.
1187 *
1188 * \param base
1189 * The pointer to a TCPWM instance.
1190 *
1191 * \param cntNum
1192 * The Counter instance number in the selected TCPWM.
1193 *
1194 *******************************************************************************/
Cy_TCPWM_TriggerReloadOrIndex_Single(TCPWM_Type * base,uint32_t cntNum)1195 __STATIC_INLINE void Cy_TCPWM_TriggerReloadOrIndex_Single(TCPWM_Type *base, uint32_t cntNum)
1196 {
1197 #if (CY_IP_MXTCPWM_VERSION == 1U)
1198
1199 TCPWM_CMD_RELOAD(base) = (1UL << cntNum);
1200 #else
1201 TCPWM_GRP_CNT_TR_CMD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) =
1202 TCPWM_GRP_CNT_V2_TR_CMD_RELOAD_Msk;
1203 #endif
1204 }
1205
1206
1207 /*******************************************************************************
1208 * Function Name: Cy_TCPWM_TriggerStopOrKill_Single
1209 ****************************************************************************//**
1210 *
1211 * Triggers a stop in the Timer Counter mode, or a kill in the PWM mode on
1212 * selected TCPWM.
1213 *
1214 * \note The kill trigger behavior for PWM is defined by the
1215 * \ref cy_stc_tcpwm_pwm_config_t::killMode field. The pins states after a kill
1216 * trigger are defined by \ref cy_stc_tcpwm_pwm_config_t::invertPWMOut and
1217 * \ref cy_stc_tcpwm_pwm_config_t::invertPWMOutN fields.
1218 *
1219 * \param base
1220 * The pointer to a TCPWM instance.
1221 *
1222 * \param cntNum
1223 * The Counter instance number in the selected TCPWM.
1224 *
1225 *******************************************************************************/
Cy_TCPWM_TriggerStopOrKill_Single(TCPWM_Type * base,uint32_t cntNum)1226 __STATIC_INLINE void Cy_TCPWM_TriggerStopOrKill_Single(TCPWM_Type *base, uint32_t cntNum)
1227 {
1228 #if (CY_IP_MXTCPWM_VERSION == 1U)
1229
1230 TCPWM_CMD_STOP(base) = (1UL << cntNum);
1231 #else
1232 TCPWM_GRP_CNT_TR_CMD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) =
1233 TCPWM_GRP_CNT_V2_TR_CMD_STOP_Msk;
1234 #endif
1235 }
1236
1237
1238 /*******************************************************************************
1239 * Function Name: Cy_TCPWM_TriggerCaptureOrSwap_Single
1240 ****************************************************************************//**
1241 *
1242 * Triggers a Capture 0 in the Timer Counter mode, and a Swap in the PWM mode on
1243 * selected TCPWM.
1244 *
1245 * \param base
1246 * The pointer to a TCPWM instance.
1247 *
1248 * \param cntNum
1249 * The Counter instance number in the selected TCPWM.
1250 *
1251 *******************************************************************************/
Cy_TCPWM_TriggerCaptureOrSwap_Single(TCPWM_Type * base,uint32_t cntNum)1252 __STATIC_INLINE void Cy_TCPWM_TriggerCaptureOrSwap_Single(TCPWM_Type *base, uint32_t cntNum)
1253 {
1254 #if (CY_IP_MXTCPWM_VERSION == 1U)
1255
1256 TCPWM_CMD_CAPTURE(base) = (1UL << cntNum);
1257 #else
1258 TCPWM_GRP_CNT_TR_CMD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) =
1259 TCPWM_GRP_CNT_V2_TR_CMD_CAPTURE0_Msk;
1260 #endif
1261 }
1262
1263 /*******************************************************************************
1264 * Function Name: Cy_TCPWM_TriggerCapture0
1265 ****************************************************************************//**
1266 *
1267 * Triggers a Capture 0 on the selected counter.
1268 *
1269 * \param base
1270 * The pointer to a TCPWM instance.
1271 *
1272 * \param cntNum
1273 * The Counter instance number in the selected TCPWM.
1274 *
1275 *******************************************************************************/
Cy_TCPWM_TriggerCapture0(TCPWM_Type * base,uint32_t cntNum)1276 __STATIC_INLINE void Cy_TCPWM_TriggerCapture0(TCPWM_Type *base, uint32_t cntNum)
1277 {
1278 Cy_TCPWM_TriggerCaptureOrSwap_Single(base, cntNum);
1279 }
1280
1281 #if (CY_IP_MXTCPWM_VERSION >= 2U) || defined (CY_DOXYGEN)
1282 /*******************************************************************************
1283 * Function Name: Cy_TCPWM_TriggerCapture1
1284 ****************************************************************************//**
1285 *
1286 * Triggers a Capture 1 in Timer Counter and QuadDec Mode. In PWM mode this acts
1287 * as a second kill input.
1288 *
1289 * \param base
1290 * The pointer to a TCPWM instance.
1291 *
1292 * \param cntNum
1293 * The Counter instance number in the selected TCPWM.
1294 *
1295 *******************************************************************************/
Cy_TCPWM_TriggerCapture1(TCPWM_Type * base,uint32_t cntNum)1296 __STATIC_INLINE void Cy_TCPWM_TriggerCapture1(TCPWM_Type *base, uint32_t cntNum)
1297 {
1298 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
1299 {
1300 TCPWM_GRP_CNT_TR_CMD(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) =
1301 TCPWM_GRP_CNT_V2_TR_CMD_CAPTURE1_Msk;
1302 }
1303 else
1304 {
1305 /* Function is not supported for TCPWM_ver1 block */
1306 CY_ASSERT_L1(false);
1307 }
1308 }
1309
1310
1311 /*******************************************************************************
1312 * Function Name: Cy_TCPWM_GetTrigPinLevel
1313 ****************************************************************************//**
1314 *
1315 * Returns the current level of the selected input trigger.
1316 *
1317 * \param base
1318 * The pointer to a TCPWM instance.
1319 *
1320 * \param cntNum
1321 * The Counter instance number in the selected TCPWM.
1322 *
1323 * \param triggerSelect
1324 * Defines which trigger status is being checked, Start, Reload, Stop/Kill, Count, Capture 0 or Capture 1
1325 *
1326 * \return
1327 * The trigger level
1328 *
1329 * \funcusage
1330 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_GetTrigPinLevel
1331 *
1332 *******************************************************************************/
Cy_TCPWM_GetTrigPinLevel(TCPWM_Type const * base,uint32_t cntNum,cy_en_tcpwm_trigselect_t triggerSelect)1333 __STATIC_INLINE bool Cy_TCPWM_GetTrigPinLevel (TCPWM_Type const *base, uint32_t cntNum, cy_en_tcpwm_trigselect_t triggerSelect)
1334
1335 {
1336 uint32_t status = 0UL;
1337
1338 status = TCPWM_GRP_CNT_STATUS(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum);
1339
1340 switch(triggerSelect)
1341 {
1342 case CY_TCPWM_INPUT_TR_START:
1343 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_START, status);
1344 break;
1345 case CY_TCPWM_INPUT_TR_RELOAD_OR_INDEX:
1346 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_RELOAD, status);
1347 break;
1348 case CY_TCPWM_INPUT_TR_STOP_OR_KILL:
1349 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_RELOAD, status);
1350 break;
1351 case CY_TCPWM_INPUT_TR_COUNT:
1352 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_STOP, status);
1353 break;
1354 case CY_TCPWM_INPUT_TR_CAPTURE0:
1355 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_CAPTURE0, status);
1356 break;
1357 case CY_TCPWM_INPUT_TR_CAPTURE1:
1358 status = _FLD2VAL(TCPWM_GRP_CNT_V2_STATUS_TR_CAPTURE1, status);
1359 break;
1360 default:
1361 /* Not a valid input trigger */
1362 CY_ASSERT_L3(false);
1363 break;
1364 }
1365
1366
1367 return (status != 0UL);
1368 }
1369
1370 /*******************************************************************************
1371 * Function Name: Cy_TCPWM_InputTriggerSetup
1372 ****************************************************************************//**
1373 *
1374 * Sets up a trigger input signal for a specific TCPWM counter. This API is used to
1375 * handle software triggering of multiple counters synchronously.
1376 *
1377 * \param base
1378 * The pointer to a TCPWM instance.
1379 *
1380 * \param cntNum
1381 * The Counter instance number in the selected TCPWM.
1382 *
1383 * \param triggerSelect
1384 * Defines which trigger is being setup, Start, Reload, Stop/Kill, Count, Capture 0 or Capture 1
1385 * see cy_en_tcpwm_trigselect_t
1386 *
1387 * \param edgeSelect
1388 * Sets the trigger edge detection, Rising, Falling, Both, No edge detect. see \ref group_tcpwm_input_modes
1389 *
1390 * \param triggerSignal
1391 * Selects what trigger signal is connected to the selected input trigger.
1392 *
1393 * \note
1394 * Trigger signal for general purpose trigger is calculated as below.
1395 * CY_TCPWM_INPUT_TRIG(n) = (n + TCPWM_TR_ONE_CNT_NR + 2U)
1396 * For devices with more than one instance of TCPWM
1397 * CY_TCPWM_INPUT_TRIG_WITH_INST(n, m) is used where m is the TCPWM instance number.
1398 *
1399 * \funcusage
1400 * \snippet tcpwm/pwm/snippet/main.c snippet_Cy_TCPWM_InputTriggerSetup
1401 *
1402 *******************************************************************************/
Cy_TCPWM_InputTriggerSetup(TCPWM_Type * base,uint32 cntNum,cy_en_tcpwm_trigselect_t triggerSelect,uint32_t edgeSelect,uint32_t triggerSignal)1403 __STATIC_INLINE void Cy_TCPWM_InputTriggerSetup (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_trigselect_t triggerSelect, uint32_t edgeSelect, uint32_t triggerSignal)
1404 {
1405 uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
1406
1407 switch(triggerSelect)
1408 {
1409 case CY_TCPWM_INPUT_TR_START:
1410 /* Clear input trigger settings first */
1411 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL1_START_SEL_Msk;
1412 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_START_EDGE_Msk;
1413
1414 /* Write new settings */
1415 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL1_START_SEL, triggerSignal);
1416 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_START_EDGE, edgeSelect);
1417 break;
1418 case CY_TCPWM_INPUT_TR_RELOAD_OR_INDEX:
1419 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL0_RELOAD_SEL_Msk;
1420 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_RELOAD_EDGE_Msk;
1421
1422 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_RELOAD_SEL, triggerSignal);
1423 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_RELOAD_EDGE, edgeSelect);
1424 break;
1425 case CY_TCPWM_INPUT_TR_STOP_OR_KILL:
1426 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL0_STOP_SEL_Msk;
1427 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_STOP_EDGE_Msk;
1428
1429 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_STOP_SEL, triggerSignal);
1430 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_STOP_EDGE, edgeSelect);
1431 break;
1432 case CY_TCPWM_INPUT_TR_COUNT:
1433 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL0_COUNT_SEL_Msk;
1434 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_COUNT_EDGE_Msk;
1435
1436 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_COUNT_SEL, triggerSignal);
1437 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_COUNT_EDGE, edgeSelect);
1438 break;
1439 case CY_TCPWM_INPUT_TR_CAPTURE0:
1440 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL0_CAPTURE0_SEL_Msk;
1441 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_CAPTURE0_EDGE_Msk;
1442
1443 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_CAPTURE0_SEL, triggerSignal);
1444 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_CAPTURE0_EDGE, edgeSelect);
1445 break;
1446 case CY_TCPWM_INPUT_TR_CAPTURE1:
1447 if (TCPWM_GRP_CC1(base, grp))
1448 {
1449 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_SEL1_CAPTURE1_SEL_Msk;
1450 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) &= ~TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_CAPTURE1_EDGE_Msk;
1451
1452 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL1_CAPTURE1_SEL, triggerSignal);
1453 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_CAPTURE1_EDGE, edgeSelect);
1454 }
1455 else
1456 {
1457 /* Capture 1 - Not supported for the group */
1458 CY_ASSERT_L3(false);
1459 }
1460 break;
1461 default:
1462 /* Not a valid input trigger */
1463 CY_ASSERT_L3(false);
1464 break;
1465 }
1466
1467 }
1468
1469
1470 /*******************************************************************************
1471 * Function Name: Cy_TCPWM_OutputTriggerSetup
1472 ****************************************************************************//**
1473 *
1474 * Sets up a trigger output signal for a specific TCPWM counter event.
1475 *
1476 * \param base
1477 * The pointer to a TCPWM instance.
1478 *
1479 * \param cntNum
1480 * The Counter instance number in the selected TCPWM.
1481 *
1482 * \param trigger0event
1483 * Selects internal events for output trigger out0 generation. see \ref cy_en_tcpwm_output_trigselect_t
1484 *
1485 * \param trigger1event
1486 * Selects internal events for output trigger out1 generation. see \ref cy_en_tcpwm_output_trigselect_t
1487 *
1488 *
1489 *******************************************************************************/
Cy_TCPWM_OutputTriggerSetup(TCPWM_Type * base,uint32 cntNum,cy_en_tcpwm_output_trigselect_t trigger0event,cy_en_tcpwm_output_trigselect_t trigger1event)1490 __STATIC_INLINE void Cy_TCPWM_OutputTriggerSetup (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_output_trigselect_t trigger0event, cy_en_tcpwm_output_trigselect_t trigger1event)
1491 {
1492 uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
1493
1494 TCPWM_GRP_CNT_TR_OUT_SEL(base, grp, cntNum) =
1495 (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_OUT_SEL_OUT0, trigger0event) |
1496 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_OUT_SEL_OUT1, trigger1event));
1497
1498 }
1499
1500 /*******************************************************************************
1501 * Function Name: Cy_TCPWM_SetDebugFreeze
1502 ****************************************************************************//**
1503 *
1504 * Enables/disables the Debug Freeze feature for the specified counter.
1505 *
1506 * \param base
1507 * The pointer to a TCPWM instance.
1508 *
1509 * \param cntNum
1510 * The Counter instance number in the selected TCPWM.
1511 *
1512 * \param enable
1513 * true: The Debug Free feature is enabled
1514 * false: The Debug Freeze feature is disabled
1515 *
1516 * \return
1517 * Error / Status code. See cy_en_tcpwm_status_t.
1518 *
1519 * \funcusage
1520 * \snippet tcpwm/counter/snippet/main.c snippet_Cy_TCPWM_SetDebugFreeze
1521 *
1522 *******************************************************************************/
Cy_TCPWM_SetDebugFreeze(TCPWM_Type * base,uint32 cntNum,bool enable)1523 __STATIC_INLINE cy_en_tcpwm_status_t Cy_TCPWM_SetDebugFreeze (TCPWM_Type *base, uint32 cntNum, bool enable)
1524 {
1525
1526 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |= (enable ? TCPWM_GRP_CNT_V2_CTRL_DBG_FREEZE_EN_Msk : 0UL);
1527
1528 return CY_TCPWM_SUCCESS;
1529 }
1530 #endif
1531
1532 #if (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN)
1533 /*******************************************************************************
1534 * Function Name: Cy_TCPWM_Block_EnableSwap
1535 ****************************************************************************//**
1536 *
1537 * Enables/disables swapping mechanism between CC0 and buffered CC0, CC1 and buffered CC1, PERIOD and buffered PERIOD, DT and buffered DT.
1538 *
1539 * \param base
1540 * The pointer to a TCPWM instance.
1541 *
1542 * \param cntNum
1543 * The Counter instance number in the selected TCPWM.
1544 *
1545 * \param enable
1546 * true: Swapping mechanism is enabled
1547 * false: Swapping mechanism is disabled
1548 *
1549 *
1550 *******************************************************************************/
Cy_TCPWM_Block_EnableSwap(TCPWM_Type * base,uint32_t cntNum,bool enable)1551 __STATIC_INLINE void Cy_TCPWM_Block_EnableSwap(TCPWM_Type *base, uint32_t cntNum, bool enable)
1552 {
1553 if (TCPWM_GRP_CC1(base, TCPWM_GRP_CNT_GET_GRP(cntNum)))
1554 {
1555 if (enable)
1556 {
1557 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) |=
1558 TCPWM_GRP_CNT_V3_CTRL_SWAP_ENABLED_Msk;
1559 }
1560 else
1561 {
1562 TCPWM_GRP_CNT_CTRL(base, TCPWM_GRP_CNT_GET_GRP(cntNum), cntNum) &=
1563 ~TCPWM_GRP_CNT_V3_CTRL_SWAP_ENABLED_Msk;
1564 }
1565 }
1566 }
1567
1568
1569 /*******************************************************************************
1570 * Function Name: Cy_TCPWM_InputTriggerSetupWithGF
1571 ****************************************************************************//**
1572 *
1573 * Sets up a trigger input signal for a specific TCPWM counter and
1574 * Glitch filter configuration for that trigger. This API is used to
1575 * handle software triggering of multiple counters synchronously.
1576 *
1577 * \param base
1578 * The pointer to a TCPWM instance.
1579 *
1580 * \param cntNum
1581 * The Counter instance number in the selected TCPWM.
1582 *
1583 * \param triggerSelect
1584 * Defines which trigger is being setup, Start, Reload, Stop/Kill, Count, Capture 0 or Capture 1
1585 * see cy_en_tcpwm_trigselect_t
1586 *
1587 * \param edgeSelect
1588 * Sets the trigger edge detection, Rising, Falling, Both, No edge detect. see \ref group_tcpwm_input_modes
1589 *
1590 * \param triggerSignal
1591 * Selects what trigger signal is connected to the selected input trigger.
1592 *
1593 * \param dsvalue
1594 * Glitch filter depth. \ref cy_en_gf_depth_support_value_t
1595 *
1596 *
1597 *******************************************************************************/
1598
Cy_TCPWM_InputTriggerSetupWithGF(TCPWM_Type * base,uint32 cntNum,cy_en_tcpwm_trigselect_t triggerSelect,uint32_t edgeSelect,uint32_t triggerSignal,cy_en_gf_depth_support_value_t dsvalue)1599 __STATIC_INLINE void Cy_TCPWM_InputTriggerSetupWithGF (TCPWM_Type *base, uint32 cntNum, cy_en_tcpwm_trigselect_t triggerSelect, uint32_t edgeSelect, uint32_t triggerSignal, cy_en_gf_depth_support_value_t dsvalue)
1600 {
1601 uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
1602 uint32_t prescalar = 0U;
1603 uint32_t depth = 7U;
1604 if (dsvalue <= CY_GLITCH_FILTER_DEPTH_SUPPORT_VALUE_64)
1605 {
1606 depth = (uint32_t)dsvalue;
1607 }
1608 else
1609 {
1610 prescalar = (uint32_t)dsvalue - depth;
1611 }
1612 /* Trigger signal for general purpose trigger is calculated as below.
1613 CY_TCPWM_INPUT_TRIG(n) = (n + TCPWM_TR_ONE_CNT_NR + 2U)
1614 TCPWM_TR_ONE_CNT_NR is the max one to one triggers.
1615 */
1616 if((triggerSignal - 2U) <= TCPWM_TR_ONE_CNT_NR)
1617 {
1618 uint32_t onetoone_gf = triggerSignal - 2U;
1619 /* Based on the number of one to one glitch filters available,
1620 only those corresponding one to one triggers can be connected to the one to one glitch filters */
1621 if(onetoone_gf <= TCPWM_GRP_NR0_CNT_TR_ONE_GF_NR)
1622 {
1623 TCPWM_GRP_CNT_ONE_GF(base, grp, cntNum, onetoone_gf) = (_VAL2FLD(TCPWM_GRP_CNT_V3_ONE_GF_GF_DEPTH, depth) |
1624 _VAL2FLD(TCPWM_GRP_CNT_V3_ONE_GF_GFPS_DIV, prescalar));
1625 }
1626 }
1627 else
1628 {
1629 uint32_t gfNum = triggerSignal - 2U - TCPWM_TR_ONE_CNT_NR;
1630 /* Based on the number of general purpose glitch filters available,
1631 only those corresponding general purpose triggers can be connected to the general purpose glitch filters */
1632 if(gfNum <= TCPWM_TR_ALL_GF_TR_ALL_GF_NR)
1633 {
1634 TCPWM_GF_FOR_GROUP_TRIGGER(base, gfNum) = (_VAL2FLD(TCPWM_TR_ALL_GF_ALL_GF_GF_DEPTH, depth) |
1635 _VAL2FLD(TCPWM_TR_ALL_GF_ALL_GF_GFPS_DIV, prescalar));
1636 }
1637 }
1638
1639 Cy_TCPWM_InputTriggerSetup (base,cntNum,triggerSelect,edgeSelect,triggerSignal);
1640
1641 }
1642
1643 #endif /* (CY_IP_MXTCPWM_VERSION >= 3U) || defined (CY_DOXYGEN) */
1644
1645 /** \} group_tcpwm_functions_common */
1646
1647 /** \} group_tcpwm_common */
1648
1649 /*******************************************************************************
1650 * Backward compatibility macro. The following code is DEPRECATED and must
1651 * not be used in new projects
1652 *******************************************************************************/
1653 #define CY_TCPWM_INT_ON_CC CY_TCPWM_INT_ON_CC0
1654 #define CY_TCPWM_INT_ON_CC_OR_TC CY_TCPWM_INT_ON_CC0_OR_TC
1655
1656 #if defined(__cplusplus)
1657 }
1658 #endif
1659
1660 #endif /* CY_IP_MXTCPWM */
1661
1662 #endif /* CY_TCPWM_H */
1663
1664 /* [] END OF FILE */
1665
