CY_SYSCLK_FLL_CCO_RANGE1 (reference) in projects: hal_infineon-3.6.0

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Searched refs:CY_SYSCLK_FLL_CCO_RANGE1 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
D	cy_sysclk.c	`1424 ((range) == CY_SYSCLK_FLL_CCO_RANGE1) \|\| \ 1496 … ((ccoFreq >= 63855600UL) ? CY_SYSCLK_FLL_CCO_RANGE1 : CY_SYSCLK_FLL_CCO_RANGE0)))); in Cy_SysClk_FllConfigure()`
D	cy_sysclk_v2.c	`2809 ((range) == CY_SYSCLK_FLL_CCO_RANGE1) \|\| \ 2916 … ((ccoFreq >= 63855600UL) ? CY_SYSCLK_FLL_CCO_RANGE1 : CY_SYSCLK_FLL_CCO_RANGE0)))); in Cy_SysClk_FllConfigure()`
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
D	cy_sysclk.h	`1741 CY_SYSCLK_FLL_CCO_RANGE1, /*< Target frequency is in range 64 - 85 MHz / enumerator`

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