Searched refs:CY_SCB_SPI_CPHA0_CPOL0 (Results 1 – 2 of 2) sorted by relevance
366 CY_SCB_SPI_CPHA0_CPOL0 = 0U, /**< Clock is active low, data is changed on first edge */ enumerator895 #define CY_SCB_SPI_IS_SCLK_MODE_VALID(clkMode) ( (CY_SCB_SPI_CPHA0_CPOL0 == (clkMode)) || \1566 retVal = (uint32_t) CY_SCB_SPI_CPHA0_CPOL0; in CY_SCB_SPI_GetSclkMode()
93 .sclkMode = CY_SCB_SPI_CPHA0_CPOL0,406 return (CY_SCB_SPI_CPHA0_CPOL0); in _cyhal_convert_mode_sclk()