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Searched refs:CPUSS_CM7_1_DCACHE_SIZE (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h2082 #define CPUSS_CM7_1_DCACHE_SIZE 16u macro
Dxmc7200_config.h2664 #define CPUSS_CM7_1_DCACHE_SIZE 16u macro