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Searched refs:CLK_DPLL_LP (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h792 #define SRSS_CLK_DPLL_LP_CONFIG(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG)
793 #define SRSS_CLK_DPLL_LP_CONFIG2(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG2)
794 #define SRSS_CLK_DPLL_LP_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG3)
795 #define SRSS_CLK_DPLL_LP_CONFIG4(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG4)
796 #define SRSS_CLK_DPLL_LP_CONFIG5(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG5)
797 #define SRSS_CLK_DPLL_LP_CONFIG6(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG6)
798 #define SRSS_CLK_DPLL_LP_CONFIG7(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG7)
799 #define SRSS_CLK_DPLL_LP_STATUS(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].STATUS)
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_srss.h281 CLK_DPLL_LP_Type CLK_DPLL_LP[15]; /*!< 0x00001A00 DPLL LP Configuration Register */ member