width (reference) in projects: hal_infineon-3.5.0

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Searched refs:width (Results 1 – 25 of 30) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/source/
D	cy_crypto_core_crc_v1.c	202 uint32_t width, in Cy_Crypto_Core_V1_Crc_CalcInit() argument 210 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V1_Crc_CalcInit() 227 …int32_t)(_VAL2FLD(CRYPTO_CRC_POL_CTL_POLYNOMIAL, polynomial << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V1_Crc_CalcInit() 232 … (uint32_t)(_VAL2FLD(CRYPTO_CRC_REM_CTL_REM_XOR, remXor << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V1_Crc_CalcInit() 236 …int32_t)(_VAL2FLD(CRYPTO_CRC_LFSR_CTL_LFSR32, lfsrInitState << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V1_Crc_CalcInit() 260 cy_en_crypto_status_t Cy_Crypto_Core_V1_Crc_CalcStart(CRYPTO_Type base, uint32_t width, uint32_t … in Cy_Crypto_Core_V1_Crc_CalcStart() argument 262 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V1_Crc_CalcStart() 266 …int32_t)(_VAL2FLD(CRYPTO_CRC_LFSR_CTL_LFSR32, lfsrInitState << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V1_Crc_CalcStart() 336 cy_en_crypto_status_t Cy_Crypto_Core_V1_Crc_CalcFinish(CRYPTO_Type base, uint32_t width, uint32_t … in Cy_Crypto_Core_V1_Crc_CalcFinish() argument 338 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V1_Crc_CalcFinish() [all …]
D	cy_crypto_core_crc_v2.c	197 uint32_t width, in Cy_Crypto_Core_V2_Crc_CalcInit() argument 205 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V2_Crc_CalcInit() 221 …32_t)(_VAL2FLD(CRYPTO_V2_CRC_POL_CTL_POLYNOMIAL, polynomial << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V2_Crc_CalcInit() 226 … (uint32_t)(_VAL2FLD(CRYPTO_V2_CRC_REM_CTL_REM_XOR, remXor << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V2_Crc_CalcInit() 230 … (uint32_t)(_VAL2FLD(CRYPTO_V2_RESULT_DATA, lfsrInitState << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V2_Crc_CalcInit() 254 cy_en_crypto_status_t Cy_Crypto_Core_V2_Crc_CalcStart(CRYPTO_Type base, uint32_t width, uint32_t … in Cy_Crypto_Core_V2_Crc_CalcStart() argument 256 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V2_Crc_CalcStart() 259 … = (uint32_t)(_VAL2FLD(CRYPTO_V2_RESULT_DATA, lfsrInitState << (CY_CRYPTO_HW_REGS_WIDTH - width))); in Cy_Crypto_Core_V2_Crc_CalcStart() 326 cy_en_crypto_status_t Cy_Crypto_Core_V2_Crc_CalcFinish(CRYPTO_Type base, uint32_t width, uint32_t … in Cy_Crypto_Core_V2_Crc_CalcFinish() argument 328 CY_ASSERT_L1((width >= 1U) && (width <= CY_CRYPTO_HW_REGS_WIDTH)); in Cy_Crypto_Core_V2_Crc_CalcFinish() [all …]
D	cy_sd_host.c	290 #define CY_SD_HOST_IS_SD_BUS_WIDTH_VALID(width) ((CY_SD_HOST_BUS_WIDTH_1_BIT == (width)) \|\|… argument 291 (CY_SD_HOST_BUS_WIDTH_4_BIT == (width))) 293 #define CY_SD_HOST_IS_EMMC_BUS_WIDTH_VALID(width) ((CY_SD_HOST_BUS_WIDTH_1_BIT == (width)) \|\|… argument 294 … (CY_SD_HOST_BUS_WIDTH_4_BIT == (width)) \|\| \ 295 (CY_SD_HOST_BUS_WIDTH_8_BIT == (width))) 297 #define CY_SD_HOST_IS_BUS_WIDTH_VALID(width, cardType) ((CY_SD_HOST_EMMC == (cardType)) ? \ argument 298 … CY_SD_HOST_IS_EMMC_BUS_WIDTH_VALID(width) : \ 299 CY_SD_HOST_IS_SD_BUS_WIDTH_VALID(width)) 1809 cy_en_sd_host_bus_width_t width, in Cy_SD_Host_SetBusWidth() argument 1819 switch (width) in Cy_SD_Host_SetBusWidth() [all …]
/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/include/
D	cy_crypto_core_crc.h	281 uint32_t width, in Cy_Crypto_Core_Crc_CalcInit() argument 294 tmpResult = Cy_Crypto_Core_V1_Crc_CalcInit(base, width, polynomial, dataReverse, dataXor, in Cy_Crypto_Core_Crc_CalcInit() 301 tmpResult = Cy_Crypto_Core_V2_Crc_CalcInit(base, width, polynomial, dataReverse, dataXor, in Cy_Crypto_Core_Crc_CalcInit() 329 … uint32_t width, uint32_t lfsrInitState) in Cy_Crypto_Core_Crc_CalcStart() argument 336 tmpResult = Cy_Crypto_Core_V1_Crc_CalcStart(base, width, lfsrInitState); in Cy_Crypto_Core_Crc_CalcStart() 342 tmpResult = Cy_Crypto_Core_V2_Crc_CalcStart(base, width, lfsrInitState); in Cy_Crypto_Core_Crc_CalcStart() 408 …_en_crypto_status_t Cy_Crypto_Core_Crc_CalcFinish(CRYPTO_Type base, uint32_t width, uint32_t crc) in Cy_Crypto_Core_Crc_CalcFinish() argument 415 tmpResult = Cy_Crypto_Core_V1_Crc_CalcFinish(base, width, crc); in Cy_Crypto_Core_Crc_CalcFinish() 421 tmpResult = Cy_Crypto_Core_V2_Crc_CalcFinish(base, width, crc); in Cy_Crypto_Core_Crc_CalcFinish() 457 uint32_t width, uint32_t *crc, in Cy_Crypto_Core_Crc_Calc() argument [all …]
D	cy_scb_uart.h	`955 #define CY_SCB_UART_IS_DATA_WIDTH_VALID(width) ( ((width) >= 5UL) && ((width) <= 9UL) ) argument 960 #define CY_SCB_UART_IS_RX_BREAK_WIDTH_VALID(base, width) ( ((width) >= (_FLD2VAL(SCB_RX_CTRL_DAT… argument 961 ((width) <= 16UL) ) 962 #define CY_SCB_UART_IS_TX_BREAK_WIDTH_VALID(width) ( ((width) >= 4UL) && ((width) <= 16UL)… argument 964 …_SCB_UART_IS_MUTLI_PROC_VALID(mp, mode, width, parity) ( (mp) ? ((CY_SCB_UART_STANDARD == (mod… argument`
D	cy_crypto_core_crc_v1.h	`57 uint32_t width, 65 cy_en_crypto_status_t Cy_Crypto_Core_V1_Crc_CalcStart(CRYPTO_Type base, uint32_t width, uint32_t … 69 cy_en_crypto_status_t Cy_Crypto_Core_V1_Crc_CalcFinish(CRYPTO_Type base, uint32_t width, uint32_t … 72 uint32_t width,`
D	cy_crypto_core_crc_v2.h	`57 uint32_t width, 65 cy_en_crypto_status_t Cy_Crypto_Core_V2_Crc_CalcStart(CRYPTO_Type base, uint32_t width, uint32_t … 69 cy_en_crypto_status_t Cy_Crypto_Core_V2_Crc_CalcFinish(CRYPTO_Type base, uint32_t width, uint32_t … 72 uint32_t width,`
D	cy_smif.h	`729 #define CY_SMIF_TXFR_WIDTH_VALID(width) ((CY_SMIF_WIDTH_SINGLE == (width)) \|\| \ argument 730 (CY_SMIF_WIDTH_DUAL == (width)) \|\| \ 731 (CY_SMIF_WIDTH_QUAD == (width)) \|\| \ 732 (CY_SMIF_WIDTH_OCTAL == (width)) \|\| \ 733 (CY_SMIF_WIDTH_NA == (width)))`
D	cy_scb_spi.h	`909 #define CY_SCB_SPI_IS_DATA_WIDTH_VALID(width) ( ((width) >= 4UL) && ((width) <= 32UL) ) argument`
/hal_infineon-3.5.0/mtb-hal-cat1/include_pvt/
D	cyhal_crc_impl.h	41 #define _cyhal_crc_calcinit(base, width, polynomial, data_reverse, data_xor, rem_reverse, rem_xor, … argument 42 …Cy_Crypto_Core_Crc_CalcInit((base), (width), (polynomial), (data_reverse) ? 1u : 0u, (data_xor), (… 54 #define _cyhal_crc_calcinit(base, width, polynomial, data_reverse, data_xor, rem_reverse, rem_xor, … 55 …Cy_Crypto_Crc_CalcInit((base), (width), (polynomial), (data_reverse), (data_xor), (rem_reverse), (… 75 obj->crc_width = algorithm->width; in _cyhal_crc_start() 77 algorithm->width, in _cyhal_crc_start()
/hal_infineon-3.5.0/mtb-hal-cat1/source/
D	cyhal_pwm.c	`472 …uint32_t width = (uint32_t)((uint64_t)pulse_width_us * obj->tcpwm.clock_hz / _CYHAL_PWM_US_PER_SEC… in cyhal_pwm_set_period() local 473 result = cyhal_pwm_set_period_and_compare(obj, period, width); in cyhal_pwm_set_period() 489 uint32_t width = (uint32_t)(duty_cycle * 0.01f * period); in cyhal_pwm_set_duty_cycle() local 490 result = cyhal_pwm_set_period_and_compare(obj, period, width); in cyhal_pwm_set_duty_cycle()`
/hal_infineon-3.5.0/mtb-hal-cat1/include/
D	cyhal_crc.h	`104 uint32_t width; //!< Bit width of the CRC member`
/hal_infineon-3.5.0/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/
D	xmc7100_x1088_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100_x2112_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100_x4160_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100d_x2112_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100d_x4160_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7200_x8384_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7200d_x8384_cm0plus.icf	`48 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 88 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
/hal_infineon-3.5.0/core-lib/
D	RELEASE.md	`48 * Add typedefs to convey width in scenarios where there are no standard fixed-width types.`
/hal_infineon-3.5.0/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM7/TOOLCHAIN_IAR/
D	xmc7100_x4160_cm7.icf	`55 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 115 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7200_x8384_cm7.icf	`55 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 114 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100_x2112_cm7.icf	`55 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 115 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100_x1088_cm7.icf	`55 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 115 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`
D	xmc7100d_x2112_cm7.icf	`55 define symbol ecc_init_width = 8; /* Most restrictive native ECC width of all "n… 114 …init_width - 1))); /* Ensure that stack size is an integer multiple of ECC init width (round up) */`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
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