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Searched refs:gain (Results 1 – 9 of 9) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/include/
Dcy_pdm_pcm.h422 #define CY_PDM_PCM_IS_GAIN_VALID(gain) (((gain) == CY_PDM_PCM_ATTN_12_DB) || \ argument
423 ((gain) == CY_PDM_PCM_ATTN_10_5_DB) || \
424 ((gain) == CY_PDM_PCM_ATTN_9_DB) || \
425 ((gain) == CY_PDM_PCM_ATTN_7_5_DB) || \
426 ((gain) == CY_PDM_PCM_ATTN_6_DB) || \
427 ((gain) == CY_PDM_PCM_ATTN_4_5_DB) || \
428 ((gain) == CY_PDM_PCM_ATTN_3_DB) || \
429 ((gain) == CY_PDM_PCM_ATTN_1_5_DB) || \
430 ((gain) == CY_PDM_PCM_BYPASS) || \
431 ((gain) == CY_PDM_PCM_GAIN_1_5_DB) || \
[all …]
Dcy_adcmic.h635 int16_t gain; /**< The storage for the gain calibration value */ member
832 cy_en_adcmic_status_t Cy_ADCMic_SetPgaGain(MXS40ADCMIC_Type * base, cy_en_adcmic_pga_gain_t gain);
1008 void Cy_ADCMic_SetDcGain(int16_t gain, cy_stc_adcmic_context_t * context);
Dcy_sar2.h609 int8_t gain; /**< Digital gain correction. The valid range is [-32..31] */ member
615 int8_t gain; /**< Analog gain correction. The valid range is [-16..15] */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/source/
Dcy_adcmic.c305 cy_en_adcmic_status_t Cy_ADCMic_SetPgaGain(MXS40ADCMIC_Type * base, cy_en_adcmic_pga_gain_t gain) in Cy_ADCMic_SetPgaGain() argument
309 if ((uint32_t)CY_ADCMIC_PGA_GAIN_42 >= (uint32_t)gain) in Cy_ADCMic_SetPgaGain()
311 …32_CLR_SET(base->ADC_MIC_BIAS_PGA_CTRL, MXS40ADCMIC_ADC_MIC_BIAS_PGA_CTRL_MIC_PGA_GAIN_CTRL, gain); in Cy_ADCMic_SetPgaGain()
402 void Cy_ADCMic_SetDcGain(int16_t gain, cy_stc_adcmic_context_t * context) in Cy_ADCMic_SetDcGain() argument
406 context->gain = gain; in Cy_ADCMic_SetDcGain()
412 …int32_t)(((int64_t)adcCounts - (int64_t)context->offset) * CY_ADCMIC_UV / (int64_t)context->gain)); in Cy_ADCMic_CountsTo_uVolts()
417 …int16_t)(((int32_t)adcCounts - (int32_t)context->offset) * CY_ADCMIC_MV / (int32_t)context->gain)); in Cy_ADCMic_CountsTo_mVolts()
422 return (((float)adcCounts - (float)context->offset) / (float)context->gain); in Cy_ADCMic_CountsTo_Volts()
Dcy_pdm_pcm.c147 …id Cy_PDM_PCM_SetGain(PDM_Type * base, cy_en_pdm_pcm_chan_select_t chan, cy_en_pdm_pcm_gain_t gain) in Cy_PDM_PCM_SetGain() argument
150 CY_ASSERT_L3(CY_PDM_PCM_IS_GAIN_VALID(gain)); in Cy_PDM_PCM_SetGain()
154 CY_REG32_CLR_SET(PDM_PCM_CTL(base), PDM_CTL_PGA_L, ((uint32_t) gain)); in Cy_PDM_PCM_SetGain()
158 CY_REG32_CLR_SET(PDM_PCM_CTL(base), PDM_CTL_PGA_R, ((uint32_t) gain)); in Cy_PDM_PCM_SetGain()
Dcy_sar2.c355 _VAL2FLD(PASS_SAR_DIG_CAL_DGAIN, digCalibConfig->gain)); in Cy_SAR2_SetDigitalCalibrationValue()
388 digCalibConfig->gain = (int8_t) _FLD2VAL(PASS_SAR_DIG_CAL_DGAIN, digCal); in Cy_SAR2_GetDigitalCalibrationValue()
423 _VAL2FLD(PASS_SAR_DIG_CAL_ALT_DGAIN, altDigCalibConfig->gain)); in Cy_SAR2_SetAltDigitalCalibrationValue()
459 altDigCalibConfig->gain = (int8_t) _FLD2VAL(PASS_SAR_DIG_CAL_ALT_DGAIN, digCalAlt); in Cy_SAR2_GetAltDigitalCalibrationValue()
494 _VAL2FLD(PASS_SAR_ANA_CAL_AGAIN, analogCalibConfig->gain)); in Cy_SAR2_SetAnalogCalibrationValue()
530 analogCalibConfig->gain = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AGAIN, anaCal); in Cy_SAR2_GetAnalogCalibrationValue()
565 _VAL2FLD(PASS_SAR_ANA_CAL_ALT_AGAIN, altAnalogCalibConfig->gain)); in Cy_SAR2_SetAltAnalogCalibrationValue()
601 altAnalogCalibConfig->gain = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AGAIN, altAnaCal); in Cy_SAR2_GetAltAnalogCalibrationValue()
/hal_infineon-3.5.0/XMCLib/drivers/inc/
Dxmc_hrpwm.h2179 …d XMC_HRPWM_CSG_UpdateDACStepGain(XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t gain) in XMC_HRPWM_CSG_UpdateDACStepGain() argument
2183 csg->SC |= (uint32_t) gain << HRPWM0_CSG_SC_GCFG_Pos; in XMC_HRPWM_CSG_UpdateDACStepGain()
Dxmc4_scu.h1070 void XMC_SCU_CalibrateTemperatureSensor(uint32_t offset, uint32_t gain);
/hal_infineon-3.5.0/XMCLib/drivers/src/
Dxmc4_scu.c299 void XMC_SCU_CalibrateTemperatureSensor(uint32_t offset, uint32_t gain) in XMC_SCU_CalibrateTemperatureSensor() argument
302 (uint32_t)(gain << SCU_GENERAL_DTSCON_GAIN_Pos) | in XMC_SCU_CalibrateTemperatureSensor()